195 lines
5.9 KiB
C
195 lines
5.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __CMDQ_ENGINE_H__
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#define __CMDQ_ENGINE_H__
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enum CMDQ_ENG_ENUM {
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/* ISP */
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CMDQ_ENG_ISP_IMGI = 0,
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CMDQ_ENG_ISP_IMGO, /* 1 */
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CMDQ_ENG_ISP_IMG2O, /* 2 */
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CMDQ_ENG_ISP_IMG3O, /* 3 */
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CMDQ_ENG_ISP_VIPI, /* 4 */
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CMDQ_ENG_ISP_LCEI, /* 5 */
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/* MDP */
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CMDQ_ENG_MDP_CAMIN, /* 6 */
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CMDQ_ENG_MDP_RDMA0, /* 7 */
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CMDQ_ENG_MDP_CCORR0, /* 8 */
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CMDQ_ENG_MDP_RSZ0, /* 9 */
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CMDQ_ENG_MDP_RSZ1, /* 10 */
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CMDQ_ENG_MDP_TDSHP0, /* 11 */
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CMDQ_ENG_MDP_COLOR0, /* 12 */
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CMDQ_ENG_MDP_WROT0, /* 13 */
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CMDQ_ENG_MDP_WDMA, /* 14 */
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/* JPEG & VENC */
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CMDQ_ENG_JPEG_ENC, /* 15 */
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CMDQ_ENG_VIDEO_ENC, /* 16 */
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CMDQ_ENG_JPEG_DEC, /* 17 */
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CMDQ_ENG_JPEG_REMDC, /* 18 */
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/* DISP */
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CMDQ_ENG_DISP_UFOE, /* 19 */
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CMDQ_ENG_DISP_AAL, /* 20 */
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CMDQ_ENG_DISP_COLOR0, /* 21 */
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CMDQ_ENG_DISP_RDMA0, /* 22 */
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CMDQ_ENG_DISP_RDMA1, /* 23 */
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CMDQ_ENG_DISP_WDMA0, /* 24 */
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CMDQ_ENG_DISP_WDMA1, /* 25 */
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CMDQ_ENG_DISP_OVL0, /* 26 */
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CMDQ_ENG_DISP_OVL1, /* 27 */
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CMDQ_ENG_DISP_OVL2, /* 28 */
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CMDQ_ENG_DISP_GAMMA, /* 29 */
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CMDQ_ENG_DISP_DSI0_VDO, /* 30 */
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CMDQ_ENG_DISP_DSI0_CMD, /* 31 */
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CMDQ_ENG_DISP_DSI0, /* 32 */
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CMDQ_ENG_DISP_DPI, /* 33 */
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CMDQ_ENG_DISP_2L_OVL0, /* 34 */
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CMDQ_ENG_DISP_2L_OVL1, /* 35 */
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CMDQ_ENG_DISP_2L_OVL2, /* 36 */
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/* DPE */
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CMDQ_ENG_DPE, /* 37 */
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CMDQ_ENG_RSC, /* 38 */
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CMDQ_ENG_GEPF, /* 39 */
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CMDQ_ENG_EAF, /* 40 */
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CMDQ_ENG_FDVT, /* 41 */
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/* temp: CMDQ internal usage */
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CMDQ_ENG_CMDQ, /* 42 */
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CMDQ_ENG_DISP_MUTEX, /* 43 */
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CMDQ_ENG_MMSYS_CONFIG, /* 44 */
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/* Dummy Engine */
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CMDQ_ENG_MDP_TDSHP1, /* 45 */
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CMDQ_ENG_MDP_MOUT0, /* 46 */
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CMDQ_ENG_MDP_MOUT1, /* 47 */
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CMDQ_ENG_MDP_RDMA1, /* 48 */
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CMDQ_ENG_MDP_RSZ2, /* 49 */
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CMDQ_ENG_MDP_WROT1, /* 50 */
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CMDQ_ENG_DISP_COLOR1, /* 51 */
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CMDQ_ENG_DISP_RDMA2, /* 52 */
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CMDQ_ENG_DISP_MERGE, /* 53 */
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CMDQ_ENG_DISP_SPLIT0, /* 54 */
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CMDQ_ENG_DISP_SPLIT1, /* 55 */
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CMDQ_ENG_DISP_DSI1_VDO, /* 56 */
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CMDQ_ENG_DISP_DSI1_CMD, /* 57 */
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CMDQ_ENG_DISP_DSI1, /* 58 */
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CMDQ_ENG_INORDER, /* 59 */
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CMDQ_MAX_ENGINE_COUNT /* ALWAYS keep at the end */
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};
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#define CMDQ_ENG_ISP_GROUP_BITS ((1LL << CMDQ_ENG_ISP_IMGI) | \
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(1LL << CMDQ_ENG_ISP_IMGO) | \
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(1LL << CMDQ_ENG_ISP_IMG2O))
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#define CMDQ_ENG_MTEE_GROUP_BITS ((1LL << CMDQ_ENG_ISP_IMGI) | \
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(1LL << CMDQ_ENG_ISP_VIPI) | \
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(1LL << CMDQ_ENG_ISP_LCEI))
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#define CMDQ_ENG_MDP_GROUP_BITS ((1LL << CMDQ_ENG_MDP_CAMIN) | \
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(1LL << CMDQ_ENG_MDP_RDMA0) | \
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(1LL << CMDQ_ENG_MDP_RDMA1) | \
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(1LL << CMDQ_ENG_MDP_RSZ0) | \
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(1LL << CMDQ_ENG_MDP_RSZ1) | \
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(1LL << CMDQ_ENG_MDP_RSZ2) | \
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(1LL << CMDQ_ENG_MDP_TDSHP0) | \
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(1LL << CMDQ_ENG_MDP_TDSHP1) | \
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(1LL << CMDQ_ENG_MDP_COLOR0) | \
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(1LL << CMDQ_ENG_MDP_WROT0) | \
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(1LL << CMDQ_ENG_MDP_WROT1) | \
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(1LL << CMDQ_ENG_MDP_CCORR0) | \
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(1LL << CMDQ_ENG_MDP_WDMA))
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#define CMDQ_ENG_DISP_GROUP_BITS ((1LL << CMDQ_ENG_DISP_UFOE) | \
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(1LL << CMDQ_ENG_DISP_AAL) | \
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(1LL << CMDQ_ENG_DISP_COLOR0) | \
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(1LL << CMDQ_ENG_DISP_COLOR1) | \
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(1LL << CMDQ_ENG_DISP_RDMA0) | \
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(1LL << CMDQ_ENG_DISP_RDMA1) | \
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(1LL << CMDQ_ENG_DISP_RDMA2) | \
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(1LL << CMDQ_ENG_DISP_WDMA0) | \
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(1LL << CMDQ_ENG_DISP_WDMA1) | \
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(1LL << CMDQ_ENG_DISP_OVL0) | \
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(1LL << CMDQ_ENG_DISP_OVL1) | \
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(1LL << CMDQ_ENG_DISP_OVL2) | \
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(1LL << CMDQ_ENG_DISP_2L_OVL0) | \
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(1LL << CMDQ_ENG_DISP_2L_OVL1) | \
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(1LL << CMDQ_ENG_DISP_2L_OVL2) | \
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(1LL << CMDQ_ENG_DISP_GAMMA) | \
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(1LL << CMDQ_ENG_DISP_MERGE) | \
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(1LL << CMDQ_ENG_DISP_SPLIT0) | \
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(1LL << CMDQ_ENG_DISP_SPLIT1) | \
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(1LL << CMDQ_ENG_DISP_DSI0_VDO) | \
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(1LL << CMDQ_ENG_DISP_DSI1_VDO) | \
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(1LL << CMDQ_ENG_DISP_DSI0_CMD) | \
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(1LL << CMDQ_ENG_DISP_DSI1_CMD) | \
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(1LL << CMDQ_ENG_DISP_DSI0) | \
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(1LL << CMDQ_ENG_DISP_DSI1) | \
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(1LL << CMDQ_ENG_DISP_DPI))
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#define CMDQ_ENG_VENC_GROUP_BITS ((1LL << CMDQ_ENG_VIDEO_ENC))
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#define CMDQ_ENG_JPEG_GROUP_BITS ((1LL << CMDQ_ENG_JPEG_ENC) | \
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(1LL << CMDQ_ENG_JPEG_REMDC) | \
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(1LL << CMDQ_ENG_JPEG_DEC))
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#define CMDQ_ENG_DPE_GROUP_BITS (1LL << CMDQ_ENG_DPE)
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#define CMDQ_ENG_RSC_GROUP_BITS (1LL << CMDQ_ENG_RSC)
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#define CMDQ_ENG_GEPF_GROUP_BITS (1LL << CMDQ_ENG_GEPF)
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#define CMDQ_ENG_EAF_GROUP_BITS (1LL << CMDQ_ENG_EAF)
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#define CMDQ_ENG_FDVT_GROUP_BITS (1LL << CMDQ_ENG_FDVT)
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#define CMDQ_ENG_ISP_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_ISP_GROUP_BITS))
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#define CMDQ_ENG_MDP_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_MDP_GROUP_BITS))
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#define CMDQ_ENG_DISP_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_DISP_GROUP_BITS))
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#define CMDQ_ENG_JPEG_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_JPEG_GROUP_BITS))
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#define CMDQ_ENG_VENC_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_VENC_GROUP_BITS))
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#define CMDQ_ENG_DPE_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_DPE_GROUP_BITS))
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#define CMDQ_ENG_RSC_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_RSC_GROUP_BITS))
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#define CMDQ_ENG_GEPF_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_GEPF_GROUP_BITS))
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#define CMDQ_ENG_EAF_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_EAF_GROUP_BITS))
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#define CMDQ_ENG_FDVT_GROUP_FLAG(flag) ((flag) & (CMDQ_ENG_FDVT_GROUP_BITS))
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#define CMDQ_FOREACH_GROUP(ACTION_struct)\
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ACTION_struct(CMDQ_GROUP_ISP, ISP) \
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ACTION_struct(CMDQ_GROUP_MDP, MDP) \
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ACTION_struct(CMDQ_GROUP_DISP, DISP) \
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ACTION_struct(CMDQ_GROUP_JPEG, JPEG) \
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ACTION_struct(CMDQ_GROUP_VENC, VENC) \
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ACTION_struct(CMDQ_GROUP_DPE, DPE) \
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ACTION_struct(CMDQ_GROUP_RSC, RSC) \
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ACTION_struct(CMDQ_GROUP_GEPF, GEPF) \
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ACTION_struct(CMDQ_GROUP_EAF, EAF)
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#define MDP_GENERATE_ENUM(_enum, _string) _enum,
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enum CMDQ_GROUP_ENUM {
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CMDQ_FOREACH_GROUP(MDP_GENERATE_ENUM)
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CMDQ_MAX_GROUP_COUNT, /* ALWAYS keep at the end */
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};
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enum MDP_ENG_BASE {
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ENGBASE_MMSYS_CONFIG,
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ENGBASE_MDP_RDMA0,
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ENGBASE_MDP_CCORR0,
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ENGBASE_MDP_RSZ0,
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ENGBASE_MDP_RSZ1,
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ENGBASE_MDP_WDMA,
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ENGBASE_MDP_WROT0,
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ENGBASE_MDP_TDSHP0,
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ENGBASE_MDP_COLOR0,
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ENGBASE_MMSYS_MUTEX,
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ENGBASE_IMGSYS,
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ENGBASE_ISP_DIP1,
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ENGBASE_COUNT
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};
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#endif /* __CMDQ_ENGINE_H__ */
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