168 lines
3.3 KiB
C
168 lines
3.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef _MTK_THERMAL_PLATFORM_H
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#define _MTK_THERMAL_PLATFORM_H
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#include <linux/thermal.h>
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extern
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int mtk_thermal_get_cpu_info(int *nocores, int **cpufreq, int **cpuloading);
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extern
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int mtk_thermal_get_gpu_info(int *nocores, int **gpufreq, int **gpuloading);
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extern
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int mtk_thermal_get_batt_info
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(int *batt_voltage, int *batt_current, int *batt_temp);
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extern
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int mtk_thermal_get_extra_info(int *no_extra_attr,
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char ***attr_names, int **attr_values, char ***attr_unit);
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extern
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int mtk_thermal_force_get_batt_temp(void);
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enum {
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MTK_THERMAL_SCEN_CALL = 0x1
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};
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extern
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unsigned int mtk_thermal_set_user_scenarios(unsigned int mask);
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extern
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unsigned int mtk_thermal_clear_user_scenarios(unsigned int mask);
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#if defined(CONFIG_MTK_SMART_BATTERY)
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/* global variable from battery driver... */
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extern kal_bool gFG_Is_Charging;
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#endif
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extern int force_get_tbat(void);
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/* --- TA daemon --- */
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enum ta_daemon_crtl_cmd_to_kernel {
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TA_DAEMON_CMD_GET_INIT_FLAG = 0,
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TA_DAEMON_CMD_SET_DAEMON_PID,
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TA_DAEMON_CMD_NOTIFY_DAEMON,
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TA_DAEMON_CMD_NOTIFY_DAEMON_CATMINIT,
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TA_DAEMON_CMD_SET_TTJ,
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TA_DAEMON_CMD_GET_TPCB,
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TA_DAEMON_CMD_GET_TI,
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TA_DAEMON_CMD_GET_DCTM_DRCCFG,
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TA_DAEMON_CMD_GET_DTCM,
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TA_DAEMON_CMD_GET_TSCPU,
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TA_DAEMON_CMD_TO_KERNEL_NUMBER
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}; /*must sync userspace/kernel: TA_DAEMON_CTRL_CMD_FROM_USER*/
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#define TAD_NL_MSG_T_HDR_LEN 12
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#define TAD_NL_MSG_MAX_LEN 512
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struct tad_nl_msg_t {
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unsigned int tad_cmd;
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unsigned int tad_data_len;
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unsigned int tad_ret_data_len;
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char tad_data[TAD_NL_MSG_MAX_LEN];
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};
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enum {
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TA_CATMPLUS = 1,
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TA_CONTINUOUS = 2,
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TA_CATMPLUS_TTJ = 3,
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TA_DCTM_DRC_CFG = 4,
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TA_DCTM_DRC_RST = 5,
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TA_DCTM_TTJ = 6
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};
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/* --- TA daemon --- */
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/* --- cATM parameters --- */
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struct cATM_params_t {
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int CATM_ON;
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int K_TT;
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int K_SUM_TT_LOW;
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int K_SUM_TT_HIGH;
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int MIN_SUM_TT;
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int MAX_SUM_TT;
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int MIN_TTJ;
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int CATMP_STEADY_TTJ_DELTA;
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};
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struct continuetm_params_t {
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int STEADY_TARGET_TJ;
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int MAX_TARGET_TJ;
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int TRIP_TPCB;
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int STEADY_TARGET_TPCB;
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};
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struct CATM_T {
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struct cATM_params_t t_catm_par;
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struct continuetm_params_t t_continuetm_par;
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};
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extern struct CATM_T thermal_atm_t;
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/* --- cATM parameters --- */
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/* --- SPA parameters --- */
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struct spa_Tpolicy_info {
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int min_cpu_power[3];
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int min_gpu_power[3];
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int steady_target_tj;
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int steady_exit_tj;
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};
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struct spa_system_info {
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int cpu_Tj;
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int Tpcb;
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int OPP_power;
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unsigned int fg_app_pid;
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unsigned int avg_fps;
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int WIFI_UL_Tput;
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int MD_UL_Tput;
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int chg_current_limit;
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int input_current_limit;
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int camera_on;
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int game_mode;
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};
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struct SPA_T {
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struct spa_Tpolicy_info t_spa_Tpolicy_info;
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struct spa_system_info t_spa_system_info;
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};
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extern struct SPA_T thermal_spa_t;
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/* --- SPA parameters --- */
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/* --- DCTM parameters --- */
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struct DRC_params_t {
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int tamb;
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int init_r1_r2;
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int init_r1c1;
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int dtskin_thres;
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int drc_bound;
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int ttskin;
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int ave_window;
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int drc_ave_window;
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int ttj_limit;
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};
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struct DCTM_T {
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struct DRC_params_t t_drc_par;
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};
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extern struct DCTM_T thermal_dctm_t;
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/* --- DCTM parameters --- */
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int wakeup_ta_algo(int flow_state);
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int ta_get_ttj(void);
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extern int mtk_thermal_get_tpcb_target(void);
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extern int tsatm_thermal_get_catm_type(void);
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extern int tsdctm_thermal_get_ttj_on(void);
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#endif/* _MTK_THERMAL_PLATFORM_H */
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