464 lines
14 KiB
C
464 lines
14 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __LINUX_MFD_MT6370_PMU_CHARGER_H
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#define __LINUX_MFD_MT6370_PMU_CHARGER_H
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/* Define this macro if detecting apple samsung TA is needed */
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/* #define MT6370_APPLE_SAMSUNG_TA_SUPPORT */
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/* Define this macro if DCD timeout is supported */
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#define CONFIG_MT6370_DCDTOUT_SUPPORT
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/* Parameter */
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/* uA */
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#define MT6370_ICHG_NUM 64
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#define MT6370_ICHG_MIN 100000
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#define MT6370_ICHG_MAX 5000000
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#define MT6370_ICHG_STEP 100000
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/* uA */
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#define MT6370_IEOC_NUM 16
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#define MT6370_IEOC_MIN 100000
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#define MT6370_IEOC_MAX 850000
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#define MT6370_IEOC_STEP 50000
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/* uV */
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#define MT6370_MIVR_NUM 128
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#define MT6370_MIVR_MIN 3900000
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#define MT6370_MIVR_MAX 13400000
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#define MT6370_MIVR_STEP 100000
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/* uA */
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#define MT6370_AICR_NUM 64
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#define MT6370_AICR_MIN 100000
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#define MT6370_AICR_MAX 3250000
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#define MT6370_AICR_STEP 50000
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/* uV */
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#define MT6370_BAT_VOREG_NUM 128
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#define MT6370_BAT_VOREG_MIN 3900000
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#define MT6370_BAT_VOREG_MAX 4710000
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#define MT6370_BAT_VOREG_STEP 10000
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/* uV */
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#define MT6370_BOOST_VOREG_NUM 64
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#define MT6370_BOOST_VOREG_MIN 4425000
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#define MT6370_BOOST_VOREG_MAX 5825000
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#define MT6370_BOOST_VOREG_STEP 25000
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/* uV */
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#define MT6370_VPREC_NUM 16
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#define MT6370_VPREC_MIN 2000000
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#define MT6370_VPREC_MAX 3500000
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#define MT6370_VPREC_STEP 100000
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/* uA */
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#define MT6370_IPREC_NUM 16
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#define MT6370_IPREC_MIN 100000
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#define MT6370_IPREC_MAX 850000
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#define MT6370_IPREC_STEP 50000
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/* uV */
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#define MT6370_VRECHG_NUM 4
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#define MT6370_VRECHG_MIN 100000
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#define MT6370_VRECHG_MAX 400000
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#define MT6370_VRECHG_STEP 100000
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/* Watchdog fast-charge timer */
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/* hour */
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#define MT6370_WT_FC_NUM 8
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#define MT6370_WT_FC_MIN 4
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#define MT6370_WT_FC_MAX 20
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#define MT6370_WT_FC_STEP 2
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/* IR compensation */
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/* uohm */
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#define MT6370_IRCMP_RES_NUM 8
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#define MT6370_IRCMP_RES_MIN 0
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#define MT6370_IRCMP_RES_MAX 175000
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#define MT6370_IRCMP_RES_STEP 25000
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/* IR compensation maximum voltage clamp */
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/* uV */
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#define MT6370_IRCMP_VCLAMP_NUM 8
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#define MT6370_IRCMP_VCLAMP_MIN 0
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#define MT6370_IRCMP_VCLAMP_MAX 224000
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#define MT6370_IRCMP_VCLAMP_STEP 32000
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/* PE+20 voltage */
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/* uV */
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#define MT6370_PEP20_VOLT_NUM 30
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#define MT6370_PEP20_VOLT_MIN 5500000
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#define MT6370_PEP20_VOLT_MAX 20000000
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#define MT6370_PEP20_VOLT_STEP 500000
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/* AICL VTH */
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/* uV */
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#define MT6370_AICL_VTH_NUM 8
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#define MT6370_AICL_VTH_MIN 4100000
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#define MT6370_AICL_VTH_MAX 4800000
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#define MT6370_AICL_VTH_STEP 100000
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/* VBUSOV LVL */
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#define MT6370_DC_VBUSOV_LVL_NUM 32
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#define MT6370_DC_VBUSOV_LVL_MIN 3900000
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#define MT6370_DC_VBUSOV_LVL_MAX 7000000
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#define MT6370_DC_VBUSOV_LVL_STEP 100000
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/* IBUSOC LVL */
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#define MT6370_DC_IBUSOC_LVL_NUM 8
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#define MT6370_DC_IBUSOC_LVL_MIN 4000000
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#define MT6370_DC_IBUSOC_LVL_MAX 6500000
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#define MT6370_DC_IBUSOC_LVL_STEP 500000
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/* ADC unit/offset */
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#define MT6370_ADC_UNIT_VBUS_DIV5 25000 /* uV */
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#define MT6370_ADC_UNIT_VBUS_DIV2 10000 /* uV */
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#define MT6370_ADC_UNIT_VSYS 5000 /* uV */
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#define MT6370_ADC_UNIT_VBAT 5000 /* uV */
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#define MT6370_ADC_UNIT_TS_BAT 25 /* 0.01% */
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#define MT6370_ADC_UNIT_IBUS 50000 /* uA */
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#define MT6370_ADC_UNIT_IBAT 50000 /* uA */
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#define MT6370_ADC_UNIT_CHG_VDDP 5000 /* uV */
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#define MT6370_ADC_UNIT_TEMP_JC 2 /* degree */
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#define MT6370_ADC_OFFSET_VBUS_DIV5 0 /* mV */
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#define MT6370_ADC_OFFSET_VBUS_DIV2 0 /* mV */
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#define MT6370_ADC_OFFSET_VSYS 0 /* mV */
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#define MT6370_ADC_OFFSET_VBAT 0 /* mV */
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#define MT6370_ADC_OFFSET_TS_BAT 0 /* % */
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#define MT6370_ADC_OFFSET_IBUS 0 /* mA */
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#define MT6370_ADC_OFFSET_IBAT 0 /* mA */
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#define MT6370_ADC_OFFSET_CHG_VDDP 0 /* mV */
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#define MT6370_ADC_OFFSET_TEMP_JC (-40) /* degree */
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/* ========== CORE_CTRL2 0x02 ============ */
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#define MT6370_SHIFT_CHG_RST 6
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#define MT6370_MASK_CHG_RST (1 << MT6370_SHIFT_CHG_RST)
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/* ========== CHG_CTRL1 0x11 ============ */
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#define MT6370_SHIFT_OPA_MODE 0
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#define MT6370_SHIFT_HZ_EN 2
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#define MT6370_SHIFT_FORCE_SLEEP 3
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#define MT6370_MASK_OPA_MODE (1 << MT6370_SHIFT_OPA_MODE)
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#define MT6370_MASK_HZ_EN (1 << MT6370_SHIFT_HZ_EN)
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#define MT6370_MASK_FORCE_SLEEP (1 << MT6370_SHIFT_FORCE_SLEEP)
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/* ========== CHG_CTRL2 0x12 ============ */
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#define MT6370_SHIFT_CHG_EN 0
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#define MT6370_SHIFT_CFO_EN 1
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#define MT6370_SHIFT_IINLMTSEL 2
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#define MT6370_SHIFT_TE_EN 4
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#define MT6370_SHIFT_BYPASS_MODE 5
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#define MT6370_MASK_CHG_EN (1 << MT6370_SHIFT_CHG_EN)
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#define MT6370_MASK_CFO_EN (1 << MT6370_SHIFT_CFO_EN)
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#define MT6370_MASK_IINLMTSEL 0x0C
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#define MT6370_MASK_TE_EN (1 << MT6370_SHIFT_TE_EN)
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#define MT6370_MASK_BYPASS_MODE (1 << MT6370_SHIFT_BYPASS_MODE)
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/* ========== CHG_CTRL3 0x13 ============ */
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#define MT6370_SHIFT_AICR 2
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#define MT6370_SHIFT_AICR_EN 1
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#define MT6370_SHIFT_ILIM_EN 0
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#define MT6370_MASK_AICR 0xFC
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#define MT6370_MASK_AICR_EN (1 << MT6370_SHIFT_AICR_EN)
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#define MT6370_MASK_ILIM_EN (1 << MT6370_SHIFT_ILIM_EN)
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/* ========== CHG_CTRL4 0x14 ============ */
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#define MT6370_SHIFT_BAT_VOREG 1
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#define MT6370_MASK_BAT_VOREG 0xFE
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/* ========== CHG_CTRL5 0x15 ============ */
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#define MT6370_SHIFT_BOOST_VOREG 2
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#define MT6370_MASK_BOOST_VOREG 0xFC
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/* ========== CHG_CTRL6 0x16 ============ */
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#define MT6370_SHIFT_MIVR 1
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#define MT6370_SHIFT_MIVR_EN 0
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#define MT6370_MASK_MIVR 0xFE
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#define MT6370_MASK_MIVR_EN (1 << MT6370_SHIFT_MIVR_EN)
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/* ========== CHG_CTRL7 0x17 ============ */
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#define MT6370_SHIFT_ICHG 2
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#define MT6370_MASK_ICHG 0xFC
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/* ========== CHG_CTRL8 0x18 ============ */
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#define MT6370_SHIFT_VPREC 4
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#define MT6370_SHIFT_IPREC 0
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#define MT6370_MASK_VPREC 0xF0
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#define MT6370_MASK_IPREC 0x0F
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/* ========== CHG_CTRL9 0x19 ============ */
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#define MT6370_SHIFT_IEOC 4
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#define MT6370_MASK_IEOC 0xF0
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/* ========== CHG_CTRL10 0x1A ============ */
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#define MT6370_SHIFT_BOOST_OC 0
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#define MT6370_MASK_BOOST_OC 0x07
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/* ========== CHG_CTRL11 0x1B ============ */
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#define MT6370_SHIFT_VRECHG 0
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#define MT6370_MASK_VRECHG 0x03
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/* ========== CHG_CTRL12 0x1C ============ */
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#define MT6370_SHIFT_TMR_EN 1
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#define MT6370_SHIFT_WT_FC 5
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#define MT6370_MASK_TMR_EN (1 << MT6370_SHIFT_TMR_EN)
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#define MT6370_MASK_WT_FC 0xE0
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/* ========== CHG_CTRL13 0x1D ============ */
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#define MT6370_SHIFT_WDT_EN 7
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#define MT6370_MASK_WDT_EN (1 << MT6370_SHIFT_WDT_EN)
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/* ========== CHG_CTRL14 0x1E ============ */
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#define MT6370_SHIFT_AICL_MEAS 7
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#define MT6370_SHIFT_AICL_VTH 0
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#define MT6370_MASK_AICL_MEAS (1 << MT6370_SHIFT_AICL_MEAS)
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#define MT6370_MASK_AICL_VTH 0x07
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/* ========== CHG_CTRL16 0x20 ============ */
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#define MT6370_SHIFT_JEITA_EN 4
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#define MT6370_MASK_JEITA_EN (1 << MT6370_SHIFT_JEITA_EN)
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/* ========== CHG_ADC 0x21 ============ */
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#define MT6370_SHIFT_ADC_IN_SEL 4
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#define MT6370_SHIFT_ADC_START 0
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#define MT6370_MASK_ADC_IN_SEL 0xF0
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#define MT6370_MASK_ADC_START (1 << MT6370_SHIFT_ADC_START)
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/* ========== CHG_DEVICETYPE 0x22 ============ */
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#define MT6370_SHIFT_USBCHGEN 7
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#define MT6370_SHFT_DCDTOUTEN 6
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#define MT6370_SHIFT_DCPSTD 2
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#define MT6370_SHIFT_CDP 1
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#define MT6370_SHIFT_SDP 0
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#define MT6370_MASK_USBCHGEN (1 << MT6370_SHIFT_USBCHGEN)
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#define MT6370_MASK_DCDTOUTEN (1 << MT6370_SHFT_DCDTOUTEN)
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#define MT6370_MASK_DCPSTD (1 << MT6370_SHIFT_DCPSTD)
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#define MT6370_MASK_CDP (1 << MT6370_SHIFT_CDP)
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#define MT6370_MASK_SDP (1 << MT6370_SHIFT_SDP)
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/* ========== QCCTRL2 0x24 ============ */
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#define MT6370_SHIFT_EN_DCP 1
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#define MT6370_MASK_EN_DCP (1 << MT6370_SHIFT_EN_DCP)
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/* ========== USBSTATUS1 0x27 ============ */
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#define MT6370_SHIFT_USB_STATUS 4
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#define MT6370_SHIFT_DCDT 2
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#define MT6370_MASK_FAST_UNKNOWN_TA_DECT (0x80)
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#define MT6370_MASK_USB_STATUS 0x70
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/* ========== QCSTATUS1 0x28 ============= */
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#define MT6370_SHIFT_VLGC_DISABLE (7)
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#define MT6370_MASK_VLGC_DISABLE (1 << MT6370_SHIFT_VLGC_DISABLE)
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/* ========== CHG_PUMP 0x2A ============ */
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#define MT6370_SHIFT_VG_LVL_SEL 1
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#define MT6370_SHIFT_VG_EN 0
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#define MT6370_MASK_VG_LVL_SEL (1 << MT6370_SHIFT_LVL_SEL)
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#define MT6370_MASK_VG_EN (1 << MT6370_SHIFT_VG_EN)
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/* ========== CHG_CTRL17 0x2B ============ */
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#define MT6370_SHIFT_PUMPX_EN 7
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#define MT6370_SHIFT_PUMPX_20_10 6
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#define MT6370_SHIFT_PUMPX_UP_DN 5
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#define MT6370_SHIFT_PUMPX_DEC 0
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#define MT6370_MASK_PUMPX_EN (1 << MT6370_SHIFT_PUMPX_EN)
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#define MT6370_MASK_PUMPX_20_10 (1 << MT6370_SHIFT_PUMPX_20_10)
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#define MT6370_MASK_PUMPX_UP_DN (1 << MT6370_SHIFT_PUMPX_UP_DN)
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#define MT6370_MASK_PUMPX_DEC 0x1F
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/* ========== CHG_CTRL18 0x2C ============ */
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#define MT6370_SHIFT_IRCMP_RES 3
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#define MT6370_SHIFT_IRCMP_VCLAMP 0
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#define MT6370_MASK_IRCMP_RES 0x38
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#define MT6370_MASK_IRCMP_VCLAMP 0x07
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/* ========== CHG_DIRCHG1 0x2D ============ */
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#define MT6370_SHIFT_DC_VBATOV_EN 6
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#define MT6370_SHIFT_DC_VBATOV_LVL 4
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#define MT6370_SHIFT_DC_IBUSOC_EN 3
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#define MT6370_SHIFT_DC_IBUSOC_LVL 0
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#define MT6370_MASK_DC_VBATOV_EN (1 << MT6370_SHIFT_DC_VBATOV_EN)
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#define MT6370_MASK_DC_VBATOV_LVL 0x30
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#define MT6370_MASK_DC_IBUSOC_EN (1 << MT6370_SHIFT_DC_IBUSOC_EN)
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#define MT6370_MASK_DC_IBUSOC_LVL 0x07
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/* ========== CHG_DIRCHG1 0x2E ============ */
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#define MT6370_SHIFT_DC_WDT 4
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#define MT6370_MASK_DC_WDT 0x70
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/* ========== CHG_DIRCHG2 0x2F ============ */
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#define MT6370_SHIFT_DC_VBUSOV_EN 7
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#define MT6370_SHIFT_DC_VBUSOV_LVL 2
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#define MT6370_MASK_DC_VBUSOV_EN (1 << MT6370_SHIFT_DC_VBUSOV_EN)
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#define MT6370_MASK_DC_VBUSOV_LVL 0x7C
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/* ========== CHG_STAT 0x4A ============ */
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#define MT6370_SHIFT_ADC_STAT 0
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#define MT6370_SHIFT_CHG_STAT 6
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#define MT6370_MASK_ADC_STAT (1 << MT6370_SHIFT_ADC_STAT)
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#define MT6370_MASK_CHG_STAT 0xC0
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/* ============ VDDA SUPPLY 0x62 ============ */
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#define MT6370_SHIFT_LBPHYS_SEL (7)
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#define MT6370_SHIFT_LBP_DT (5)
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#define MT6370_MASK_LBP (0xE0)
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/* ========== CHG_STAT1 0xD0 ============ */
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#define MT6370_SHIFT_PWR_RDY 7
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#define MT6370_SHIFT_CHG_MIVR 6
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#define MT6370_SHIFT_CHG_AICR 5
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#define MT6370_SHIFT_CHG_TREG 4
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#define MT6370_SHIFT_DIRCHG_ON 0
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#define MT6370_MASK_PWR_RDY (1 << MT6370_SHIFT_PWR_RDY)
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#define MT6370_MASK_CHG_MIVR (1 << MT6370_SHIFT_CHG_MIVR)
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#define MT6370_MASK_CHG_AICR (1 << MT6370_SHIFT_CHG_AICR)
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#define MT6370_MASK_CHG_TREG (1 << MT6370_SHIFT_CHG_TREG)
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#define MT6370_MASK_DIRCHG_ON (1 << MT6370_SHIFT_DIRCHG_ON)
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/* ========== CHG_IRQ5 0xC4 ============ */
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#define MT6370_SHIFT_CHG_IEOCI 7
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#define MT6370_SHIFT_CHG_TERMI 6
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#define MT6370_SHIFT_CHG_RECHGI 5
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#define MT6370_SHIFT_CHG_SSFINISHI 4
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#define MT6370_SHIFT_CHG_WDTMRI 3
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#define MT6370_SHIFT_CHGDET_DONEI 2
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#define MT6370_SHIFT_CHG_ICHGMEASI 1
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#define MT6370_SHIFT_CHG_AICLMEASI 0
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#define MT6370_MASK_CHG_IEOCI (1 << MT6370_SHIFT_CHG_IEOCI)
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#define MT6370_MASK_CHG_TERMI (1 << MT6370_SHIFT_CHG_TERMI)
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#define MT6370_MASK_CHG_RECHGI (1 << MT6370_SHIFT_CHG_RECHGI)
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#define MT6370_MASK_CHG_SSFINISHI (1 << MT6370_SHIFT_CHG_SSFINISHI)
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#define MT6370_MASK_CHG_WDTMRI (1 << MT6370_SHIFT_CHG_WDTMRI)
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#define MT6370_MASK_CHGDET_DONEI (1 << MT6370_SHIFT_CHGDET_DONEI)
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#define MT6370_MASK_CHG_ICHGMEASI (1 << MT6370_SHIFT_CHG_ICHGMEASI)
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#define MT6370_MASK_CHG_AICLMEASI (1 << MT6370_SHIFT_CHG_AICLMEASI)
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/* ========== CHG_IRQ6 0xC5 ============ */
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#define MT6370_SHIFT_BST_OLPI 7
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#define MT6370_SHIFT_BST_MIDOVI 6
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#define MT6370_SHIFT_BST_BATUVI 5
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#define MT6370_SHIFT_PUMPX_DONEI 1
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#define MT6370_SHIFT_ADC_DONEI 0
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#define MT6370_MASK_BST_OLPI (1 << MT6370_SHIFT_BST_OLPI)
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#define MT6370_MASK_BST_MIDOVI (1 << MT6370_SHIFT_BST_MIDOVI)
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#define MT6370_MASK_BST_BATUVI (1 << MT6370_SHIFT_BST_BATUVI)
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#define MT6370_MASK_PUMPX_DONEI (1 << MT6370_SHIFT_PUMPX_DONEI)
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#define MT6370_MASK_ADC_DONEI (1 << MT6370_SHIFT_ADC_DONEI)
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/* ========== DPDM_IRQ 0xC6 ============ */
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#define MT6370_SHIFT_DCDTI 7
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#define MT6370_SHIFT_CHGDETI 6
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#define MT6370_SHIFT_HVDCPDET 5
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#define MT6370_SHIFT_DETACHI 1
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#define MT6370_SHIFT_ATTACHI 0
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#define MT6370_MASK_DCDTI (1 << MT6370_SHIFT_DCDTI)
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#define MT6370_MASK_CHGDETI (1 << MT6370_SHIFT_CHGDETI)
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#define MT6370_MASK_HVDCPDET (1 << MT6370_SHIFT_HVDCPDET)
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#define MT6370_MASK_DETACHI (1 << MT6370_SHIFT_DETACHI)
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#define MT6370_MASK_ATTACHI (1 << MT6370_SHIFT_ATTACHI)
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/* ========== CHG_STAT1 0xD0 ============ */
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#define MT6370_SHIFT_MIVR_STAT 6
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#define MT6370_MASK_MIVR_STAT (1 << MT6370_SHIFT_MIVR_STAT)
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/* ========== CHG_STAT2 0xD1 ============ */
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#define MT6370_SHIFT_CHG_VBUSOV_STAT 7
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#define MT6370_MASK_CHG_VBUSOV_STAT (1 << MT6370_SHIFT_CHG_VBUSOV_STAT)
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/* ========== CHG_STAT4 0xD3 ============ */
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#define MT6370_SHIFT_CHG_TMRI_STAT 3
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#define MT6370_MASK_CHG_TMRI_STAT (1 << MT6370_SHIFT_CHG_TMRI_STAT)
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/* ========== CHG_STAT5 0xD4 ============ */
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#define MT6370_SHIFT_CHG_IEOCI_STAT 7
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#define MT6370_MASK_CHG_IEOCI_STAT (1 << MT6370_SHIFT_CHG_IEOCI_STAT)
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/* ========== DPDM_STAT 0xD6 ============ */
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#define MT6370_SHIFT_DCDTI_STAT 7
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#define MT6370_MASK_DCDTI_STAT (1 << MT6370_SHIFT_DCDTI_STAT)
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/* ========== OVPCTRL_STAT 0xD8 ============ */
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#define MT6370_SHIFT_OVPCTRL_UVP_D_STAT 4
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#define MT6370_MASK_OVPCTRL_UVP_D_STAT (1 << MT6370_SHIFT_OVPCTRL_UVP_D_STAT)
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/* ========== CHG_MASK1 0xE0 ============ */
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#define MT6370_SHIFT_CHG_MIVRM 6
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#define MT6370_MASK_CHG_MIVRM (1 << MT6370_SHIFT_CHG_MIVRM)
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/* ========== CHG_MASK5 0xE4 ============ */
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#define MT6370_SHIFT_CHG_IEOCM 7
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#define MT6370_SHIFT_CHG_TERMM 6
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#define MT6370_SHIFT_CHG_RECHGM 5
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#define MT6370_SHIFT_CHG_SSFINISHM 4
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#define MT6370_SHIFT_CHG_WDTMRM 3
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#define MT6370_SHIFT_CHGDET_DONEM 2
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#define MT6370_SHIFT_CHG_ICHGMEASM 1
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#define MT6370_SHIFT_CHG_AICLMEASM 0
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#define MT6370_MASK_CHG_IEOCM (1 << MT6370_SHIFT_CHG_IEOCM)
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#define MT6370_MASK_CHG_TERMM (1 << MT6370_SHIFT_CHG_TERMM)
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#define MT6370_MASK_CHG_RECHGM (1 << MT6370_SHIFT_CHG_RECHGM)
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#define MT6370_MASK_CHG_SSFINISHM (1 << MT6370_SHIFT_CHG_SSFINISHM)
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#define MT6370_MASK_CHG_WDTMRM (1 << MT6370_SHIFT_CHG_WDTMRM)
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#define MT6370_MASK_CHGDET_DONEM (1 << MT6370_SHIFT_CHGDET_DONEM)
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#define MT6370_MASK_CHG_ICHGMEASM (1 << MT6370_SHIFT_CHG_ICHGMEASM)
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#define MT6370_MASK_CHG_AICLMEASM (1 << MT6370_SHIFT_CHG_AICLMEASM)
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/* ========== CHG_MASK6 0xE5 ============ */
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#define MT6370_SHIFT_BST_OLPM 7
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#define MT6370_SHIFT_BST_MIDOVM 6
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#define MT6370_SHIFT_BST_BATUVM 5
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#define MT6370_SHIFT_PUMPX_DONEM 1
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#define MT6370_SHIFT_ADC_DONEM 0
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#define MT6370_MASK_BST_OLPM (1 << MT6370_SHIFT_BST_OLPM)
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#define MT6370_MASK_BST_MIDOVM (1 << MT6370_SHIFT_BST_MIDOVM)
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#define MT6370_MASK_BST_BATUVM (1 << MT6370_SHIFT_BST_BATUVM)
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#define MT6370_MASK_PUMPX_DONEM (1 << MT6370_SHIFT_PUMPX_DONEM)
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#define MT6370_MASK_ADC_DONEM (1 << MT6370_SHIFT_ADC_DONEM)
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#define MT6370_MASK_BATOVP_LVL (0x60)
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#endif /* __LINUX_MFD_MT6370_PMU_CHARGER_H */
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