338 lines
8.4 KiB
C
338 lines
8.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2021 MediaTek Inc.
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*/
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#if defined(CONFIG_MTK_RTC)
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#ifdef pr_fmt
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#undef pr_fmt
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#endif
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/rtc.h>
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#include <mach/upmu_hw.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/sched/clock.h>
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#include <mtk_rtc_hal.h>
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#include <mtk_rtc_hw.h>
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#include <mtk_rtc_hal_common.h>
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#ifdef CONFIG_MTK_PMIC_WRAP_HAL
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#include <mach/mtk_pmic_wrap.h>
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#endif
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#define hal_rtc_xinfo(fmt, args...) \
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pr_notice(fmt, ##args)
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u16 rtc_read(u16 addr)
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{
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u32 rdata = 0;
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#ifdef CONFIG_MTK_PMIC_WRAP_HAL
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pwrap_read((u32) addr, &rdata);
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#endif
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return (u16) rdata;
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}
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void rtc_write(u16 addr, u16 data)
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{
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#ifdef CONFIG_MTK_PMIC_WRAP_HAL
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pwrap_write((u32) addr, (u32) data);
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#endif
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}
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void rtc_busy_wait(void)
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{
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unsigned long long timeout = sched_clock() + 500000000;
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do {
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if ((rtc_read(RTC_BBPU) & RTC_BBPU_CBUSY) == 0)
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break;
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else if (sched_clock() > timeout) {
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pr_err("%s, wait cbusy timeout, %x, %x, %x, %d\n",
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__func__,
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rtc_read(RTC_BBPU), rtc_read(RTC_POWERKEY1),
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rtc_read(RTC_POWERKEY2), rtc_read(RTC_TC_SEC));
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break;
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}
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} while (1);
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}
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void rtc_write_trigger(void)
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{
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rtc_write(RTC_WRTGR, 1);
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rtc_busy_wait();
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}
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void rtc_writeif_unlock(void)
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{
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rtc_write(RTC_PROT, RTC_PROT_UNLOCK1);
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rtc_write_trigger();
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rtc_write(RTC_PROT, RTC_PROT_UNLOCK2);
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rtc_write_trigger();
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}
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void rtc_xosc_write(u16 val, bool reload)
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{
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rtc_write(RTC_OSC32CON, RTC_OSC32CON_UNLOCK1);
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rtc_busy_wait();
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rtc_write(RTC_OSC32CON, RTC_OSC32CON_UNLOCK2);
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rtc_busy_wait();
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rtc_write(RTC_OSC32CON, val);
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rtc_busy_wait();
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if (reload) {
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u16 bbpu;
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bbpu = rtc_read(RTC_BBPU) | RTC_BBPU_KEY | RTC_BBPU_RELOAD;
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rtc_write(RTC_BBPU, bbpu);
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rtc_write_trigger();
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}
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}
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void rtc_set_writeif(bool enable)
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{
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if (enable) {
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rtc_writeif_unlock();
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} else {
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rtc_write(RTC_PROT, 0);
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rtc_write_trigger();
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}
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}
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void hal_rtc_set_spare_register(enum rtc_spare_enum cmd, u16 val)
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{
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u16 tmp_val;
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if (cmd >= 0 && cmd < RTC_SPAR_NUM) {
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hal_rtc_xinfo("%s: cmd[%d], set rg[0x%x, 0x%x , %d] = 0x%x\n",
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__func__, cmd,
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rtc_spare_reg[cmd][RTC_REG],
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rtc_spare_reg[cmd][RTC_MASK],
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rtc_spare_reg[cmd][RTC_SHIFT], val);
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tmp_val =
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rtc_read(rtc_spare_reg[cmd][RTC_REG]) &
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~(rtc_spare_reg[cmd][RTC_MASK] <<
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rtc_spare_reg[cmd][RTC_SHIFT]);
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rtc_write(rtc_spare_reg[cmd][RTC_REG],
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tmp_val | ((val & rtc_spare_reg[cmd][RTC_MASK]) <<
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rtc_spare_reg[cmd][RTC_SHIFT]));
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rtc_write_trigger();
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}
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}
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u16 hal_rtc_get_spare_register(enum rtc_spare_enum cmd)
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{
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u16 tmp_val;
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if (cmd >= 0 && cmd < RTC_SPAR_NUM) {
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tmp_val = rtc_read(rtc_spare_reg[cmd][RTC_REG]);
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tmp_val =
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(tmp_val >> rtc_spare_reg[cmd][RTC_SHIFT]) &
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rtc_spare_reg[cmd][RTC_MASK];
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hal_rtc_xinfo("%s: cmd[%d], get rg[0x%x, 0x%x , %d] = 0x%x\n",
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__func__, cmd,
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rtc_spare_reg[cmd][RTC_REG],
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rtc_spare_reg[cmd][RTC_MASK],
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rtc_spare_reg[cmd][RTC_SHIFT], tmp_val);
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return tmp_val;
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}
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return 0;
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}
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static void rtc_get_tick(struct rtc_time *tm)
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{
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tm->tm_sec = rtc_read(RTC_TC_SEC);
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tm->tm_min = rtc_read(RTC_TC_MIN);
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tm->tm_hour = rtc_read(RTC_TC_HOU);
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tm->tm_mday = rtc_read(RTC_TC_DOM);
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tm->tm_mon = rtc_read(RTC_TC_MTH) & RTC_TC_MTH_MASK;
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tm->tm_year = rtc_read(RTC_TC_YEA);
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}
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void hal_rtc_get_tick_time(struct rtc_time *tm)
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{
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u16 bbpu;
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bbpu = rtc_read(RTC_BBPU) | RTC_BBPU_KEY | RTC_BBPU_RELOAD;
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rtc_write(RTC_BBPU, bbpu);
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rtc_write_trigger();
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rtc_get_tick(tm);
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bbpu = rtc_read(RTC_BBPU) | RTC_BBPU_KEY | RTC_BBPU_RELOAD;
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rtc_write(RTC_BBPU, bbpu);
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rtc_write_trigger();
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if (rtc_read(RTC_TC_SEC) < tm->tm_sec) { /* SEC has carried */
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rtc_get_tick(tm);
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}
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}
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void hal_rtc_set_tick_time(struct rtc_time *tm)
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{
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rtc_write(RTC_TC_YEA, tm->tm_year);
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rtc_write(RTC_TC_MTH, tm->tm_mon);
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rtc_write(RTC_TC_DOM, tm->tm_mday);
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rtc_write(RTC_TC_HOU, tm->tm_hour);
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rtc_write(RTC_TC_MIN, tm->tm_min);
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rtc_write(RTC_TC_SEC, tm->tm_sec);
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rtc_write_trigger();
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}
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void hal_rtc_get_alarm_time(struct rtc_time *tm)
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{
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tm->tm_sec = rtc_read(RTC_AL_SEC) & RTC_AL_SEC_MASK;
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tm->tm_min = rtc_read(RTC_AL_MIN) & RTC_AL_MIN_MASK;
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tm->tm_hour = rtc_read(RTC_AL_HOU) & RTC_AL_HOU_MASK;
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tm->tm_mday = rtc_read(RTC_AL_DOM) & RTC_AL_DOM_MASK;
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tm->tm_mon = rtc_read(RTC_AL_MTH) & RTC_AL_MTH_MASK;
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tm->tm_year = rtc_read(RTC_AL_YEA) & RTC_AL_YEA_MASK;
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}
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void hal_rtc_set_alarm_time(struct rtc_time *tm)
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{
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hal_rtc_xinfo("mon = %d, day = %d, hour = %d\n",
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(rtc_read(RTC_AL_MTH) & ~(RTC_AL_MTH_MASK)) | tm->tm_mon,
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(rtc_read(RTC_AL_DOM) & ~(RTC_AL_DOM_MASK)) | tm->tm_mday,
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(rtc_read(RTC_AL_HOU) & ~(RTC_AL_HOU_MASK)) | tm->tm_hour);
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rtc_write(RTC_AL_YEA,
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(rtc_read(RTC_AL_YEA) & ~(RTC_AL_YEA_MASK)) |
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(tm->tm_year & RTC_AL_YEA_MASK));
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rtc_write(RTC_AL_MTH,
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(rtc_read(RTC_AL_MTH) & ~(RTC_AL_MTH_MASK)) |
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(tm->tm_mon & RTC_AL_MTH_MASK));
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rtc_write(RTC_AL_DOM,
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(rtc_read(RTC_AL_DOM) & ~(RTC_AL_DOM_MASK)) |
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(tm->tm_mday & RTC_AL_DOM_MASK));
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rtc_write(RTC_AL_HOU,
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(rtc_read(RTC_AL_HOU) & ~(RTC_AL_HOU_MASK)) |
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(tm->tm_hour & RTC_AL_HOU_MASK));
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rtc_write(RTC_AL_MIN,
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(rtc_read(RTC_AL_MIN) & ~(RTC_AL_MIN_MASK)) |
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(tm->tm_min & RTC_AL_MIN_MASK));
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rtc_write(RTC_AL_SEC,
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(rtc_read(RTC_AL_SEC) & ~(RTC_AL_SEC_MASK)) |
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(tm->tm_sec & RTC_AL_SEC_MASK));
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rtc_write(RTC_AL_MASK, RTC_AL_MASK_DOW); /* mask DOW */
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rtc_write_trigger();
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}
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void hal_rtc_save_pwron_alarm(void)
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{
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rtc_write(RTC_PDN1, rtc_read(RTC_PDN1) & (~RTC_PDN1_PWRON_TIME));
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rtc_write(RTC_PDN2, rtc_read(RTC_PDN2) | RTC_PDN2_PWRON_ALARM);
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rtc_write_trigger();
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}
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void hal_rtc_get_pwron_alarm_time(struct rtc_time *tm)
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{
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tm->tm_sec =
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(rtc_read(RTC_PWRON_SEC) & RTC_PWRON_SEC_MASK) >>
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RTC_PWRON_SEC_SHIFT;
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tm->tm_min =
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(rtc_read(RTC_PWRON_MIN) & RTC_PWRON_MIN_MASK) >>
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RTC_PWRON_MIN_SHIFT;
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tm->tm_hour =
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(rtc_read(RTC_PWRON_HOU) & RTC_PWRON_HOU_MASK) >>
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RTC_PWRON_HOU_SHIFT;
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tm->tm_mday =
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(rtc_read(RTC_PWRON_DOM) & RTC_PWRON_DOM_MASK) >>
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RTC_PWRON_DOM_SHIFT;
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tm->tm_mon =
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(rtc_read(RTC_PWRON_MTH) & RTC_PWRON_MTH_MASK) >>
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RTC_PWRON_MTH_SHIFT;
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tm->tm_year =
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(rtc_read(RTC_PWRON_YEA) & RTC_PWRON_YEA_MASK) >>
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RTC_PWRON_YEA_SHIFT;
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}
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void hal_rtc_set_pwron_alarm_time(struct rtc_time *tm)
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{
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rtc_write(RTC_PWRON_YEA,
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(rtc_read(RTC_PWRON_YEA) & ~(RTC_PWRON_YEA_MASK))
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| ((tm->tm_year << RTC_PWRON_YEA_SHIFT) &
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RTC_PWRON_YEA_MASK));
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rtc_write_trigger();
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rtc_write(RTC_PWRON_MTH,
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(rtc_read(RTC_PWRON_MTH) & ~(RTC_PWRON_MTH_MASK))
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| ((tm->tm_mon << RTC_PWRON_MTH_SHIFT) & RTC_PWRON_MTH_MASK));
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rtc_write_trigger();
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rtc_write(RTC_PWRON_DOM,
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(rtc_read(RTC_PWRON_DOM) & ~(RTC_PWRON_DOM_MASK))
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| ((tm->tm_mday << RTC_PWRON_DOM_SHIFT) &
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RTC_PWRON_DOM_MASK));
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rtc_write_trigger();
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rtc_write(RTC_PWRON_HOU,
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(rtc_read(RTC_PWRON_HOU) & ~(RTC_PWRON_HOU_MASK))
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| ((tm->tm_hour << RTC_PWRON_HOU_SHIFT) &
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RTC_PWRON_HOU_MASK));
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rtc_write_trigger();
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rtc_write(RTC_PWRON_MIN,
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(rtc_read(RTC_PWRON_MIN) & ~(RTC_PWRON_MIN_MASK))
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| ((tm->tm_min << RTC_PWRON_MIN_SHIFT) & RTC_PWRON_MIN_MASK));
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rtc_write_trigger();
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rtc_write(RTC_PWRON_SEC,
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(rtc_read(RTC_PWRON_SEC) & ~(RTC_PWRON_SEC_MASK))
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| ((tm->tm_sec << RTC_PWRON_SEC_SHIFT) & RTC_PWRON_SEC_MASK));
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rtc_write_trigger();
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}
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void hal_rtc_read_rg(void)
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{
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u16 irqen, pdn1;
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irqen = rtc_read(RTC_IRQ_EN);
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pdn1 = rtc_read(RTC_PDN1);
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hal_rtc_xinfo("RTC_IRQ_EN = 0x%x, RTC_PDN1 = 0x%x\n", irqen, pdn1);
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}
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#ifndef USER_BUILD_KERNEL
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void rtc_lp_exception(void)
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{
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u16 bbpu, irqsta, irqen, osc32;
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u16 pwrkey1, pwrkey2, prot, con, sec1, sec2;
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bbpu = rtc_read(RTC_BBPU);
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irqsta = rtc_read(RTC_IRQ_STA);
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irqen = rtc_read(RTC_IRQ_EN);
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osc32 = rtc_read(RTC_OSC32CON);
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pwrkey1 = rtc_read(RTC_POWERKEY1);
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pwrkey2 = rtc_read(RTC_POWERKEY2);
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prot = rtc_read(RTC_PROT);
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con = rtc_read(RTC_CON);
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sec1 = rtc_read(RTC_TC_SEC);
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mdelay(2000);
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sec2 = rtc_read(RTC_TC_SEC);
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pr_emerg("!!! 32K WAS STOPPED !!!\n"
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"RTC_BBPU = 0x%x\n"
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"RTC_IRQ_STA = 0x%x\n"
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"RTC_IRQ_EN = 0x%x\n"
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"RTC_OSC32CON = 0x%x\n"
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"RTC_POWERKEY1 = 0x%x\n"
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"RTC_POWERKEY2 = 0x%x\n"
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"RTC_PROT = 0x%x\n"
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"RTC_CON = 0x%x\n"
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"RTC_TC_SEC = %02d\n"
|
||
|
|
"RTC_TC_SEC = %02d\n",
|
||
|
|
bbpu, irqsta, irqen, osc32, pwrkey1, pwrkey2, prot, con, sec1,
|
||
|
|
sec2);
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /*#if defined(CONFIG_MTK_RTC) */
|