528 lines
14 KiB
C
528 lines
14 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#define LOG_TAG "IRQ"
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#include "ddp_log.h"
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#include "ddp_debug.h"
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#include <linux/interrupt.h>
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#include <linux/wait.h>
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#include <linux/spinlock.h>
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#include <linux/kthread.h>
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#include <linux/timer.h>
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#include <linux/sched/clock.h>
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/* #include <mach/mt_irq.h> */
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#include "ddp_reg.h"
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#include "ddp_irq.h"
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#include "ddp_aal.h"
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#include "ddp_drv.h"
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#include "disp_helper.h"
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#include "ddp_dsi.h"
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#include "disp_drv_log.h"
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/* IRQ log print kthread */
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static struct task_struct *disp_irq_log_task;
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static wait_queue_head_t disp_irq_log_wq;
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static int disp_irq_log_module;
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static int irq_init;
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static unsigned int cnt_rdma_underflow[2];
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static unsigned int cnt_rdma_abnormal[2];
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static unsigned int cnt_ovl_underflow[OVL_NUM];
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static unsigned int cnt_wdma_underflow[2];
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unsigned long long rdma_start_time[2] = { 0 };
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unsigned long long rdma_end_time[2] = { 0 };
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#define DISP_MAX_IRQ_CALLBACK 10
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static DDP_IRQ_CALLBACK
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irq_module_callback_table[DISP_MODULE_NUM][DISP_MAX_IRQ_CALLBACK];
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static DDP_IRQ_CALLBACK irq_callback_table[DISP_MAX_IRQ_CALLBACK];
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atomic_t ESDCheck_byCPU = ATOMIC_INIT(0);
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/* dsi read by cpu should keep esd_check_bycmdq = 0. */
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/* dsi read by cmdq should keep esd_check_bycmdq = 1. */
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static atomic_t esd_check_bycmdq = ATOMIC_INIT(1);
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void disp_irq_esd_cust_bycmdq(int enable)
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{
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atomic_set(&esd_check_bycmdq, enable);
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}
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int disp_irq_esd_cust_get(void)
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{
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return atomic_read(&esd_check_bycmdq);
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}
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int disp_register_irq_callback(DDP_IRQ_CALLBACK cb)
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{
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int i = 0;
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_callback_table[i] == cb)
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break;
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}
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if (i < DISP_MAX_IRQ_CALLBACK)
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return 0;
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_callback_table[i] == NULL)
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break;
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}
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if (i == DISP_MAX_IRQ_CALLBACK) {
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DDPERR("not enough irq callback entries for module\n");
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return -1;
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}
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DDPMSG("register callback on %d\n", i);
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irq_callback_table[i] = cb;
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return 0;
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}
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int disp_unregister_irq_callback(DDP_IRQ_CALLBACK cb)
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{
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int i;
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_callback_table[i] == cb) {
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irq_callback_table[i] = NULL;
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break;
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}
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}
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if (i == DISP_MAX_IRQ_CALLBACK) {
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DDPERR("Try to unregister callback function %p which was not registered\n",
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cb);
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return -1;
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}
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return 0;
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}
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int disp_register_module_irq_callback(enum DISP_MODULE_ENUM module,
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DDP_IRQ_CALLBACK cb)
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{
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int i;
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if (module >= DISP_MODULE_NUM) {
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DDPERR("Register IRQ with invalid module ID. module=%d\n",
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module);
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return -1;
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}
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if (cb == NULL) {
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DDPERR("Register IRQ with invalid cb.\n");
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return -1;
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}
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_module_callback_table[module][i] == cb)
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break;
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}
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if (i < DISP_MAX_IRQ_CALLBACK)
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return 0;
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_module_callback_table[module][i] == NULL)
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break;
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}
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if (i == DISP_MAX_IRQ_CALLBACK) {
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DDPERR("No enough callback entries for module %d.\n", module);
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return -1;
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}
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irq_module_callback_table[module][i] = cb;
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return 0;
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}
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int disp_unregister_module_irq_callback(enum DISP_MODULE_ENUM module,
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DDP_IRQ_CALLBACK cb)
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{
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int i;
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_module_callback_table[module][i] == cb) {
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irq_module_callback_table[module][i] = NULL;
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break;
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}
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}
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if (i == DISP_MAX_IRQ_CALLBACK) {
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DDPERR("Try to unregister callback function with was not registered. module=%d cb=%p\n",
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module, cb);
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return -1;
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}
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return 0;
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}
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void disp_invoke_irq_callbacks(enum DISP_MODULE_ENUM module, unsigned int param)
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{
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int i;
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for (i = 0; i < DISP_MAX_IRQ_CALLBACK; i++) {
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if (irq_callback_table[i])
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irq_callback_table[i](module, param);
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if (irq_module_callback_table[module][i])
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irq_module_callback_table[module][i](module, param);
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}
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}
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/* TODO: move each irq to module driver */
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unsigned int rdma_start_irq_cnt[2] = {0, 0};
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unsigned int rdma_done_irq_cnt[2] = {0, 0};
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unsigned int rdma_underflow_irq_cnt[2] = {0, 0};
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unsigned int rdma_targetline_irq_cnt[2] = {0, 0};
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irqreturn_t disp_irq_handler(int irq, void *dev_id)
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{
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enum DISP_MODULE_ENUM module = DISP_MODULE_UNKNOWN;
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unsigned int reg_val = 0;
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unsigned int index = 0;
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unsigned int reg_temp_val = 0;
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if (0)
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pr_debug("%s, irq = %d\n", __func__, irq);
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if (irq == ddp_get_module_irq(DISP_MODULE_DSI0) ||
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irq == ddp_get_module_irq(DISP_MODULE_DSI1)) {
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if (ddp_get_module_irq(DISP_MODULE_DSI0) == irq) {
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index = 0;
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module = DISP_MODULE_DSI0;
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if (0)
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pr_debug("dsi0, ");
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} else if (ddp_get_module_irq(DISP_MODULE_DSI1) == irq) {
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index = 1;
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module = DISP_MODULE_DSI1;
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if (0)
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pr_debug("dsi1, ");
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}
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if (module == DISP_MODULE_DSI0)
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reg_val = (DISP_REG_GET(DISPSYS_DSI0_BASE + 0xC) &
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0xffff);
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else
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reg_val = (DISP_REG_GET(DISPSYS_DSI1_BASE + 0xC) &
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0xffff);
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DDPIRQ("%s irq_status = 0x%x\n", ddp_get_module_name(module),
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reg_val);
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reg_temp_val = reg_val;
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/*
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* rd_rdy don't clear and wait for ESD &
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* Read LCM will clear the bit.
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*/
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if (disp_irq_esd_cust_get() == 1)
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reg_temp_val = reg_val & 0xfffe;
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if (module == DISP_MODULE_DSI0)
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DISP_CPU_REG_SET(DISPSYS_DSI0_BASE + 0xC,
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~reg_temp_val);
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else
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DISP_CPU_REG_SET(DISPSYS_DSI1_BASE + 0xC,
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~reg_temp_val);
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} else if (irq == ddp_get_module_irq(DISP_MODULE_OVL0) ||
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irq == ddp_get_module_irq(DISP_MODULE_OVL0_2L) ||
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irq == ddp_get_module_irq(DISP_MODULE_OVL1_2L)) {
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module = disp_irq_to_module(irq);
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index = ovl_to_index(module);
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reg_val = DISP_REG_GET(DISP_REG_OVL_INTSTA +
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ovl_base_addr(module));
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DDPIRQ("%s irq_status = 0x%x\n", ddp_get_module_name(module),
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reg_val);
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if (0)
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pr_debug("%s, irq_status = 0x%x\n",
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ddp_get_module_name(module), reg_val);
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if (reg_val & (1 << 0))
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DDPIRQ("IRQ: %s reg commit!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 1))
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DDPIRQ("IRQ: %s frame done!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 2))
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DDPERR("IRQ: %s frame underflow! cnt=%d\n",
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ddp_get_module_name(module),
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cnt_ovl_underflow[index]++);
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if (reg_val & (1 << 3))
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DDPIRQ("IRQ: %s sw reset done\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 4))
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DDPERR("IRQ: %s hw reset done\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 5))
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DDPERR("IRQ: %s-L0 not complete until EOF!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 6))
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DDPERR("IRQ: %s-L1 not complete until EOF!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 7))
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DDPERR("IRQ: %s-L2 not complete until EOF!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 8))
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DDPERR("IRQ: %s-L3 not complete until EOF!\n",
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ddp_get_module_name(module));
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#if 0
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/* we don't care ovl underflow, it's not error */
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if (reg_val & (1 << 9))
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DDPERR("IRQ: %s-L0 fifo underflow!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 10))
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DDPERR("IRQ: %s-L1 fifo underflow!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 11))
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DDPERR("IRQ: %s-L2 fifo underflow!\n",
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ddp_get_module_name(module));
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if (reg_val & (1 << 12))
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DDPERR("IRQ: %s-L3 fifo underflow!\n",
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ddp_get_module_name(module));
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#endif
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if (reg_val & (1 << 13))
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DDPERR("IRQ: %s abnormal SOF!\n",
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ddp_get_module_name(module));
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DISP_CPU_REG_SET(DISP_REG_OVL_INTSTA + ovl_base_addr(module),
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~reg_val);
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mmprofile_log_ex(ddp_mmp_get_events()->OVL_IRQ[index],
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MMPROFILE_FLAG_PULSE, reg_val, 0);
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if (reg_val & 0x1e0)
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mmprofile_log_ex(ddp_mmp_get_events()->ddp_abnormal_irq,
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MMPROFILE_FLAG_PULSE,
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(index << 16) | reg_val, module);
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} else if (irq == ddp_get_module_irq(DISP_MODULE_WDMA0)) {
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index = 0;
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module = DISP_MODULE_WDMA0;
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reg_val = DISP_REG_GET(DISP_REG_WDMA_INTSTA);
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DDPIRQ("%s irq_status = 0x%x\n", ddp_get_module_name(module),
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reg_val);
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if (reg_val & (1 << 0))
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DDPIRQ("IRQ: WDMA%d frame done!\n", index);
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if (reg_val & (1 << 1)) {
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DDPERR("IRQ: WDMA%d underrun! cnt=%d\n", index,
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cnt_wdma_underflow[index]++);
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disp_irq_log_module |= 1 << module;
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}
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/* clear intr */
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DISP_CPU_REG_SET(DISP_REG_WDMA_INTSTA, ~reg_val);
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mmprofile_log_ex(ddp_mmp_get_events()->WDMA_IRQ[index],
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MMPROFILE_FLAG_PULSE, reg_val,
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DISP_REG_GET(DISP_REG_WDMA_CLIP_SIZE));
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if (reg_val & 0x2)
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mmprofile_log_ex(ddp_mmp_get_events()->ddp_abnormal_irq,
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MMPROFILE_FLAG_PULSE,
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(cnt_wdma_underflow[index] << 24) |
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(index << 16) | reg_val, module);
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} else if (irq == ddp_get_module_irq(DISP_MODULE_RDMA0) ||
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irq == ddp_get_module_irq(DISP_MODULE_RDMA1)) {
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if (ddp_get_module_irq(DISP_MODULE_RDMA0) == irq) {
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index = 0;
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module = DISP_MODULE_RDMA0;
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if (0)
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pr_debug("rdma0, ");
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} else if (ddp_get_module_irq(DISP_MODULE_RDMA1) == irq) {
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index = 1;
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module = DISP_MODULE_RDMA1;
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if (0)
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pr_debug("rdma1, ");
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}
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reg_val = DISP_REG_GET(DISP_REG_RDMA_INT_STATUS +
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index * DISP_RDMA_INDEX_OFFSET);
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DDPIRQ("%s irq_status = 0x%x\n", ddp_get_module_name(module),
|
||
|
|
reg_val);
|
||
|
|
|
||
|
|
if (reg_val & (1 << 0))
|
||
|
|
DDPIRQ("IRQ: RDMA%d reg update done!\n", index);
|
||
|
|
|
||
|
|
if (reg_val & (1 << 2)) {
|
||
|
|
mmprofile_log_ex(
|
||
|
|
ddp_mmp_get_events()->SCREEN_UPDATE[index],
|
||
|
|
MMPROFILE_FLAG_END, reg_val,
|
||
|
|
DISP_REG_GET(DISPSYS_DSI0_BASE + 0x4));
|
||
|
|
rdma_end_time[index] = sched_clock();
|
||
|
|
DDPIRQ("IRQ: RDMA%d frame done!\n", index);
|
||
|
|
rdma_done_irq_cnt[index]++;
|
||
|
|
}
|
||
|
|
if (reg_val & (1 << 1)) {
|
||
|
|
mmprofile_log_ex(
|
||
|
|
ddp_mmp_get_events()->SCREEN_UPDATE[index],
|
||
|
|
MMPROFILE_FLAG_START, reg_val,
|
||
|
|
DISP_REG_GET(DISPSYS_DSI0_BASE + 0x4));
|
||
|
|
rdma_start_time[index] = sched_clock();
|
||
|
|
DDPIRQ("IRQ: RDMA%d frame start!\n", index);
|
||
|
|
rdma_start_irq_cnt[index]++;
|
||
|
|
}
|
||
|
|
if (reg_val & (1 << 3)) {
|
||
|
|
mmprofile_log_ex(
|
||
|
|
ddp_mmp_get_events()->SCREEN_UPDATE[index],
|
||
|
|
MMPROFILE_FLAG_PULSE, reg_val,
|
||
|
|
DISP_REG_GET(DISPSYS_DSI0_BASE + 0x4));
|
||
|
|
|
||
|
|
DDPERR("IRQ: RDMA%d abnormal eof! cnt=%d\n", index,
|
||
|
|
cnt_rdma_abnormal[index]++);
|
||
|
|
disp_irq_log_module |= 1 << module;
|
||
|
|
}
|
||
|
|
if (reg_val & (1 << 4)) {
|
||
|
|
|
||
|
|
mmprofile_log_ex(
|
||
|
|
ddp_mmp_get_events()->SCREEN_UPDATE[index],
|
||
|
|
MMPROFILE_FLAG_PULSE, reg_val, 1);
|
||
|
|
|
||
|
|
DDPMSG("rdma%d, pix(%d,%d,%d,%d)\n", index,
|
||
|
|
DISP_REG_GET(DISP_REG_RDMA_IN_P_CNT +
|
||
|
|
DISP_RDMA_INDEX_OFFSET * index),
|
||
|
|
DISP_REG_GET(DISP_REG_RDMA_IN_LINE_CNT +
|
||
|
|
DISP_RDMA_INDEX_OFFSET * index),
|
||
|
|
DISP_REG_GET(DISP_REG_RDMA_OUT_P_CNT +
|
||
|
|
DISP_RDMA_INDEX_OFFSET * index),
|
||
|
|
DISP_REG_GET(DISP_REG_RDMA_OUT_LINE_CNT +
|
||
|
|
DISP_RDMA_INDEX_OFFSET * index));
|
||
|
|
DDPERR("IRQ: RDMA%d underflow! cnt=%d\n", index,
|
||
|
|
cnt_rdma_underflow[index]++);
|
||
|
|
if (disp_helper_get_option(DISP_OPT_RDMA_UNDERFLOW_AEE))
|
||
|
|
DDPAEE("RDMA%d underflow!cnt=%d\n", index,
|
||
|
|
cnt_rdma_underflow[index]++);
|
||
|
|
disp_irq_log_module |= 1 << module;
|
||
|
|
rdma_underflow_irq_cnt[index]++;
|
||
|
|
}
|
||
|
|
if (reg_val & (1 << 5)) {
|
||
|
|
DDPIRQ("IRQ: RDMA%d target line!\n", index);
|
||
|
|
rdma_targetline_irq_cnt[index]++;
|
||
|
|
}
|
||
|
|
if (reg_val & (1 << 7))
|
||
|
|
DDPIRQ("IRQ: RDMA%d abnormal sof!\n", index);
|
||
|
|
/* clear intr */
|
||
|
|
DISP_CPU_REG_SET(DISP_REG_RDMA_INT_STATUS +
|
||
|
|
index * DISP_RDMA_INDEX_OFFSET, ~reg_val);
|
||
|
|
mmprofile_log_ex(ddp_mmp_get_events()->RDMA_IRQ[index],
|
||
|
|
MMPROFILE_FLAG_PULSE, reg_val, 0);
|
||
|
|
if (reg_val & 0x18)
|
||
|
|
mmprofile_log_ex(ddp_mmp_get_events()->ddp_abnormal_irq,
|
||
|
|
MMPROFILE_FLAG_PULSE,
|
||
|
|
(rdma_underflow_irq_cnt[index] << 24) |
|
||
|
|
(index << 16) | reg_val, module);
|
||
|
|
} else if (irq == ddp_get_module_irq(DISP_MODULE_MUTEX)) {
|
||
|
|
/* mutex0: primary disp */
|
||
|
|
/* mutex1: sub disp */
|
||
|
|
/* mutex2: aal */
|
||
|
|
unsigned int m_id = 0;
|
||
|
|
unsigned int reg_val1 = 0;
|
||
|
|
|
||
|
|
module = DISP_MODULE_MUTEX;
|
||
|
|
reg_val = DISP_REG_GET(DISP_REG_CONFIG_MUTEX_INTSTA) &
|
||
|
|
DISP_MUTEX_INT_MSK;
|
||
|
|
reg_val1 = DISP_REG_GET(DISP_REG_CONFIG_MUTEX_INTSTA_1);
|
||
|
|
|
||
|
|
DDPIRQ("%s, irq_status = 0x%x, irq_status1 = 0x%x\n",
|
||
|
|
ddp_get_module_name(module), reg_val, reg_val1);
|
||
|
|
|
||
|
|
for (m_id = 0; m_id < DISP_MUTEX_DDP_COUNT; m_id++) {
|
||
|
|
if (reg_val & (0x1 << m_id)) {
|
||
|
|
DDPIRQ("IRQ: mutex%d sof!\n", m_id);
|
||
|
|
mmprofile_log_ex(
|
||
|
|
ddp_mmp_get_events()->MUTEX_IRQ[m_id],
|
||
|
|
MMPROFILE_FLAG_PULSE, reg_val, 0);
|
||
|
|
}
|
||
|
|
if (reg_val & (0x1 << (m_id + DISP_MUTEX_TOTAL))) {
|
||
|
|
DDPIRQ("IRQ: mutex%d eof!\n", m_id);
|
||
|
|
mmprofile_log_ex(
|
||
|
|
ddp_mmp_get_events()->MUTEX_IRQ[m_id],
|
||
|
|
MMPROFILE_FLAG_PULSE, reg_val, 1);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
DISP_CPU_REG_SET(DISP_REG_CONFIG_MUTEX_INTSTA, ~reg_val);
|
||
|
|
DISP_CPU_REG_SET(DISP_REG_CONFIG_MUTEX_INTSTA_1, ~reg_val1);
|
||
|
|
} else if (irq == ddp_get_module_irq(DISP_MODULE_AAL0)) {
|
||
|
|
module = DISP_MODULE_AAL0;
|
||
|
|
reg_val = DISP_REG_GET(DISP_AAL_INTSTA);
|
||
|
|
disp_aal_on_end_of_frame();
|
||
|
|
} else if (irq == ddp_get_module_irq(DISP_MODULE_CCORR0)) {
|
||
|
|
module = DISP_MODULE_CCORR0;
|
||
|
|
reg_val = DISP_REG_GET(DISP_REG_CCORR_INTSTA);
|
||
|
|
disp_ccorr_on_end_of_frame();
|
||
|
|
} else if (irq == ddp_get_module_irq(DISP_MODULE_CONFIG)) {
|
||
|
|
/* MMSYS error intr */
|
||
|
|
reg_val = DISP_REG_GET(DISP_REG_CONFIG_MMSYS_INTSTA) & 0x7;
|
||
|
|
if (reg_val & (1 << 0))
|
||
|
|
DDPERR("MMSYS to MFG APB TX Error, MMSYS clock off but MFG clock on!\n");
|
||
|
|
|
||
|
|
if (reg_val & (1 << 1))
|
||
|
|
DDPERR("MMSYS to MJC APB TX Error, MMSYS clock off but MJC clock on!\n");
|
||
|
|
|
||
|
|
if (reg_val & (1 << 2))
|
||
|
|
DDPERR("PWM APB TX Error!\n");
|
||
|
|
|
||
|
|
DISP_CPU_REG_SET(DISP_REG_CONFIG_MMSYS_INTSTA, ~reg_val);
|
||
|
|
} else {
|
||
|
|
module = DISP_MODULE_UNKNOWN;
|
||
|
|
reg_val = 0;
|
||
|
|
DDPERR("invalid irq=%d\n ", irq);
|
||
|
|
}
|
||
|
|
|
||
|
|
disp_invoke_irq_callbacks(module, reg_val);
|
||
|
|
if (disp_irq_log_module != 0)
|
||
|
|
wake_up_interruptible(&disp_irq_log_wq);
|
||
|
|
|
||
|
|
mmprofile_log_ex(ddp_mmp_get_events()->DDP_IRQ, MMPROFILE_FLAG_END, irq,
|
||
|
|
reg_val);
|
||
|
|
return IRQ_HANDLED;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int disp_irq_log_kthread_func(void *data)
|
||
|
|
{
|
||
|
|
unsigned int i = 0;
|
||
|
|
|
||
|
|
while (1) {
|
||
|
|
wait_event_interruptible(disp_irq_log_wq, disp_irq_log_module);
|
||
|
|
DDPMSG("%s: dump intr register: disp_irq_log_module=%d\n",
|
||
|
|
__func__, disp_irq_log_module);
|
||
|
|
|
||
|
|
for (i = 0; i < DISP_MODULE_NUM; i++) {
|
||
|
|
if (disp_irq_log_module & (1 << i))
|
||
|
|
ddp_dump_reg(i);
|
||
|
|
}
|
||
|
|
disp_irq_log_module = 0;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int disp_init_irq(void)
|
||
|
|
{
|
||
|
|
if (irq_init)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
irq_init = 1;
|
||
|
|
DDPMSG("%s\n", __func__);
|
||
|
|
|
||
|
|
/* create irq log thread */
|
||
|
|
init_waitqueue_head(&disp_irq_log_wq);
|
||
|
|
disp_irq_log_task = kthread_create(disp_irq_log_kthread_func,
|
||
|
|
NULL, "ddp_irq_log_kthread");
|
||
|
|
if (IS_ERR(disp_irq_log_task))
|
||
|
|
DDPERR(" can not create disp_irq_log_task kthread\n");
|
||
|
|
|
||
|
|
/* wake_up_process(disp_irq_log_task); */
|
||
|
|
return 0;
|
||
|
|
}
|