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Initial commit: Linux kernel 4.19 for Unplugged OS

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ziv committed 2025-10-06 13:52:42 +00:00
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include/misc/altera.h
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/*
* altera.h
*
* altera FPGA driver
*
* Copyright (C) Altera Corporation 1998-2001
* Copyright (C) 2010 NetUP Inc.
* Copyright (C) 2010 Igor M. Liplianin <liplianin@netup.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _ALTERA_H_
#define _ALTERA_H_
struct altera_config {
void *dev;
u8 *action;
int (*jtag_io) (void *dev, int tms, int tdi, int tdo);
};
#if defined(CONFIG_ALTERA_STAPL) || \
(defined(CONFIG_ALTERA_STAPL_MODULE) && defined(MODULE))
extern int altera_init(struct altera_config *config, const struct firmware *fw);
#else
static inline int altera_init(struct altera_config *config,
const struct firmware *fw)
{
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
return 0;
}
#endif /* CONFIG_ALTERA_STAPL */
#endif /* _ALTERA_H_ */
include/misc/charlcd.h
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/*
* Character LCD driver for Linux
*
* Copyright (C) 2000-2008, Willy Tarreau <w@1wt.eu>
* Copyright (C) 2016-2017 Glider bvba
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
struct charlcd {
const struct charlcd_ops *ops;
const unsigned char *char_conv; /* Optional */
int ifwidth; /* 4-bit or 8-bit (default) */
int height;
int width;
int bwidth; /* Default set by charlcd_alloc() */
int hwidth; /* Default set by charlcd_alloc() */
void *drvdata; /* Set by charlcd_alloc() */
};
struct charlcd_ops {
/* Required */
void (*write_cmd)(struct charlcd *lcd, int cmd);
void (*write_data)(struct charlcd *lcd, int data);
/* Optional */
void (*write_cmd_raw4)(struct charlcd *lcd, int cmd); /* 4-bit only */
void (*clear_fast)(struct charlcd *lcd);
void (*backlight)(struct charlcd *lcd, int on);
};
struct charlcd *charlcd_alloc(unsigned int drvdata_size);
int charlcd_register(struct charlcd *lcd);
int charlcd_unregister(struct charlcd *lcd);
void charlcd_poke(struct charlcd *lcd);
include/misc/cxl-base.h
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/*
* Copyright 2014 IBM Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _MISC_CXL_BASE_H
#define _MISC_CXL_BASE_H
#ifdef CONFIG_CXL_BASE
#define CXL_IRQ_RANGES 4
struct cxl_irq_ranges {
irq_hw_number_t offset[CXL_IRQ_RANGES];
irq_hw_number_t range[CXL_IRQ_RANGES];
};
extern atomic_t cxl_use_count;
static inline bool cxl_ctx_in_use(void)
{
return (atomic_read(&cxl_use_count) != 0);
}
static inline void cxl_ctx_get(void)
{
atomic_inc(&cxl_use_count);
}
static inline void cxl_ctx_put(void)
{
atomic_dec(&cxl_use_count);
}
struct cxl_afu *cxl_afu_get(struct cxl_afu *afu);
void cxl_afu_put(struct cxl_afu *afu);
void cxl_slbia(struct mm_struct *mm);
#else /* CONFIG_CXL_BASE */
static inline bool cxl_ctx_in_use(void) { return false; }
static inline struct cxl_afu *cxl_afu_get(struct cxl_afu *afu) { return NULL; }
static inline void cxl_afu_put(struct cxl_afu *afu) {}
static inline void cxl_slbia(struct mm_struct *mm) {}
#endif /* CONFIG_CXL_BASE */
#endif
include/misc/cxl.h
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/*
* Copyright 2015 IBM Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _MISC_CXL_H
#define _MISC_CXL_H
#include <linux/pci.h>
#include <linux/poll.h>
#include <linux/interrupt.h>
#include <uapi/misc/cxl.h>
/*
* This documents the in kernel API for driver to use CXL. It allows kernel
* drivers to bind to AFUs using an AFU configuration record exposed as a PCI
* configuration record.
*
* This API enables control over AFU and contexts which can't be part of the
* generic PCI API. This API is agnostic to the actual AFU.
*/
/* Get the AFU associated with a pci_dev */
struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev);
/* Get the AFU conf record number associated with a pci_dev */
unsigned int cxl_pci_to_cfg_record(struct pci_dev *dev);
/*
* Context lifetime overview:
*
* An AFU context may be inited and then started and stoppped multiple times
* before it's released. ie.
* - cxl_dev_context_init()
* - cxl_start_context()
* - cxl_stop_context()
* - cxl_start_context()
* - cxl_stop_context()
* ...repeat...
* - cxl_release_context()
* Once released, a context can't be started again.
*
* One context is inited by the cxl driver for every pci_dev. This is to be
* used as a default kernel context. cxl_get_context() will get this
* context. This context will be released by PCI hot unplug, so doesn't need to
* be released explicitly by drivers.
*
* Additional kernel contexts may be inited using cxl_dev_context_init().
* These must be released using cxl_context_detach().
*
* Once a context has been inited, IRQs may be configured. Firstly these IRQs
* must be allocated (cxl_allocate_afu_irqs()), then individually mapped to
* specific handlers (cxl_map_afu_irq()).
*
* These IRQs can be unmapped (cxl_unmap_afu_irq()) and finally released
* (cxl_free_afu_irqs()).
*
* The AFU can be reset (cxl_afu_reset()). This will cause the PSL/AFU
* hardware to lose track of all contexts. It's upto the caller of
* cxl_afu_reset() to restart these contexts.
*/
/*
* On pci_enabled_device(), the cxl driver will init a single cxl context for
* use by the driver. It doesn't start this context (as that will likely
* generate DMA traffic for most AFUs).
*
* This gets the default context associated with this pci_dev. This context
* doesn't need to be released as this will be done by the PCI subsystem on hot
* unplug.
*/
struct cxl_context *cxl_get_context(struct pci_dev *dev);
/*
* Allocate and initalise a context associated with a AFU PCI device. This
* doesn't start the context in the AFU.
*/
struct cxl_context *cxl_dev_context_init(struct pci_dev *dev);
/*
* Release and free a context. Context should be stopped before calling.
*/
int cxl_release_context(struct cxl_context *ctx);
/*
* Set and get private data associated with a context. Allows drivers to have a
* back pointer to some useful structure.
*/
int cxl_set_priv(struct cxl_context *ctx, void *priv);
void *cxl_get_priv(struct cxl_context *ctx);
/*
* Allocate AFU interrupts for this context. num=0 will allocate the default
* for this AFU as given in the AFU descriptor. This number doesn't include the
* interrupt 0 (CAIA defines AFU IRQ 0 for page faults). Each interrupt to be
* used must map a handler with cxl_map_afu_irq.
*/
int cxl_allocate_afu_irqs(struct cxl_context *cxl, int num);
/* Free allocated interrupts */
void cxl_free_afu_irqs(struct cxl_context *cxl);
/*
* Map a handler for an AFU interrupt associated with a particular context. AFU
* IRQS numbers start from 1 (CAIA defines AFU IRQ 0 for page faults). cookie
* is private data is that will be provided to the interrupt handler.
*/
int cxl_map_afu_irq(struct cxl_context *cxl, int num,
irq_handler_t handler, void *cookie, char *name);
/* unmap mapped IRQ handlers */
void cxl_unmap_afu_irq(struct cxl_context *cxl, int num, void *cookie);
/*
* Start work on the AFU. This starts an cxl context and associates it with a
* task. task == NULL will make it a kernel context.
*/
int cxl_start_context(struct cxl_context *ctx, u64 wed,
struct task_struct *task);
/*
* Stop a context and remove it from the PSL
*/
int cxl_stop_context(struct cxl_context *ctx);
/* Reset the AFU */
int cxl_afu_reset(struct cxl_context *ctx);
/*
* Set a context as a master context.
* This sets the default problem space area mapped as the full space, rather
* than just the per context area (for slaves).
*/
void cxl_set_master(struct cxl_context *ctx);
/*
* Map and unmap the AFU Problem Space area. The amount and location mapped
* depends on if this context is a master or slave.
*/
void __iomem *cxl_psa_map(struct cxl_context *ctx);
void cxl_psa_unmap(void __iomem *addr);
/* Get the process element for this context */
int cxl_process_element(struct cxl_context *ctx);
/*
* These calls allow drivers to create their own file descriptors and make them
* identical to the cxl file descriptor user API. An example use case:
*
* struct file_operations cxl_my_fops = {};
* ......
* // Init the context
* ctx = cxl_dev_context_init(dev);
* if (IS_ERR(ctx))
* return PTR_ERR(ctx);
* // Create and attach a new file descriptor to my file ops
* file = cxl_get_fd(ctx, &cxl_my_fops, &fd);
* // Start context
* rc = cxl_start_work(ctx, &work.work);
* if (rc) {
* fput(file);
* put_unused_fd(fd);
* return -ENODEV;
* }
* // No error paths after installing the fd
* fd_install(fd, file);
* return fd;
*
* This inits a context, and gets a file descriptor and associates some file
* ops to that file descriptor. If the file ops are blank, the cxl driver will
* fill them in with the default ones that mimic the standard user API. Once
* completed, the file descriptor can be installed. Once the file descriptor is
* installed, it's visible to the user so no errors must occur past this point.
*
* If cxl_fd_release() file op call is installed, the context will be stopped
* and released when the fd is released. Hence the driver won't need to manage
* this itself.
*/
/*
* Take a context and associate it with my file ops. Returns the associated
* file and file descriptor. Any file ops which are blank are filled in by the
* cxl driver with the default ops to mimic the standard API.
*/
struct file *cxl_get_fd(struct cxl_context *ctx, struct file_operations *fops,
int *fd);
/* Get the context associated with this file */
struct cxl_context *cxl_fops_get_context(struct file *file);
/*
* Start a context associated a struct cxl_ioctl_start_work used by the
* standard cxl user API.
*/
int cxl_start_work(struct cxl_context *ctx,
struct cxl_ioctl_start_work *work);
/*
* Export all the existing fops so drivers can use them
*/
int cxl_fd_open(struct inode *inode, struct file *file);
int cxl_fd_release(struct inode *inode, struct file *file);
long cxl_fd_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
int cxl_fd_mmap(struct file *file, struct vm_area_struct *vm);
__poll_t cxl_fd_poll(struct file *file, struct poll_table_struct *poll);
ssize_t cxl_fd_read(struct file *file, char __user *buf, size_t count,
loff_t *off);
/*
* For EEH, a driver may want to assert a PERST will reload the same image
* from flash into the FPGA.
*
* This is a property of the entire adapter, not a single AFU, so drivers
* should set this property with care!
*/
void cxl_perst_reloads_same_image(struct cxl_afu *afu,
bool perst_reloads_same_image);
/*
* Read the VPD for the card where the AFU resides
*/
ssize_t cxl_read_adapter_vpd(struct pci_dev *dev, void *buf, size_t count);
/*
* AFU driver ops allow an AFU driver to create their own events to pass to
* userspace through the file descriptor as a simpler alternative to overriding
* the read() and poll() calls that works with the generic cxl events. These
* events are given priority over the generic cxl events, so they will be
* delivered first if multiple types of events are pending.
*
* The AFU driver must call cxl_context_events_pending() to notify the cxl
* driver that new events are ready to be delivered for a specific context.
* cxl_context_events_pending() will adjust the current count of AFU driver
* events for this context, and wake up anyone waiting on the context wait
* queue.
*
* The cxl driver will then call fetch_event() to get a structure defining
* the size and address of the driver specific event data. The cxl driver
* will build a cxl header with type and process_element fields filled in,
* and header.size set to sizeof(struct cxl_event_header) + data_size.
* The total size of the event is limited to CXL_READ_MIN_SIZE (4K).
*
* fetch_event() is called with a spin lock held, so it must not sleep.
*
* The cxl driver will then deliver the event to userspace, and finally
* call event_delivered() to return the status of the operation, identified
* by cxl context and AFU driver event data pointers.
* 0 Success
* -EFAULT copy_to_user() has failed
* -EINVAL Event data pointer is NULL, or event size is greater than
* CXL_READ_MIN_SIZE.
*/
struct cxl_afu_driver_ops {
struct cxl_event_afu_driver_reserved *(*fetch_event) (
struct cxl_context *ctx);
void (*event_delivered) (struct cxl_context *ctx,
struct cxl_event_afu_driver_reserved *event,
int rc);
};
/*
* Associate the above driver ops with a specific context.
* Reset the current count of AFU driver events.
*/
void cxl_set_driver_ops(struct cxl_context *ctx,
struct cxl_afu_driver_ops *ops);
/* Notify cxl driver that new events are ready to be delivered for context */
void cxl_context_events_pending(struct cxl_context *ctx,
unsigned int new_events);
#endif /* _MISC_CXL_H */
include/misc/cxllib.h
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/*
* Copyright 2017 IBM Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _MISC_CXLLIB_H
#define _MISC_CXLLIB_H
#include <linux/pci.h>
#include <asm/reg.h>
/*
* cxl driver exports a in-kernel 'library' API which can be called by
* other drivers to help interacting with an IBM XSL.
*/
/*
* tells whether capi is supported on the PCIe slot where the
* device is seated
*
* Input:
* dev: device whose slot needs to be checked
* flags: 0 for the time being
*/
bool cxllib_slot_is_supported(struct pci_dev *dev, unsigned long flags);
/*
* Returns the configuration parameters to be used by the XSL or device
*
* Input:
* dev: device, used to find PHB
* Output:
* struct cxllib_xsl_config:
* version
* capi BAR address, i.e. 0x2000000000000-0x2FFFFFFFFFFFF
* capi BAR size
* data send control (XSL_DSNCTL)
* dummy read address (XSL_DRA)
*/
#define CXL_XSL_CONFIG_VERSION1 1
struct cxllib_xsl_config {
u32 version; /* format version for register encoding */
u32 log_bar_size;/* log size of the capi_window */
u64 bar_addr; /* address of the start of capi window */
u64 dsnctl; /* matches definition of XSL_DSNCTL */
u64 dra; /* real address that can be used for dummy read */
};
int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg);
/*
* Activate capi for the pci host bridge associated with the device.
* Can be extended to deactivate once we know how to do it.
* Device must be ready to accept messages from the CAPP unit and
* respond accordingly (TLB invalidates, ...)
*
* PHB is switched to capi mode through calls to skiboot.
* CAPP snooping is activated
*
* Input:
* dev: device whose PHB should switch mode
* mode: mode to switch to i.e. CAPI or PCI
* flags: options related to the mode
*/
enum cxllib_mode {
CXL_MODE_CXL,
CXL_MODE_PCI,
};
#define CXL_MODE_NO_DMA 0
#define CXL_MODE_DMA_TVT0 1
#define CXL_MODE_DMA_TVT1 2
int cxllib_switch_phb_mode(struct pci_dev *dev, enum cxllib_mode mode,
unsigned long flags);
/*
* Set the device for capi DMA.
* Define its dma_ops and dma offset so that allocations will be using TVT#1
*
* Input:
* dev: device to set
* flags: options. CXL_MODE_DMA_TVT1 should be used
*/
int cxllib_set_device_dma(struct pci_dev *dev, unsigned long flags);
/*
* Get the Process Element structure for the given thread
*
* Input:
* task: task_struct for the context of the translation
* translation_mode: whether addresses should be translated
* Output:
* attr: attributes to fill up the Process Element structure from CAIA
*/
struct cxllib_pe_attributes {
u64 sr;
u32 lpid;
u32 tid;
u32 pid;
};
#define CXL_TRANSLATED_MODE 0
#define CXL_REAL_MODE 1
int cxllib_get_PE_attributes(struct task_struct *task,
unsigned long translation_mode, struct cxllib_pe_attributes *attr);
/*
* Handle memory fault.
* Fault in all the pages of the specified buffer for the permissions
* provided in ‘flags’
*
* Shouldn't be called from interrupt context
*
* Input:
* mm: struct mm for the thread faulting the pages
* addr: base address of the buffer to page in
* size: size of the buffer to page in
* flags: permission requested (DSISR_ISSTORE...)
*/
int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags);
#endif /* _MISC_CXLLIB_H */
include/misc/ocxl-config.h
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// SPDX-License-Identifier: GPL-2.0+
// Copyright 2017 IBM Corp.
#ifndef _OCXL_CONFIG_H_
#define _OCXL_CONFIG_H_
/*
* This file lists the various constants used to read the
* configuration space of an opencapi adapter.
*
* It follows the specification for opencapi 3.0
*/
#define OCXL_EXT_CAP_ID_DVSEC 0x23
#define OCXL_DVSEC_VENDOR_OFFSET 0x4
#define OCXL_DVSEC_ID_OFFSET 0x8
#define OCXL_DVSEC_TL_ID 0xF000
#define OCXL_DVSEC_TL_BACKOFF_TIMERS 0x10
#define OCXL_DVSEC_TL_RECV_CAP 0x18
#define OCXL_DVSEC_TL_SEND_CAP 0x20
#define OCXL_DVSEC_TL_RECV_RATE 0x30
#define OCXL_DVSEC_TL_SEND_RATE 0x50
#define OCXL_DVSEC_FUNC_ID 0xF001
#define OCXL_DVSEC_FUNC_OFF_INDEX 0x08
#define OCXL_DVSEC_FUNC_OFF_ACTAG 0x0C
#define OCXL_DVSEC_AFU_INFO_ID 0xF003
#define OCXL_DVSEC_AFU_INFO_AFU_IDX 0x0A
#define OCXL_DVSEC_AFU_INFO_OFF 0x0C
#define OCXL_DVSEC_AFU_INFO_DATA 0x10
#define OCXL_DVSEC_AFU_CTRL_ID 0xF004
#define OCXL_DVSEC_AFU_CTRL_AFU_IDX 0x0A
#define OCXL_DVSEC_AFU_CTRL_TERM_PASID 0x0C
#define OCXL_DVSEC_AFU_CTRL_ENABLE 0x0F
#define OCXL_DVSEC_AFU_CTRL_PASID_SUP 0x10
#define OCXL_DVSEC_AFU_CTRL_PASID_EN 0x11
#define OCXL_DVSEC_AFU_CTRL_PASID_BASE 0x14
#define OCXL_DVSEC_AFU_CTRL_ACTAG_SUP 0x18
#define OCXL_DVSEC_AFU_CTRL_ACTAG_EN 0x1A
#define OCXL_DVSEC_AFU_CTRL_ACTAG_BASE 0x1C
#define OCXL_DVSEC_VENDOR_ID 0xF0F0
#define OCXL_DVSEC_VENDOR_CFG_VERS 0x0C
#define OCXL_DVSEC_VENDOR_TLX_VERS 0x10
#define OCXL_DVSEC_VENDOR_DLX_VERS 0x20
#endif /* _OCXL_CONFIG_H_ */
include/misc/ocxl.h
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// SPDX-License-Identifier: GPL-2.0+
// Copyright 2017 IBM Corp.
#ifndef _MISC_OCXL_H_
#define _MISC_OCXL_H_
#include <linux/pci.h>
/*
* Opencapi drivers all need some common facilities, like parsing the
* device configuration space, adding a Process Element to the Shared
* Process Area, etc...
*
* The ocxl module provides a kernel API, to allow other drivers to
* reuse common code. A bit like a in-kernel library.
*/
#define OCXL_AFU_NAME_SZ (24+1) /* add 1 for NULL termination */
/*
* The following 2 structures are a fairly generic way of representing
* the configuration data for a function and AFU, as read from the
* configuration space.
*/
struct ocxl_afu_config {
u8 idx;
int dvsec_afu_control_pos; /* offset of AFU control DVSEC */
char name[OCXL_AFU_NAME_SZ];
u8 version_major;
u8 version_minor;
u8 afuc_type;
u8 afum_type;
u8 profile;
u8 global_mmio_bar; /* global MMIO area */
u64 global_mmio_offset;
u32 global_mmio_size;
u8 pp_mmio_bar; /* per-process MMIO area */
u64 pp_mmio_offset;
u32 pp_mmio_stride;
u8 log_mem_size;
u8 pasid_supported_log;
u16 actag_supported;
};
struct ocxl_fn_config {
int dvsec_tl_pos; /* offset of the Transaction Layer DVSEC */
int dvsec_function_pos; /* offset of the Function DVSEC */
int dvsec_afu_info_pos; /* offset of the AFU information DVSEC */
s8 max_pasid_log;
s8 max_afu_index;
};
/*
* Read the configuration space of a function and fill in a
* ocxl_fn_config structure with all the function details
*/
extern int ocxl_config_read_function(struct pci_dev *dev,
struct ocxl_fn_config *fn);
/*
* Check if an AFU index is valid for the given function.
*
* AFU indexes can be sparse, so a driver should check all indexes up
* to the maximum found in the function description
*/
extern int ocxl_config_check_afu_index(struct pci_dev *dev,
struct ocxl_fn_config *fn, int afu_idx);
/*
* Read the configuration space of a function for the AFU specified by
* the index 'afu_idx'. Fills in a ocxl_afu_config structure
*/
extern int ocxl_config_read_afu(struct pci_dev *dev,
struct ocxl_fn_config *fn,
struct ocxl_afu_config *afu,
u8 afu_idx);
/*
* Get the max PASID value that can be used by the function
*/
extern int ocxl_config_get_pasid_info(struct pci_dev *dev, int *count);
/*
* Tell an AFU, by writing in the configuration space, the PASIDs that
* it can use. Range starts at 'pasid_base' and its size is a multiple
* of 2
*
* 'afu_control_offset' is the offset of the AFU control DVSEC which
* can be found in the function configuration
*/
extern void ocxl_config_set_afu_pasid(struct pci_dev *dev,
int afu_control_offset,
int pasid_base, u32 pasid_count_log);
/*
* Get the actag configuration for the function:
* 'base' is the first actag value that can be used.
* 'enabled' it the number of actags available, starting from base.
* 'supported' is the total number of actags desired by all the AFUs
* of the function.
*/
extern int ocxl_config_get_actag_info(struct pci_dev *dev,
u16 *base, u16 *enabled, u16 *supported);
/*
* Tell a function, by writing in the configuration space, the actags
* it can use.
*
* 'func_offset' is the offset of the Function DVSEC that can found in
* the function configuration
*/
extern void ocxl_config_set_actag(struct pci_dev *dev, int func_offset,
u32 actag_base, u32 actag_count);
/*
* Tell an AFU, by writing in the configuration space, the actags it
* can use.
*
* 'afu_control_offset' is the offset of the AFU control DVSEC for the
* desired AFU. It can be found in the AFU configuration
*/
extern void ocxl_config_set_afu_actag(struct pci_dev *dev,
int afu_control_offset,
int actag_base, int actag_count);
/*
* Enable/disable an AFU, by writing in the configuration space.
*
* 'afu_control_offset' is the offset of the AFU control DVSEC for the
* desired AFU. It can be found in the AFU configuration
*/
extern void ocxl_config_set_afu_state(struct pci_dev *dev,
int afu_control_offset, int enable);
/*
* Set the Transaction Layer configuration in the configuration space.
* Only needed for function 0.
*
* It queries the host TL capabilities, find some common ground
* between the host and device, and set the Transaction Layer on both
* accordingly.
*/
extern int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec);
/*
* Request an AFU to terminate a PASID.
* Will return once the AFU has acked the request, or an error in case
* of timeout.
*
* The hardware can only terminate one PASID at a time, so caller must
* guarantee some kind of serialization.
*
* 'afu_control_offset' is the offset of the AFU control DVSEC for the
* desired AFU. It can be found in the AFU configuration
*/
extern int ocxl_config_terminate_pasid(struct pci_dev *dev,
int afu_control_offset, int pasid);
/*
* Set up the opencapi link for the function.
*
* When called for the first time for a link, it sets up the Shared
* Process Area for the link and the interrupt handler to process
* translation faults.
*
* Returns a 'link handle' that should be used for further calls for
* the link
*/
extern int ocxl_link_setup(struct pci_dev *dev, int PE_mask,
void **link_handle);
/*
* Remove the association between the function and its link.
*/
extern void ocxl_link_release(struct pci_dev *dev, void *link_handle);
/*
* Add a Process Element to the Shared Process Area for a link.
* The process is defined by its PASID, pid, tid and its mm_struct.
*
* 'xsl_err_cb' is an optional callback if the driver wants to be
* notified when the translation fault interrupt handler detects an
* address error.
* 'xsl_err_data' is an argument passed to the above callback, if
* defined
*/
extern int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
u64 amr, struct mm_struct *mm,
void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr),
void *xsl_err_data);
/**
* Update values within a Process Element
*
* link_handle: the link handle associated with the process element
* pasid: the PASID for the AFU context
* tid: the new thread id for the process element
*/
extern int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid);
/*
* Remove a Process Element from the Shared Process Area for a link
*/
extern int ocxl_link_remove_pe(void *link_handle, int pasid);
/*
* Allocate an AFU interrupt associated to the link.
*
* 'hw_irq' is the hardware interrupt number
* 'obj_handle' is the 64-bit object handle to be passed to the AFU to
* trigger the interrupt.
* On P9, 'obj_handle' is an address, which, if written, triggers the
* interrupt. It is an MMIO address which needs to be remapped (one
* page).
*/
extern int ocxl_link_irq_alloc(void *link_handle, int *hw_irq,
u64 *obj_handle);
/*
* Free a previously allocated AFU interrupt
*/
extern void ocxl_link_free_irq(void *link_handle, int hw_irq);
#endif /* _MISC_OCXL_H_ */