// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (c) 2019 MediaTek Inc.
 * Author: Mars.C <mars.cheng@mediatek.com>
 *
 */

/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/mt6779-pinfunc.h>

&chosen {

	atag,videolfb-fb_base_l = <0x5e605000>;
	atag,videolfb-fb_base_h = <0x0>;
	atag,videolfb-islcmfound = <1>;
	atag,videolfb-islcm_inited = <0>;
	atag,videolfb-fps= <6000>;
	atag,videolfb-vramSize= <0x017bb000>;
	atag,videolfb-lcmname=
		"nt35595_fhd_dsi_cmd_truly_nt50358_drv";
};

&mrdump_ext_rst {
	interrupt-parent = <&pio>;
	interrupts = <0 IRQ_TYPE_LEVEL_LOW 0 0>;
	deb-gpios = <&pio 0 0>;
	debounce = <512000>;
};

&odm {
	led0:led@0 {
		compatible = "mediatek,red";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led1:led@1 {
		compatible = "mediatek,green";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led2:led@2 {
		compatible = "mediatek,blue";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led3:led@3 {
		compatible = "mediatek,jogball-backlight";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led4:led@4 {
		compatible = "mediatek,keyboard-backlight";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led5:led@5 {
		compatible = "mediatek,button-backlight";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led6:led@6 {
		compatible = "mediatek,lcd-backlight";
		led_mode = <5>;
		data = <1>;
		pwm_config = <0 1 0 0 0>;
	};
	vibrator0:vibrator@0 {
		compatible = "mediatek,vibrator";
		vib_timer = <25>;
		vib_limit = <9>;
		vib_vol= <9>;
	};
};

&uart0 {
	status = "okay";
};

&keypad {
	mediatek,key-debounce-ms = <1024>;
	/*HW Keycode [0~71] -> Linux Keycode*/
	mediatek,hw-map-num = <72>;
	mediatek,hw-init-map = <114 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
		0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
		0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 >;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&kpd_gpios_def_cfg>;
};

&pio {
	kpd_gpios_def_cfg: kpdgpiodefault {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO59__FUNC_KPCOL0>,
				<PINMUX_GPIO60__FUNC_KPCOL1>;
			mediatek,pull-up-adv = <MTK_PUPD_SET_R1R0_01>;
			pull-up;
			input-enable;
		};
	};
	/* set audio pinctrl status */
	aud_clk_mosi_off: aud_clk_mosi_off {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO189__FUNC_GPIO189>,
				 <PINMUX_GPIO190__FUNC_GPIO190>;
		};
	};
	aud_clk_mosi_on: aud_clk_mosi_on {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO189__FUNC_AUD_CLK_MOSI>,
				 <PINMUX_GPIO190__FUNC_AUD_SYNC_MOSI>;
		};
	};
	aud_dat_mosi_off: aud_dat_mosi_off {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO191__FUNC_GPIO191>;
			input-enable;
			bias-disable;
		};
		pins_cmd2_dat {
			pinmux = <PINMUX_GPIO192__FUNC_GPIO192>;
			input-enable;
			bias-disable;
		};
	};
	aud_dat_mosi_on: aud_dat_mosi_on {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO191__FUNC_AUD_DAT_MOSI0>,
				 <PINMUX_GPIO192__FUNC_AUD_DAT_MOSI1>;
		};
	};
	aud_dat_mosi_ch34_off: aud_dat_mosi_ch34_off {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
			input-enable;
			bias-disable;
		};
	};
	aud_dat_mosi_ch34_on: aud_dat_mosi_ch34_on {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO143__FUNC_AUD_DAT_MOSI2>;
		};
	};
	aud_dat_miso_off: aud_dat_miso_off {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO193__FUNC_GPIO193>;
			input-enable;
			bias-disable;
		};
		pins_cmd2_dat {
			pinmux = <PINMUX_GPIO194__FUNC_GPIO194>;
			input-enable;
			bias-disable;
		};
	};
	aud_dat_miso_on: aud_dat_miso_on {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO193__FUNC_AUD_DAT_MISO0>;
			input-schmitt-enable;
		};
		pins_cmd2_dat {
			pinmux = <PINMUX_GPIO194__FUNC_AUD_DAT_MISO1>;
			input-schmitt-enable;
		};
	};
	aud_dat_miso_ch34_off: aud_dat_miso_ch34_off {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO146__FUNC_GPIO146>;
			input-enable;
			bias-disable;
		};
	};
	aud_dat_miso_ch34_on: aud_dat_miso_ch34_on {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO146__FUNC_AUD_DAT_MISO2>;
			input-schmitt-enable;
		};
	};
	vow_dat_miso_off: vow_dat_miso_off {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO193__FUNC_GPIO193>;
		};
	};
	vow_dat_miso_on: vow_dat_miso_on {
		pins_cmd1_dat {
			pinmux = <PINMUX_GPIO193__FUNC_VOW_DAT_MISO>;
		};
	};
	vow_clk_miso_off: vow_clk_miso_off {
		pins_cmd3_dat {
			pinmux = <PINMUX_GPIO194__FUNC_GPIO194>;
			input-schmitt-enable;
		};
	};
	vow_clk_miso_on: vow_clk_miso_on {
		pins_cmd3_dat {
			pinmux = <PINMUX_GPIO194__FUNC_VOW_CLK_MISO>;
			input-schmitt-enable;
		};
	};
	aud_nle_mosi_off: aud_nle_mosi_off {
		pins_cmd3_dat {
			pinmux = <PINMUX_GPIO144__FUNC_GPIO144>,
				 <PINMUX_GPIO145__FUNC_GPIO145>;
		};
	};
	aud_nle_mosi_on: aud_nle_mosi_on {
		pins_cmd3_dat {
			pinmux = <PINMUX_GPIO144__FUNC_AUD_NLE_MOSI1>,
				 <PINMUX_GPIO145__FUNC_AUD_NLE_MOSI0>;
		};
	};
	aud_dat_miso2_off: aud_dat_miso2_off {
		pins_cmd3_dat {
			pinmux = <PINMUX_GPIO146__FUNC_GPIO146>;
		};
	};
	aud_dat_miso2_on: aud_dat_miso2_on {
		pins_cmd3_dat {
			pinmux = <PINMUX_GPIO146__FUNC_AUD_DAT_MISO2>;
		};
	};
	aud_gpio_i2s0_off: aud_gpio_i2s0_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO70__FUNC_GPIO70>;
		};
	};
	aud_gpio_i2s0_on: aud_gpio_i2s0_on {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO70__FUNC_I2S0_DI>;
		};
	};
	aud_gpio_i2s1_off: aud_gpio_i2s1_off {
	};
	aud_gpio_i2s1_on: aud_gpio_i2s1_on {
	};
	aud_gpio_i2s2_off: aud_gpio_i2s2_off {
	};
	aud_gpio_i2s2_on: aud_gpio_i2s2_on {
	};
	aud_gpio_i2s3_off: aud_gpio_i2s3_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO67__FUNC_GPIO67>,
				 <PINMUX_GPIO68__FUNC_GPIO68>,
				 <PINMUX_GPIO71__FUNC_GPIO71>;
		};
	};
	aud_gpio_i2s3_on: aud_gpio_i2s3_on {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO67__FUNC_I2S3_LRCK>,
				 <PINMUX_GPIO68__FUNC_I2S3_DO>,
				 <PINMUX_GPIO71__FUNC_I2S3_BCK>;
		};
	};
	aud_gpio_i2s5_off: aud_gpio_i2s5_off {
	};
	aud_gpio_i2s5_on: aud_gpio_i2s5_on {
	};
};

/* AUDIO GPIO standardization */
&afe {
	pinctrl-names = "aud_clk_mosi_off", "aud_clk_mosi_on",
			"aud_dat_mosi_off", "aud_dat_mosi_on",
			"aud_dat_miso_off", "aud_dat_miso_on",
			"vow_dat_miso_off", "vow_dat_miso_on",
			"vow_clk_miso_off", "vow_clk_miso_on",
			"aud_nle_mosi_off", "aud_nle_mosi_on",
			"aud_dat_miso2_off", "aud_dat_miso2_on",
			"aud_gpio_i2s0_off", "aud_gpio_i2s0_on",
			"aud_gpio_i2s1_off", "aud_gpio_i2s1_on",
			"aud_gpio_i2s2_off", "aud_gpio_i2s2_on",
			"aud_gpio_i2s3_off", "aud_gpio_i2s3_on",
			"aud_gpio_i2s5_off", "aud_gpio_i2s5_on",
			"aud_dat_mosi_ch34_off", "aud_dat_mosi_ch34_on",
			"aud_dat_miso_ch34_off", "aud_dat_miso_ch34_on";
	pinctrl-0 = <&aud_clk_mosi_off>;
	pinctrl-1 = <&aud_clk_mosi_on>;
	pinctrl-2 = <&aud_dat_mosi_off>;
	pinctrl-3 = <&aud_dat_mosi_on>;
	pinctrl-4 = <&aud_dat_miso_off>;
	pinctrl-5 = <&aud_dat_miso_on>;
	pinctrl-6 = <&vow_dat_miso_off>;
	pinctrl-7 = <&vow_dat_miso_on>;
	pinctrl-8 = <&vow_clk_miso_off>;
	pinctrl-9 = <&vow_clk_miso_on>;
	pinctrl-10 = <&aud_nle_mosi_off>;
	pinctrl-11 = <&aud_nle_mosi_on>;
	pinctrl-12 = <&aud_dat_miso2_off>;
	pinctrl-13 = <&aud_dat_miso2_on>;
	pinctrl-14 = <&aud_gpio_i2s0_off>;
	pinctrl-15 = <&aud_gpio_i2s0_on>;
	pinctrl-16 = <&aud_gpio_i2s1_off>;
	pinctrl-17 = <&aud_gpio_i2s1_on>;
	pinctrl-18 = <&aud_gpio_i2s2_off>;
	pinctrl-19 = <&aud_gpio_i2s2_on>;
	pinctrl-20 = <&aud_gpio_i2s3_off>;
	pinctrl-21 = <&aud_gpio_i2s3_on>;
	pinctrl-22 = <&aud_gpio_i2s5_off>;
	pinctrl-23 = <&aud_gpio_i2s5_on>;
	pinctrl-24 = <&aud_dat_mosi_ch34_off>;
	pinctrl-25 = <&aud_dat_mosi_ch34_on>;
	pinctrl-26 = <&aud_dat_miso_ch34_off>;
	pinctrl-27 = <&aud_dat_miso_ch34_on>;
	status = "okay";
};
/* AUDIO GPIO standardization end */

&smart_pa {
	interrupt-parent = <&pio>;
	interrupts = <69 IRQ_TYPE_LEVEL_LOW 69 0>;
	status = "okay";
};

/* DISPSYS GPIO standardization */
&pio {
	mtkfb_pins_lcd_bias_enp1: lcd_bias_enp1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO23__FUNC_GPIO23>;
			output-high;
		};
	};

	mtkfb_pins_lcd_bias_enp0: lcd_bias_enp0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO23__FUNC_GPIO23>;
			output-low;
		};
	};

	mtkfb_pins_lcd_bias_enn1: lcd_bias_enn1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO202__FUNC_GPIO202>;
			output-high;
		};
	};

	mtkfb_pins_lcd_bias_enn0: lcd_bias_enn0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO202__FUNC_GPIO202>;
			output-low;
		};
	};

	mtkfb_pins_lcm_rst_out1_gpio: lcm_rst_out1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO44__FUNC_GPIO44>;
			output-high;
		};
	};

	mtkfb_pins_lcm_rst_out0_gpio: lcm_rst_out0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO44__FUNC_GPIO44>;
			output-low;
		};
	};

	mtkfb_pins_lcm_dsi_te: lcm_dsi_te {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO43__FUNC_DSI_TE>;
			input-enable;
		};
	};

	mtkfb_pins_lcm_mipi0_sdata: lcm_mipi0_sdata {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO95__FUNC_MIPI0_SDATA>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi0_sclk: lcm_mipi0_sclk {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO96__FUNC_MIPI0_SCLK>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi1_sdata: lcm_mipi1_sdata {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO97__FUNC_MIPI1_SDATA>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi1_sclk: lcm_mipi1_sclk {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO98__FUNC_MIPI1_SCLK>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi2_sdata: lcm_mipi2_sdata {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO100__FUNC_MIPI2_SDATA>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi2_sclk: lcm_mipi2_sclk {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO99__FUNC_MIPI2_SCLK>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi3_sdata: lcm_mipi3_sdata {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO102__FUNC_MIPI3_SDATA>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi3_sclk: lcm_mipi3_sclk {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO101__FUNC_MIPI3_SCLK>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi4_sdata: lcm_mipi4_sdata {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO104__FUNC_MIPI4_SDATA>;
			output-low;
		};
	};

	mtkfb_pins_lcm_mipi4_sclk: lcm_mipi4_sclk {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO103__FUNC_MIPI4_SCLK>;
			output-low;
		};
	};
};

&mtkfb {
	pinctrl-names = "lcd_bias_enp1_gpio", "lcd_bias_enp0_gpio",
		"lcd_bias_enn1_gpio", "lcd_bias_enn0_gpio",
		"lcm_rst_out1_gpio", "lcm_rst_out0_gpio", "lcm_dsi_te",
		"lcm_mipi0_sdata", "lcm_mipi0_sclk",
		"lcm_mipi1_sdata", "lcm_mipi1_sclk",
		"lcm_mipi2_sdata", "lcm_mipi2_sclk",
		"lcm_mipi3_sdata", "lcm_mipi3_sclk",
		"lcm_mipi4_sdata", "lcm_mipi4_sclk";
	pinctrl-0 = <&mtkfb_pins_lcd_bias_enp1>;
	pinctrl-1 = <&mtkfb_pins_lcd_bias_enp0>;
	pinctrl-2 = <&mtkfb_pins_lcd_bias_enn1>;
	pinctrl-3 = <&mtkfb_pins_lcd_bias_enn0>;
	pinctrl-4 = <&mtkfb_pins_lcm_rst_out1_gpio>;
	pinctrl-5 = <&mtkfb_pins_lcm_rst_out0_gpio>;
	pinctrl-6 = <&mtkfb_pins_lcm_dsi_te>;
	pinctrl-7 = <&mtkfb_pins_lcm_mipi0_sdata>;
	pinctrl-8 = <&mtkfb_pins_lcm_mipi0_sclk>;
	pinctrl-9 = <&mtkfb_pins_lcm_mipi1_sdata>;
	pinctrl-10 = <&mtkfb_pins_lcm_mipi1_sclk>;
	pinctrl-11 = <&mtkfb_pins_lcm_mipi2_sdata>;
	pinctrl-12 = <&mtkfb_pins_lcm_mipi2_sclk>;
	pinctrl-13 = <&mtkfb_pins_lcm_mipi3_sdata>;
	pinctrl-14 = <&mtkfb_pins_lcm_mipi3_sclk>;
	pinctrl-15 = <&mtkfb_pins_lcm_mipi4_sdata>;
	pinctrl-16 = <&mtkfb_pins_lcm_mipi4_sclk>;
	status = "okay";
};

&dsi_te {
	interrupt-parent = <&pio>;
	interrupts = <43 IRQ_TYPE_EDGE_RISING 43 1>;
	status = "okay";
};
/* DISPSYS GPIO standardization end */

&i2c6 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	mt6660: mt6660@34 {
		compatible = "mediatek,mt6660";
		status = "ok";
		reg = <0x34>;
	};
};

&gpio{
	gpio_init_default = <0 0 0 0 1 1 1>,
		<1 0 0 0 1 1 1>,
		<2 0 1 0 0 0 1>,
		<3 0 0 0 1 1 1>,
		<4 0 0 0 1 0 1>,
		<5 0 0 0 0 0 1>,
		<6 0 0 0 1 0 1>,
		<7 0 0 0 1 1 1>,
		<8 0 0 0 1 1 1>,
		<9 0 0 0 1 1 1>,
		<10 0 0 0 1 0 1>,
		<11 0 0 0 1 1 1>,
		<12 0 1 0 0 0 0>,
		<13 0 1 0 0 0 0>,
		<14 0 1 0 0 0 0>,
		<15 0 1 0 0 0 0>,
		<16 7 0 0 1 0 0>,
		<17 7 1 0 0 0 0>,
		<18 7 0 0 1 0 0>,
		<19 7 0 0 1 0 0>,
		<20 7 0 0 1 0 0>,
		<21 3 1 0 0 0 0>,
		<22 0 1 1 0 0 0>,
		<23 0 1 0 0 0 0>,
		<24 0 1 0 0 0 0>,
		<25 4 0 0 1 0 0>,
		<26 0 1 0 0 0 0>,
		<28 1 0 0 1 1 1>,
		<29 1 0 0 1 1 1>,
		<30 0 1 0 0 0 0>,
		<31 0 1 0 0 0 0>,
		<32 0 1 0 0 0 0>,
		<33 0 0 0 1 0 0>,
		<34 0 1 0 0 0 0>,
		<35 0 0 0 1 0 0>,
		<36 0 1 1 0 0 0>,
		<37 6 0 0 1 0 0>,
		<38 6 1 0 0 0 0>,
		<39 6 0 0 1 0 0>,
		<40 6 0 0 1 0 0>,
		<41 6 0 0 1 0 0>,
		<42 1 1 0 0 0 0>,
		<43 1 0 0 1 0 0>,
		<44 0 1 0 0 0 0>,
		<45 1 0 0 1 1 1>,
		<46 1 0 0 1 1 1>,
		<47 1 0 0 1 0 0>,
		<48 1 1 0 0 0 0>,
		<49 1 1 0 0 0 0>,
		<50 1 1 0 0 0 0>,
		<51 1 0 0 1 1 1>,
		<52 1 0 0 1 1 1>,
		<53 1 0 0 1 1 0>,
		<54 1 1 0 0 0 0>,
		<55 1 0 0 1 1 1>,
		<56 1 0 0 1 1 1>,
		<57 0 0 0 1 0 0>,
		<58 0 0 0 1 0 0>,
		<59 1 0 0 1 1 0>,
		<60 1 0 0 1 1 0>,
		<61 2 0 0 1 1 1>,
		<62 2 0 0 1 1 1>,
		<63 2 0 0 1 0 0>,
		<64 2 1 0 0 0 0>,
		<65 2 1 0 0 0 0>,
		<66 2 1 0 0 0 0>,
		<67 1 1 0 0 0 1>,
		<68 1 1 0 0 0 1>,
		<69 0 0 0 1 1 1>,
		<70 1 0 0 1 0 0>,
		<71 1 1 0 0 0 1>,
		<72 1 0 0 1 0 0>,
		<73 3 0 0 1 0 0>,
		<74 3 0 0 1 0 0>,
		<75 1 0 0 1 0 0>,
		<76 1 0 0 1 0 0>,
		<77 1 0 0 1 0 0>,
		<78 1 0 0 1 0 0>,
		<79 1 0 0 1 0 0>,
		<80 1 0 0 1 0 0>,
		<81 1 0 0 1 0 0>,
		<82 1 0 0 1 0 0>,
		<83 1 0 0 1 0 0>,
		<84 1 0 0 1 0 0>,
		<85 1 0 0 1 0 0>,
		<86 1 0 0 1 0 0>,
		<87 1 0 0 1 0 0>,
		<88 1 0 0 1 0 0>,
		<89 1 0 0 1 0 0>,
		<90 1 0 0 1 0 0>,
		<91 1 0 0 1 0 0>,
		<92 1 0 0 1 0 0>,
		<93 1 0 0 1 0 0>,
		<94 1 0 0 1 0 0>,
		<95 1 0 0 1 0 0>,
		<96 1 0 0 1 0 0>,
		<97 1 0 0 1 0 0>,
		<98 1 0 0 1 0 0>,
		<99 1 0 0 1 0 0>,
		<100 1 0 0 1 0 0>,
		<101 1 0 0 1 0 0>,
		<102 1 0 0 1 0 0>,
		<103 1 0 0 1 0 0>,
		<104 1 0 0 1 0 0>,
		<105 1 0 0 1 0 0>,
		<106 1 0 0 1 0 0>,
		<107 1 0 0 1 0 0>,
		<108 1 0 0 1 0 0>,
		<109 1 0 0 1 0 0>,
		<110 1 0 0 1 1 1>,
		<111 1 0 0 1 1 1>,
		<112 1 0 0 1 1 1>,
		<113 1 0 0 1 1 1>,
		<114 0 1 0 0 0 0>,
		<115 0 1 0 0 0 0>,
		<116 1 1 0 0 0 0>,
		<117 1 1 0 0 0 0>,
		<118 0 1 0 0 0 0>,
		<119 0 1 0 0 0 0>,
		<120 1 1 0 0 0 0>,
		<121 1 1 0 0 0 0>,
		<122 0 1 0 0 0 0>,
		<123 0 1 0 0 0 0>,
		<124 0 1 0 0 0 0>,
		<125 0 1 0 0 0 0>,
		<126 0 1 0 0 0 0>,
		<127 1 0 0 1 0 0>,
		<128 1 0 0 1 1 1>,
		<129 1 1 0 0 0 1>,
		<130 1 1 0 0 0 1>,
		<131 1 1 0 0 0 1>,
		<132 1 1 0 0 0 1>,
		<133 1 0 0 1 1 1>,
		<134 1 1 0 0 0 1>,
		<135 1 0 0 1 1 1>,
		<136 1 0 0 1 1 1>,
		<137 1 0 0 1 1 1>,
		<138 1 0 0 1 1 1>,
		<139 1 0 0 1 1 1>,
		<140 1 0 0 1 1 1>,
		<141 1 0 0 1 1 1>,
		<142 1 1 0 0 0 0>,
		<143 1 1 0 0 0 1>,
		<144 1 1 0 0 0 1>,
		<145 1 1 0 0 0 1>,
		<146 1 0 0 1 0 1>,
		<147 0 1 0 0 0 0>,
		<148 0 0 0 1 0 0>,
		<149 0 0 0 1 0 0>,
		<150 1 1 0 0 0 0>,
		<151 1 1 0 0 0 0>,
		<152 0 0 0 1 0 0>,
		<153 0 0 0 1 0 0>,
		<154 0 0 0 1 0 0>,
		<155 0 0 0 1 0 0>,
		<156 1 1 0 0 0 0>,
		<157 1 1 0 0 0 0>,
		<158 1 1 0 0 0 0>,
		<159 1 1 0 0 0 0>,
		<160 1 1 0 0 0 0>,
		<161 1 1 0 0 0 0>,
		<162 1 1 0 0 0 0>,
		<163 1 1 0 0 0 0>,
		<164 1 1 0 0 0 0>,
		<165 1 1 0 0 0 0>,
		<166 1 1 0 0 0 0>,
		<179 1 0 0 1 0 0>,
		<180 1 0 0 1 0 0>,
		<181 1 1 0 0 0 0>,
		<182 1 1 0 0 0 0>,
		<183 1 1 0 0 0 0>,
		<184 1 0 0 1 0 0>,
		<185 1 1 0 0 0 0>,
		<186 1 0 0 1 0 0>,
		<187 1 1 0 0 0 0>,
		<188 1 0 0 1 0 1>,
		<189 1 1 0 0 0 1>,
		<190 1 1 0 0 0 1>,
		<191 1 1 0 0 0 1>,
		<192 1 1 0 0 0 1>,
		<193 1 0 0 1 0 1>,
		<194 1 0 0 1 0 1>,
		<195 0 1 0 0 0 0>,
		<196 1 1 0 0 0 0>,
		<197 0 1 0 0 0 0>,
		<198 1 0 0 1 1 1>,
		<199 1 0 0 1 1 1>,
		<200 1 0 0 1 1 0>,
		<201 1 1 0 0 0 0>,
		<202 0 1 0 0 0 0>,
		<203 0 0 0 1 0 0>,
		<204 0 0 0 1 0 0>,
		<205 0 0 0 1 0 0>,
		<206 0 0 0 1 0 0>,
		<207 0 0 0 1 0 0>,
		<208 0 0 0 1 0 0>,
		<209 0 0 0 1 0 0>;
};

/* CONSYS GPIO standardization */
&pio {
	consys_pins_default: consys_default {
	};
	gpslna_pins_init: gpslna@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
			slew-rate = <0>;
			bias-disable;
			output-low;
		};
	};
	gpslna_pins_oh: gpslna@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
			slew-rate = <1>;
			output-high;
		};
	};
	gpslna_pins_ol: gpslna@2 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
			slew-rate = <1>;
			output-low;
		};
	};
};
&consys {
	pinctrl-names = "default",
			"gps_lna_state_init",
			"gps_lna_state_oh",
			"gps_lna_state_ol";
	pinctrl-0 = <&consys_pins_default>;
	pinctrl-1 = <&gpslna_pins_init>;
	pinctrl-2 = <&gpslna_pins_oh>;
	pinctrl-3 = <&gpslna_pins_ol>;
	status = "okay";
};
/* CONSYS end */

&bat_gm30 {
	extcon = <&mt6360_chg>;
	charger = <&mt6360_chg>;
};

/* MD SIM GPIO */
&gpio_usage_mapping {
	compatible = "mediatek,gpio_usage_mapping";
	GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN = <&pio 5 0>;
	GPIO_SIM1_SIO = <&pio 128 0>;
	GPIO_SIM1_SRST = <&pio 129 0>;
	GPIO_SIM1_SCLK = <&pio 130 0>;
	GPIO_SIM2_SCLK = <&pio 131 0>;
	GPIO_SIM2_SRST = <&pio 132 0>;
	GPIO_SIM2_SIO = <&pio 133 0>;
	GPIO_SIM1_HOT_PLUG = <&pio 140 0>;
	GPIO_SIM2_HOT_PLUG = <&pio 141 0>;
};

&md1_sim1_hot_plug_eint {
	compatible = "mediatek,md1_sim1_hot_plug_eint-eint";
	interrupts = <0 4>;
	debounce = <0 50000>;
	dedicated = <0 0>;
	src_pin = <0 1>;
	sockettype = <0 0>;
	status = "okay";
};

&md1_sim2_hot_plug_eint {
	compatible = "mediatek,md1_sim2_hot_plug_eint-eint";
	interrupts = <1 4>;
	debounce = <1 50000>;
	dedicated = <1 0>;
	src_pin = <1 2>;
	sockettype = <1 0>;
	status = "okay";
};

&mt6360_typec {
	mt6360pd,intr_gpio_num = <7>; /* direct defined GPIO num */
	mt6360pd,intr_gpio = <&pio 7 0x0>;
};

#include <k79v1_64/cust.dtsi>
#include "mediatek/cust_mt6779_touch_1080x2160.dtsi"