/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (C) 2016 MediaTek Inc.
 */


&clkitg {
	status = "okay";
	bring-up {
		compatible = "mediatek,clk-bring-up";
		clocks =
			<&clk26m>,
			<&apmixed APMIXED_MAINPLL>,
			<&apmixed APMIXED_UNIV2PLL>,
			<&apmixed APMIXED_MFGPLL>,
			<&apmixed APMIXED_MSDCPLL>,
			<&apmixed APMIXED_ADSPPLL>,
			<&apmixed APMIXED_MMPLL>,
			<&apmixed APMIXED_APLL1>,
			<&apmixed APMIXED_APLL2>,
			<&topckgen TOP_MUX_AXI>,
			<&topckgen TOP_MUX_SCP>,
			<&topckgen TOP_MUX_MFG>,
			<&topckgen TOP_MUX_CAMTG>,
			<&topckgen TOP_MUX_CAMTG1>,
			<&topckgen TOP_MUX_CAMTG2>,
			<&topckgen TOP_MUX_CAMTG3>,
			<&topckgen TOP_MUX_CAMTG4>,
			<&topckgen TOP_MUX_CAMTG5>,
			<&topckgen TOP_MUX_CAMTG6>,
			<&topckgen TOP_MUX_UART>,
			<&topckgen TOP_MUX_SPI>,
			<&topckgen TOP_MUX_MSDC50_0_HCLK>,
			<&topckgen TOP_MUX_MSDC50_0>,
			<&topckgen TOP_MUX_MSDC30_1>,
			<&topckgen TOP_MUX_AUDIO>,
			<&topckgen TOP_MUX_AUD_INTBUS>,
			<&topckgen TOP_MUX_AUD_1>,
			<&topckgen TOP_MUX_AUD_2>,
			<&topckgen TOP_MUX_AUD_ENG1>,
			<&topckgen TOP_MUX_AUD_ENG2>,
			<&topckgen TOP_MUX_DISP_PWM>,
			<&topckgen TOP_MUX_SSPM>,
			<&topckgen TOP_MUX_DXCC>,
			<&topckgen TOP_MUX_USB_TOP>,
			<&topckgen TOP_MUX_SRCK>,
			<&topckgen TOP_MUX_SPM>,
			<&topckgen TOP_MUX_I2C>,
			<&topckgen TOP_MUX_PWM>,
			<&topckgen TOP_MUX_SENINF>,
			<&topckgen TOP_MUX_SENINF1>,
			<&topckgen TOP_MUX_SENINF2>,
			<&topckgen TOP_MUX_SENINF3>,
			<&topckgen TOP_MUX_AES_MSDCFDE>,
			<&topckgen TOP_MUX_FPWRAP_ULPOSC>,
			<&topckgen TOP_MUX_CAMTM>,
			<&topckgen TOP_MUX_VENC>,
			<&topckgen TOP_MUX_CAM>,
			<&topckgen TOP_MUX_IMG1>,
			<&topckgen TOP_MUX_IPE>,
			<&topckgen TOP_MUX_DPMAIF>,
			<&topckgen TOP_MUX_VDEC>,
			<&topckgen TOP_MUX_DISP>,
			<&topckgen TOP_MUX_MDP>,
			<&topckgen TOP_MUX_AUDIO_H>,
			<&topckgen TOP_MUX_UFS>,
			<&topckgen TOP_MUX_AES_FDE>,
			<&topckgen TOP_MUX_ADSP>,
			<&topckgen TOP_MUX_DVFSRC>,
			<&topckgen TOP_MUX_DSI_OCC>,
			<&topckgen TOP_MUX_SPMI_MST>,
			<&topckgen TOP_APLL12_DIV0>,
			<&topckgen TOP_APLL12_DIV1>,
			<&topckgen TOP_APLL12_DIV2>,
			<&topckgen TOP_APLL12_DIV3>,
			<&topckgen TOP_APLL12_DIV4>,
			<&topckgen TOP_APLL12_DIVB>,
			<&topckgen TOP_APLL12_DIV5>,
			<&scpsys SCP_SYS_DIS>,
			<&scpsys SCP_SYS_CAM>,
			<&scpsys SCP_SYS_ISP>,
			<&scpsys SCP_SYS_VEN>,
			<&scpsys SCP_SYS_VDE>,
			<&scpsys SCP_SYS_MFG0>,
			<&scpsys SCP_SYS_MFG1>,
			<&scpsys SCP_SYS_MFG2>,
			<&scpsys SCP_SYS_MFG3>,
			<&scpsys SCP_SYS_ISP2>,
			<&scpsys SCP_SYS_CAM_RAWA>,
			<&scpsys SCP_SYS_CAM_RAWB>,
			<&scpsys SCP_SYS_IPE>,
			<&infracfg_ao INFRACFG_AO_PMIC_CG_TMR>,
			<&infracfg_ao INFRACFG_AO_PMIC_CG_AP>,
			<&infracfg_ao INFRACFG_AO_PMIC_CG_MD>,
			<&infracfg_ao INFRACFG_AO_PMIC_CG_CONN>,
			<&infracfg_ao INFRACFG_AO_SCPSYS_CG>,
			<&infracfg_ao INFRACFG_AO_SEJ_CG>,
			<&infracfg_ao INFRACFG_AO_APXGPT_CG>,
			<&infracfg_ao INFRACFG_AO_ICUSB_CG>,
			<&infracfg_ao INFRACFG_AO_THERM_CG>,
			<&infracfg_ao INFRACFG_AO_I2C_AP_CG>,
			<&infracfg_ao INFRACFG_AO_I2C_CCU_CG>,
			<&infracfg_ao INFRACFG_AO_I2C_SSPM_CG>,
			<&infracfg_ao INFRACFG_AO_I2C_RSV_CG>,
			<&infracfg_ao INFRACFG_AO_PWM_HCLK_CG>,
			<&infracfg_ao INFRACFG_AO_PWM1_CG>,
			<&infracfg_ao INFRACFG_AO_PWM2_CG>,
			<&infracfg_ao INFRACFG_AO_PWM3_CG>,
			<&infracfg_ao INFRACFG_AO_PWM4_CG>,
			<&infracfg_ao INFRACFG_AO_PWM5_CG>,
			<&infracfg_ao INFRACFG_AO_PWM_CG>,
			<&infracfg_ao INFRACFG_AO_UART0_CG>,
			<&infracfg_ao INFRACFG_AO_UART1_CG>,
			<&infracfg_ao INFRACFG_AO_UART2_CG>,
			<&infracfg_ao INFRACFG_AO_UART3_CG>,
			<&infracfg_ao INFRACFG_AO_CQ_DMA_FPC_CG>,
			<&infracfg_ao INFRACFG_AO_BTIF_CG>,
			<&infracfg_ao INFRACFG_AO_SPI0_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC0_CG>,
			<&infracfg_ao INFRACFG_AO_MSDCFDE_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC1_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC2_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC0_SCK_CG>,
			<&infracfg_ao INFRACFG_AO_DVFSRC_CG>,
			<&infracfg_ao INFRACFG_AO_GCPU_CG>,
			<&infracfg_ao INFRACFG_AO_TRNG_CG>,
			<&infracfg_ao INFRACFG_AO_AUXADC_CG>,
			<&infracfg_ao INFRACFG_AO_CPUM_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF1_AP_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF1_MD_CG>,
			<&infracfg_ao INFRACFG_AO_AUXADC_MD_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC1_SCK_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC2_SCK_CG>,
			<&infracfg_ao INFRACFG_AO_AP_DMA_CG>,
			<&infracfg_ao INFRACFG_AO_XIU_CG>,
			<&infracfg_ao INFRACFG_AO_DEVICE_APC_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF_AP_CG>,
			<&infracfg_ao INFRACFG_AO_DEBUGSYS_CG>,
			<&infracfg_ao INFRACFG_AO_AUDIO_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF_MD_CG>,
			<&infracfg_ao INFRACFG_AO_DXCC_SEC_CORE_CG>,
			<&infracfg_ao INFRACFG_AO_DXCC_AO_CG>,
			<&infracfg_ao INFRACFG_AO_IMP_IIC_CG>,
			<&infracfg_ao INFRACFG_AO_DEVMPU_BCLK_CG>,
			<&infracfg_ao INFRACFG_AO_DRAMC_F26M_CG>,
			<&infracfg_ao INFRACFG_AO_PWM_BCLK6_CG>,
			<&infracfg_ao INFRACFG_AO_USB_CG>,
			<&infracfg_ao INFRACFG_AO_DISP_PWM_CG>,
			<&infracfg_ao INFRACFG_AO_CLDMA_BCLK_CG>,
			<&infracfg_ao INFRACFG_AO_AUDIO_26M_BCLK_CK>,
			<&infracfg_ao INFRACFG_AO_SPI1_CG>,
			<&infracfg_ao INFRACFG_AO_I2C4_CG>,
			<&infracfg_ao INFRACFG_AO_MODEM_TEMP_SHARE_CG>,
			<&infracfg_ao INFRACFG_AO_SPI2_CG>,
			<&infracfg_ao INFRACFG_AO_SPI3_CG>,
			<&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>,
			<&infracfg_ao INFRACFG_AO_UNIPRO_TICK_CG>,
			<&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>,
			<&infracfg_ao INFRACFG_AO_MD32_BCLK_CG>,
			<&infracfg_ao INFRACFG_AO_SSPM_CG>,
			<&infracfg_ao INFRACFG_AO_UNIPRO_MBIST_CG>,
			<&infracfg_ao INFRACFG_AO_SSPM_BUS_HCLK_CG>,
			<&infracfg_ao INFRACFG_AO_I2C5_CG>,
			<&infracfg_ao INFRACFG_AO_I2C5_ARBITER_CG>,
			<&infracfg_ao INFRACFG_AO_I2C5_IMM_CG>,
			<&infracfg_ao INFRACFG_AO_I2C1_ARBITER_CG>,
			<&infracfg_ao INFRACFG_AO_I2C1_IMM_CG>,
			<&infracfg_ao INFRACFG_AO_I2C2_ARBITER_CG>,
			<&infracfg_ao INFRACFG_AO_I2C2_IMM_CG>,
			<&infracfg_ao INFRACFG_AO_SPI4_CG>,
			<&infracfg_ao INFRACFG_AO_SPI5_CG>,
			<&infracfg_ao INFRACFG_AO_CQ_DMA_CG>,
			<&infracfg_ao INFRACFG_AO_BIST2FPC_CG>,
			<&infracfg_ao INFRACFG_AO_AES_UFS_CG>,
			<&infracfg_ao INFRACFG_AO_UFS_CG>,
			<&infracfg_ao INFRACFG_AO_UFS_TICK_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC0_SELF_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC1_SELF_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC2_SELF_CG>,
			<&infracfg_ao INFRACFG_AO_SSPM_26M_SELF_CG>,
			<&infracfg_ao INFRACFG_AO_SSPM_32K_SELF_CG>,
			<&infracfg_ao INFRACFG_AO_UFS_AXI_CG>,
			<&infracfg_ao INFRACFG_AO_I2C6_CG>,
			<&infracfg_ao INFRACFG_AO_AP_MSDC0_CG>,
			<&infracfg_ao INFRACFG_AO_MD_MSDC0_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC0_SRCLK_CG>,
			<&infracfg_ao INFRACFG_AO_MSDC1_SRCLK_CG>,
			<&infracfg_ao INFRACFG_AO_PWRAP_TMR_FO_CG>,
			<&infracfg_ao INFRACFG_AO_PWRAP_SPI_FO_CG>,
			<&infracfg_ao INFRACFG_AO_PWRAP_SYS_FO_CG>,
			<&infracfg_ao INFRACFG_AO_SEJ_F13M_CG>,
			<&infracfg_ao INFRACFG_AO_AES_TOP0_BCLK_CG>,
			<&infracfg_ao INFRACFG_AO_MCUPM_BCLK_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF2_AP_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF2_MD_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF3_AP_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF3_MD_CG>,
			<&infracfg_ao INFRACFG_AO_FADSP_26M_CG>,
			<&infracfg_ao INFRACFG_AO_FADSP_32K_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF4_AP_CG>,
			<&infracfg_ao INFRACFG_AO_CCIF4_MD_CG>,
			<&infracfg_ao INFRACFG_AO_DPMAIF_CK>,
			<&infracfg_ao INFRACFG_AO_FADSP_CG>,
			<&apmixed APMIXED_SSUSB26M>,
			<&apmixed APMIXED_APPLL26M>,
			<&apmixed APMIXED_MIPIC0_26M>,
			<&apmixed APMIXED_MDPLLGP26M>,
			<&apmixed APMIXED_MMSYS_F26M>,
			<&apmixed APMIXED_UFS26M>,
			<&apmixed APMIXED_MIPIC1_26M>,
			<&apmixed APMIXED_MEMPLL26M>,
			<&apmixed APMIXED_CLKSQ_LVPLL_26M>,
			<&apmixed APMIXED_MIPID0_26M>,
			<&apmixed APMIXED_MIPID1_26M>,
			<&mfgcfg MFGCFG_BG3D>,
			<&audio AUDIO_AFE>,
			<&audio AUDIO_22M>,
			<&audio AUDIO_24M>,
			<&audio AUDIO_APLL2_TUNER>,
			<&audio AUDIO_APLL_TUNER>,
			<&audio AUDIO_TDM>,
			<&audio AUDIO_ADC>,
			<&audio AUDIO_DAC>,
			<&audio AUDIO_DAC_PREDIS>,
			<&audio AUDIO_TML>,
			<&audio AUDIO_NLE>,
			<&audio AUDIO_I2S1_BCLK_SW>,
			<&audio AUDIO_I2S2_BCLK_SW>,
			<&audio AUDIO_I2S3_BCLK_SW>,
			<&audio AUDIO_I2S4_BCLK_SW>,
			<&audio AUDIO_I2S5_BCLK_SW>,
			<&audio AUDIO_CONN_I2S_ASRC>,
			<&audio AUDIO_GENERAL1_ASRC>,
			<&audio AUDIO_GENERAL2_ASRC>,
			<&audio AUDIO_DAC_HIRES>,
			<&audio AUDIO_ADC_HIRES>,
			<&audio AUDIO_ADC_HIRES_TML>,
			<&audio AUDIO_PDN_ADDA6_ADC>,
			<&audio AUDIO_ADDA6_ADC_HIRES>,
			<&audio AUDIO_3RD_DAC>,
			<&audio AUDIO_3RD_DAC_PREDIS>,
			<&audio AUDIO_3RD_DAC_TML>,
			<&audio AUDIO_3RD_DAC_HIRES>,
			<&audio AUDIO_ETDM_IN1_BCLK_SW>,
			<&audio AUDIO_ETDM_OUT1_BCLK_SW>,
			<&camsys CLK_CAM_M_LARB13>,
			<&camsys CLK_CAM_M_DFP_VAD>,
			<&camsys CLK_CAM_M_LARB14>,
			<&camsys CLK_CAM_M_RESERVED0>,
			<&camsys CLK_CAM_M_CAM>,
			<&camsys CLK_CAM_M_CAMTG>,
			<&camsys CLK_CAM_M_SENINF>,
			<&camsys CLK_CAM_M_CAMSV1>,
			<&camsys CLK_CAM_M_CAMSV2>,
			<&camsys CLK_CAM_M_CAMSV3>,
			<&camsys CLK_CAM_M_CCU0>,
			<&camsys CLK_CAM_M_CCU1>,
			<&camsys CLK_CAM_M_MRAW0>,
			<&camsys CLK_CAM_M_RESERVED2>,
			<&camsys CLK_CAM_M_FAKE_ENG>,
			<&camsys CLK_CAM_M_CCU_GALS>,
			<&camsys CLK_CAM_M_CAM2MM_GALS>,
			<&camsys_rawa CLK_CAM_RA_LARBX>,
			<&camsys_rawa CLK_CAM_RA_CAM>,
			<&camsys_rawa CLK_CAM_RA_CAMTG>,
			<&camsys_rawb CLK_CAM_RB_LARBX>,
			<&camsys_rawb CLK_CAM_RB_CAM>,
			<&camsys_rawb CLK_CAM_RB_CAMTG>,
			<&imgsys1 CLK_IMGSYS1_LARB9>,
			<&imgsys1 CLK_IMGSYS1_LARB10>,
			<&imgsys1 CLK_IMGSYS1_DIP>,
			<&imgsys1 CLK_IMGSYS1_GALS>,
			<&imgsys2 CLK_IMGSYS2_LARB9>,
			<&imgsys2 CLK_IMGSYS2_LARB10>,
			<&imgsys2 CLK_IMGSYS2_MFB>,
			<&imgsys2 CLK_IMGSYS2_WPE>,
			<&imgsys2 CLK_IMGSYS2_MSS>,
			<&imgsys2 CLK_IMGSYS2_GALS>,
			<&ipesys CLK_IPE_LARB19>,
			<&ipesys CLK_IPE_LARB20>,
			<&ipesys CLK_IPE_SMI_SUBCOM>,
			<&ipesys CLK_IPE_FD>,
			<&ipesys CLK_IPE_FE>,
			<&ipesys CLK_IPE_RSC>,
			<&ipesys CLK_IPE_DPE>,
			<&ipesys CLK_IPE_GALS>,
			<&mmsys_config CLK_MM_DISP_MUTEX0>,
			<&mmsys_config CLK_MM_APB_BUS>,
			<&mmsys_config CLK_MM_DISP_OVL0>,
			<&mmsys_config CLK_MM_DISP_RDMA0>,
			<&mmsys_config CLK_MM_DISP_OVL0_2L>,
			<&mmsys_config CLK_MM_DISP_WDMA0>,
			<&mmsys_config CLK_MM_DISP_CCORR1>,
			<&mmsys_config CLK_MM_DISP_RSZ0>,
			<&mmsys_config CLK_MM_DISP_AAL0>,
			<&mmsys_config CLK_MM_DISP_CCORR0>,
			<&mmsys_config CLK_MM_DISP_COLOR0>,
			<&mmsys_config CLK_MM_SMI_INFRA>,
			<&mmsys_config CLK_MM_DISP_DSC_WRAP>,
			<&mmsys_config CLK_MM_DISP_GAMMA0>,
			<&mmsys_config CLK_MM_DISP_POSTMASK0>,
			<&mmsys_config CLK_MM_DISP_SPR0>,
			<&mmsys_config CLK_MM_DISP_DITHER0>,
			<&mmsys_config CLK_MM_SMI_COMMON>,
			<&mmsys_config CLK_MM_DISP_CM0>,
			<&mmsys_config CLK_MM_DSI0>,
			<&mmsys_config CLK_MM_DISP_FAKE_ENG0>,
			<&mmsys_config CLK_MM_DISP_FAKE_ENG1>,
			<&mmsys_config CLK_MM_SMI_GALS>,
			<&mmsys_config CLK_MM_SMI_IOMMU>,
			<&mmsys_config CLK_MM_DSI0_DSI_CK_DOMAIN>,
			<&mmsys_config CLK_MM_DISP_26M>,
			<&mdpsys_config CLK_MDP_RDMA0>,
			<&mdpsys_config CLK_MDP_TDSHP0>,
			<&mdpsys_config CLK_MDP_IMG_DL_ASYNC0>,
			<&mdpsys_config CLK_MDP_IMG_DL_ASYNC1>,
			<&mdpsys_config CLK_MDP_RDMA1>,
			<&mdpsys_config CLK_MDP_TDSHP1>,
			<&mdpsys_config CLK_MDP_SMI0>,
			<&mdpsys_config CLK_MDP_APB_BUS>,
			<&mdpsys_config CLK_MDP_WROT0>,
			<&mdpsys_config CLK_MDP_RSZ0>,
			<&mdpsys_config CLK_MDP_HDR0>,
			<&mdpsys_config CLK_MDP_MUTEX0>,
			<&mdpsys_config CLK_MDP_WROT1>,
			<&mdpsys_config CLK_MDP_RSZ1>,
			<&mdpsys_config CLK_MDP_FAKE_ENG0>,
			<&mdpsys_config CLK_MDP_AAL0>,
			<&mdpsys_config CLK_MDP_AAL1>,
			<&mdpsys_config CLK_MDP_COLOR0>,
			<&mdpsys_config CLK_MDP_IMG_DL_RELAY0_ASYNC0>,
			<&mdpsys_config CLK_MDP_IMG_DL_RELAY1_ASYNC1>,
			<&vdec_gcon VDEC_VDEC>,
			<&vdec_gcon VDEC_LARB1>,
			<&vdec_gcon VDEC_LAT>,
			<&venc_gcon VENC_GCON_LARB>,
			<&venc_gcon VENC_GCON_VENC>,
			<&venc_gcon VENC_GCON_JPGENC>,
			<&venc_gcon VENC_GCON_GALS>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C0>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C1>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C2>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C3>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C4>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C5>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C6>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C7>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C8>,
			<&imp_iic_wrap CLK_IMP_AP_CLOCK_RO_I2C9>;
	};
};