/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2019 MediaTek Inc.
*/

#ifndef __M4U_PORT_H__
#define __M4U_PORT_H__

/* ==================================== */
/* about portid */
/* ==================================== */
enum{
	/*larb0 */
	M4U_PORT_DISP_OVL0,
	M4U_PORT_DISP_2L_OVL0_LARB0,
	M4U_PORT_DISP_RDMA0,
	M4U_PORT_DISP_WDMA0,
	M4U_PORT_MDP_RDMA0,
	M4U_PORT_MDP_WDMA0,
	M4U_PORT_MDP_WROT0,
	M4U_PORT_DISP_FAKE0,
	/*larb1 */
	M4U_PORT_HW_VDEC_MC_EXT,
	M4U_PORT_HW_VDEC_PP_EXT,
	M4U_PORT_HW_VDEC_VLD_EXT,
	M4U_PORT_HW_VDEC_VLD2_EXT,
	M4U_PORT_HW_VDEC_AVC_MV_EXT,
	M4U_PORT_HW_VDEC_PRED_RD_EXT,
	M4U_PORT_HW_VDEC_PRED_WR_EXT,
	M4U_PORT_HW_VDEC_PPWRAP_EXT,
	M4U_PORT_HW_VDEC_TILE_EXT,
	/*larb2 */
	M4U_PORT_CAM_IMGI,
	M4U_PORT_CAM_IMG2O,
	M4U_PORT_CAM_IMG3O,
	M4U_PORT_CAM_VIPI,
	M4U_PORT_CAM_LCEI,
	M4U_PORT_CAM_FD_RP,
	M4U_PORT_CAM_FD_WR,
	M4U_PORT_CAM_FD_RB,
	M4U_PORT_CAM_DPE_RDMA,
	M4U_PORT_CAM_DPE_WDMA,
	M4U_PORT_CAM_RSC_RDMA,
	M4U_PORT_CAM_RSC_WDMA,
	/*larb3 */
	M4U_PORT_CAM_IMGO,
	M4U_PORT_CAM_RRZO,
	M4U_PORT_CAM_AAO,
	M4U_PORT_CAM_AFO,
	M4U_PORT_CAM_LSCI0,
	M4U_PORT_CAM_LSCI1,
	M4U_PORT_CAM_PDO,
	M4U_PORT_CAM_BPCI,
	M4U_PORT_CAM_LCSO,
	M4U_PORT_CAM_RSSO_A,
	M4U_PORT_CAM_RSSO_B,
	M4U_PORT_CAM_UFEO,
	M4U_PORT_CAM_SOC0,
	M4U_PORT_CAM_SOC1,
	M4U_PORT_CAM_SOC2,
	M4U_PORT_CAM_CCUI,
	M4U_PORT_CAM_CCUO,
	M4U_PORT_CAM_CACI,
	M4U_PORT_CAM_RAWI_A,
	M4U_PORT_CAM_RAWI_B,
	M4U_PORT_CAM_CCUG,
	/*larb4 */
	M4U_PORT_VENC_RCPU,
	M4U_PORT_VENC_REC,
	M4U_PORT_VENC_BSDMA,
	M4U_PORT_VENC_SV_COMV,
	M4U_PORT_VENC_RD_COMV,
	M4U_PORT_JPGENC_RDMA,
	M4U_PORT_JPGENC_BSDMA,
	M4U_PORT_VENC_CUR_LUMA,
	M4U_PORT_VENC_CUR_CHROMA,
	M4U_PORT_VENC_REF_LUMA,
	M4U_PORT_VENC_REF_CHROMA,

	M4U_PORT_UNKNOWN
};

#define M4U_PORT_NR M4U_PORT_UNKNOWN
#define M4U_PORT_MIN 0
#endif