/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2019 MediaTek Inc.
*/

#ifndef __M4U_PORT_H__
#define __M4U_PORT_H__

/* ==================================== */
/* about portid */
/* ==================================== */

enum {
	/*larb0 -MMSYS-9*/
	M4U_PORT_DISP_POSTMASK0,
	M4U_PORT_DISP_OVL0_HDR,
	M4U_PORT_DISP_OVL1_HDR,
	M4U_PORT_DISP_OVL0,
	M4U_PORT_DISP_OVL1,
	M4U_PORT_DISP_PVRIC0,
	M4U_PORT_DISP_RDMA0,
	M4U_PORT_DISP_WDMA0,
	M4U_PORT_DISP_FAKE0,

	/*larb1-MMSYS-14*/
	M4U_PORT_DISP_OVL0_2L_HDR,
	M4U_PORT_DISP_OVL1_2L_HDR,
	M4U_PORT_DISP_OVL0_2L,
	M4U_PORT_DISP_OVL1_2L,
	M4U_PORT_DISP_RDMA1,
	M4U_PORT_MDP_PVRIC0,
	M4U_PORT_MDP_PVRIC1,
	M4U_PORT_MDP_RDMA0,
	M4U_PORT_MDP_RDMA1,
	M4U_PORT_MDP_WROT0_R,
	M4U_PORT_MDP_WROT0_W,
	M4U_PORT_MDP_WROT1_R,
	M4U_PORT_MDP_WROT1_W,
	M4U_PORT_DISP_FAKE1,

	/*larb2-VDEC-12*/
	M4U_PORT_HW_VDEC_MC_EXT,
	M4U_PORT_HW_VDEC_UFO_EXT,
	M4U_PORT_HW_VDEC_PP_EXT,
	M4U_PORT_HW_VDEC_PRED_RD_EXT,
	M4U_PORT_HW_VDEC_PRED_WR_EXT,
	M4U_PORT_HW_VDEC_PPWRAP_EXT,
	M4U_PORT_HW_VDEC_TILE_EXT,
	M4U_PORT_HW_VDEC_VLD_EXT,
	M4U_PORT_HW_VDEC_VLD2_EXT,
	M4U_PORT_HW_VDEC_AVC_MV_EXT,
	M4U_PORT_HW_VDEC_UFO_ENC_EXT,
	M4U_PORT_HW_VDEC_RG_CTRL_DMA_EXT,

	/*larb3-VENC-19*/
	M4U_PORT_VENC_RCPU,
	M4U_PORT_VENC_REC,
	M4U_PORT_VENC_BSDMA,
	M4U_PORT_VENC_SV_COMV,
	M4U_PORT_VENC_RD_COMV,
	M4U_PORT_VENC_NBM_RDMA,
	M4U_PORT_VENC_NBM_RDMA_LITE,
	M4U_PORT_JPGENC_Y_RDMA,
	M4U_PORT_JPGENC_C_RDMA,
	M4U_PORT_JPGENC_Q_TABLE,
	M4U_PORT_JPGENC_BSDMA,
	M4U_PORT_JPGDEC_WDMA,
	M4U_PORT_JPGDEC_BSDMA,
	M4U_PORT_VENC_NBM_WDMA,
	M4U_PORT_VENC_NBM_WDMA_LITE,
	M4U_PORT_VENC_CUR_LUMA,
	M4U_PORT_VENC_CUR_CHROMA,
	M4U_PORT_VENC_REF_LUMA,
	M4U_PORT_VENC_REF_CHROMA,

	/* larb4-IMG-3
	 * HW disconnected
	 * Jolin Chou
	M4U_PORT_IPUO_LARB4,
	M4U_PORT_IPU3O_LARB4,
	M4U_PORT_IPUI_LARB4,
	*/

	/*larb5-CAM-26*/
	M4U_PORT_IMGI,
	M4U_PORT_IMG2O,
	M4U_PORT_IMG3O,
	M4U_PORT_VIPI,
	M4U_PORT_LCEI,
	M4U_PORT_SMXI,
	M4U_PORT_SMXO,
	M4U_PORT_WPE0_RDMA1,
	M4U_PORT_WPE0_RDMA0,
	M4U_PORT_WPE0_WDMA,
	M4U_PORT_FDVT_RDB,
	M4U_PORT_FDVT_WRA,
	M4U_PORT_FDVT_RDA,
	M4U_PORT_WPE1_RDMA0,
	M4U_PORT_WPE1_RDMA1,
	M4U_PORT_WPE1_WDMA,
	M4U_PORT_DPE_RDMA,
	M4U_PORT_DPE_WDMA,
	M4U_PORT_MFB_RDMA0,
	M4U_PORT_MFB_RDMA1,
	M4U_PORT_MFB_WDMA,
	M4U_PORT_RSC_RDMA0,
	M4U_PORT_RSC_WDMA,
	M4U_PORT_OWE_RDMA,
	M4U_PORT_OWE_WDMA,
	M4U_PORT_FDVT_WRB,

	/*larb6-CAM-31*/
	M4U_PORT_IMGO,
	M4U_PORT_RRZO,
	M4U_PORT_AAO,
	M4U_PORT_AFO,
	M4U_PORT_LSCI_0,
	M4U_PORT_LSCI_1,
	M4U_PORT_PDO,
	M4U_PORT_BPCI,
	M4U_PORT_LSCO,
	M4U_PORT_RSSO_A,//M4U_PORT_AFO_1,
	M4U_PORT_UFEO,//M4U_PORT_PSO,
	M4U_PORT_SOCO,//M4U_PORT_LSCI_2,
	M4U_PORT_SOC1,
	M4U_PORT_SOC2,
	M4U_PORT_CCUI,
	M4U_PORT_CCUO,
	M4U_PORT_RAWI_A,
	M4U_PORT_CCUG,
	M4U_PORT_PSO,
	M4U_PORT_AFO_1,
	M4U_PORT_LSCI_2,
	M4U_PORT_PDI,
	M4U_PORT_FLKO,
	M4U_PORT_LMVO,
	M4U_PORT_UFGO,
	M4U_PORT_SPARE,
	M4U_PORT_SPARE_2,
	M4U_PORT_SPARE_3,
	M4U_PORT_SPARE_4,
	M4U_PORT_SPARE_5,
	FAKE_ENGINE,

	/*larb7-CAM-5
	M4U_PORT_IPUO,
	M4U_PORT_IPU2O,
	M4U_PORT_IPU3O,
	M4U_PORT_IPUI,
	M4U_PORT_IPU2I,
	*/

	/* smi common */
	M4U_PORT_CCU0,
	M4U_PORT_CCU1,

	M4U_PORT_VPU,

	M4U_PORT_UNKNOWN,
};
#define M4U_PORT_NR M4U_PORT_UNKNOWN

#endif