/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2019 MediaTek Inc.
*/

#include <linux/kernel.h>
#include <linux/module.h>

#include <mach/upmu_sw.h>
#include <mach/upmu_hw.h>
#include <mt-plat/upmu_common.h>

unsigned int mt6359_upmu_get_top0_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_ID),
		(&val),
		(PMIC_TOP0_ANA_ID_MASK),
		(PMIC_TOP0_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_ID),
		(&val),
		(PMIC_TOP0_DIG_ID_MASK),
		(PMIC_TOP0_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_REV0),
		(&val),
		(PMIC_TOP0_ANA_MINOR_REV_MASK),
		(PMIC_TOP0_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_REV0),
		(&val),
		(PMIC_TOP0_ANA_MAJOR_REV_MASK),
		(PMIC_TOP0_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_REV0),
		(&val),
		(PMIC_TOP0_DIG_MINOR_REV_MASK),
		(PMIC_TOP0_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_REV0),
		(&val),
		(PMIC_TOP0_DIG_MAJOR_REV_MASK),
		(PMIC_TOP0_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_DSN_DBI),
		(&val),
		(PMIC_TOP0_DSN_CBS_MASK),
		(PMIC_TOP0_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_DSN_DBI),
		(&val),
		(PMIC_TOP0_DSN_BIX_MASK),
		(PMIC_TOP0_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_DSN_DBI),
		(&val),
		(PMIC_TOP0_DSN_ESP_MASK),
		(PMIC_TOP0_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top0_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP0_DSN_DXI),
		(&val),
		(PMIC_TOP0_DSN_FPI_MASK),
		(PMIC_TOP0_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hwcid(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HWCID),
		(&val),
		(PMIC_HWCID_MASK),
		(PMIC_HWCID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_swcid(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SWCID),
		(&val),
		(PMIC_SWCID_MASK),
		(PMIC_SWCID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_pwrkey(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PONSTS),
		(&val),
		(PMIC_STS_PWRKEY_MASK),
		(PMIC_STS_PWRKEY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_rtca(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PONSTS),
		(&val),
		(PMIC_STS_RTCA_MASK),
		(PMIC_STS_RTCA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_chrin(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PONSTS),
		(&val),
		(PMIC_STS_CHRIN_MASK),
		(PMIC_STS_CHRIN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_spar(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PONSTS),
		(&val),
		(PMIC_STS_SPAR_MASK),
		(PMIC_STS_SPAR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_rboot(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PONSTS),
		(&val),
		(PMIC_STS_RBOOT_MASK),
		(PMIC_STS_RBOOT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_uvlo(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_UVLO_MASK),
		(PMIC_STS_UVLO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_pgfail(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_PGFAIL_MASK),
		(PMIC_STS_PGFAIL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_psoc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_PSOC_MASK),
		(PMIC_STS_PSOC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_thrdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_THRDN_MASK),
		(PMIC_STS_THRDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_wrst(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_WRST_MASK),
		(PMIC_STS_WRST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_crst(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_CRST_MASK),
		(PMIC_STS_CRST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_pkeylp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_PKEYLP_MASK),
		(PMIC_STS_PKEYLP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_normoff(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_NORMOFF_MASK),
		(PMIC_STS_NORMOFF_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_bwdt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_BWDT_MASK),
		(PMIC_STS_BWDT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_ddlo(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_DDLO_MASK),
		(PMIC_STS_DDLO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_wdt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_WDT_MASK),
		(PMIC_STS_WDT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_pupsrc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_PUPSRC_MASK),
		(PMIC_STS_PUPSRC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_keypwr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_KEYPWR_MASK),
		(PMIC_STS_KEYPWR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_pksp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_PKSP_MASK),
		(PMIC_STS_PKSP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sts_ovlo(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_POFFSTS),
		(&val),
		(PMIC_STS_OVLO_MASK),
		(PMIC_STS_OVLO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_poffsts_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSTSCTL),
		(val),
		(PMIC_RG_POFFSTS_CLR_MASK),
		(PMIC_RG_POFFSTS_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ponsts_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSTSCTL),
		(val),
		(PMIC_RG_PONSTS_CLR_MASK),
		(PMIC_RG_PONSTS_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_vm18_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VM18_PG_DEB_MASK),
		(PMIC_VM18_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vio18_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VIO18_PG_DEB_MASK),
		(PMIC_VIO18_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vufs_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VUFS_PG_DEB_MASK),
		(PMIC_VUFS_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vbbck_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VBBCK_PG_DEB_MASK),
		(PMIC_VBBCK_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vrfck_1_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VRFCK_1_PG_DEB_MASK),
		(PMIC_VRFCK_1_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vs1_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VS1_PG_DEB_MASK),
		(PMIC_VS1_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_va12_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VA12_PG_DEB_MASK),
		(PMIC_VA12_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_va09_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VA09_PG_DEB_MASK),
		(PMIC_VA09_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vs2_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VS2_PG_DEB_MASK),
		(PMIC_VS2_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vmodem_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VMODEM_PG_DEB_MASK),
		(PMIC_VMODEM_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vpu_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VPU_PG_DEB_MASK),
		(PMIC_VPU_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vgpu12_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VGPU12_PG_DEB_MASK),
		(PMIC_VGPU12_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vgpu11_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VGPU11_PG_DEB_MASK),
		(PMIC_VGPU11_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vcore_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VCORE_PG_DEB_MASK),
		(PMIC_VCORE_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vaux18_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VAUX18_PG_DEB_MASK),
		(PMIC_VAUX18_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vxo22_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS0),
		(&val),
		(PMIC_VXO22_PG_DEB_MASK),
		(PMIC_VXO22_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vrf18_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VRF18_PG_DEB_MASK),
		(PMIC_VRF18_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vusb_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VUSB_PG_DEB_MASK),
		(PMIC_VUSB_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vaud18_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VAUD18_PG_DEB_MASK),
		(PMIC_VAUD18_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vsram_proc1_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VSRAM_PROC1_PG_DEB_MASK),
		(PMIC_VSRAM_PROC1_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vproc1_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VPROC1_PG_DEB_MASK),
		(PMIC_VPROC1_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vsram_proc2_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VSRAM_PROC2_PG_DEB_MASK),
		(PMIC_VSRAM_PROC2_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vproc2_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VPROC2_PG_DEB_MASK),
		(PMIC_VPROC2_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vsram_md_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VSRAM_MD_PG_DEB_MASK),
		(PMIC_VSRAM_MD_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vsram_others_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VSRAM_OTHERS_PG_DEB_MASK),
		(PMIC_VSRAM_OTHERS_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vemc_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_VEMC_PG_DEB_MASK),
		(PMIC_VEMC_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ext_pmic_pg_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_DEB_STS1),
		(&val),
		(PMIC_EXT_PMIC_PG_DEB_MASK),
		(PMIC_EXT_PMIC_PG_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vm18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VM18_PG_STATUS_MASK),
		(PMIC_STRUP_VM18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vio18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VIO18_PG_STATUS_MASK),
		(PMIC_STRUP_VIO18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vufs_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VUFS_PG_STATUS_MASK),
		(PMIC_STRUP_VUFS_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vbbck_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VBBCK_PG_STATUS_MASK),
		(PMIC_STRUP_VBBCK_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vrfck_1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VRFCK_1_PG_STATUS_MASK),
		(PMIC_STRUP_VRFCK_1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vs1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VS1_PG_STATUS_MASK),
		(PMIC_STRUP_VS1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_va12_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VA12_PG_STATUS_MASK),
		(PMIC_STRUP_VA12_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_va09_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VA09_PG_STATUS_MASK),
		(PMIC_STRUP_VA09_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vs2_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VS2_PG_STATUS_MASK),
		(PMIC_STRUP_VS2_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vmodem_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VMODEM_PG_STATUS_MASK),
		(PMIC_STRUP_VMODEM_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vpu_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VPU_PG_STATUS_MASK),
		(PMIC_STRUP_VPU_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vgpu12_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VGPU12_PG_STATUS_MASK),
		(PMIC_STRUP_VGPU12_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vgpu11_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VGPU11_PG_STATUS_MASK),
		(PMIC_STRUP_VGPU11_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vcore_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VCORE_PG_STATUS_MASK),
		(PMIC_STRUP_VCORE_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vaux18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VAUX18_PG_STATUS_MASK),
		(PMIC_STRUP_VAUX18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vxo22_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS0),
		(&val),
		(PMIC_STRUP_VXO22_PG_STATUS_MASK),
		(PMIC_STRUP_VXO22_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vrf18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VRF18_PG_STATUS_MASK),
		(PMIC_STRUP_VRF18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vusb_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VUSB_PG_STATUS_MASK),
		(PMIC_STRUP_VUSB_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vaud18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VAUD18_PG_STATUS_MASK),
		(PMIC_STRUP_VAUD18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_proc1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_PROC1_PG_STATUS_MASK),
		(PMIC_STRUP_VSRAM_PROC1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vproc1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VPROC1_PG_STATUS_MASK),
		(PMIC_STRUP_VPROC1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_proc2_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_PROC2_PG_STATUS_MASK),
		(PMIC_STRUP_VSRAM_PROC2_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vproc2_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VPROC2_PG_STATUS_MASK),
		(PMIC_STRUP_VPROC2_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_md_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_MD_PG_STATUS_MASK),
		(PMIC_STRUP_VSRAM_MD_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_others_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_OTHERS_PG_STATUS_MASK),
		(PMIC_STRUP_VSRAM_OTHERS_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vemc_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_VEMC_PG_STATUS_MASK),
		(PMIC_STRUP_VEMC_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_ext_pmic_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PG_SDN_STS1),
		(&val),
		(PMIC_STRUP_EXT_PMIC_PG_STATUS_MASK),
		(PMIC_STRUP_EXT_PMIC_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vm18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VM18_OC_STATUS_MASK),
		(PMIC_STRUP_VM18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vio18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VIO18_OC_STATUS_MASK),
		(PMIC_STRUP_VIO18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vufs_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VUFS_OC_STATUS_MASK),
		(PMIC_STRUP_VUFS_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vbbck_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VBBCK_OC_STATUS_MASK),
		(PMIC_STRUP_VBBCK_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vrfck_1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VRFCK_1_OC_STATUS_MASK),
		(PMIC_STRUP_VRFCK_1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vs1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VS1_OC_STATUS_MASK),
		(PMIC_STRUP_VS1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_va12_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VA12_OC_STATUS_MASK),
		(PMIC_STRUP_VA12_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_va09_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VA09_OC_STATUS_MASK),
		(PMIC_STRUP_VA09_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vs2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VS2_OC_STATUS_MASK),
		(PMIC_STRUP_VS2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vmodem_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VMODEM_OC_STATUS_MASK),
		(PMIC_STRUP_VMODEM_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vpu_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VPU_OC_STATUS_MASK),
		(PMIC_STRUP_VPU_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vgpu12_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VGPU12_OC_STATUS_MASK),
		(PMIC_STRUP_VGPU12_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vgpu11_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VGPU11_OC_STATUS_MASK),
		(PMIC_STRUP_VGPU11_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vcore_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VCORE_OC_STATUS_MASK),
		(PMIC_STRUP_VCORE_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vaux18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VAUX18_OC_STATUS_MASK),
		(PMIC_STRUP_VAUX18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vxo22_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS0),
		(&val),
		(PMIC_STRUP_VXO22_OC_STATUS_MASK),
		(PMIC_STRUP_VXO22_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vrf18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VRF18_OC_STATUS_MASK),
		(PMIC_STRUP_VRF18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vusb_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VUSB_OC_STATUS_MASK),
		(PMIC_STRUP_VUSB_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vaud18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VAUD18_OC_STATUS_MASK),
		(PMIC_STRUP_VAUD18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_proc1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_PROC1_OC_STATUS_MASK),
		(PMIC_STRUP_VSRAM_PROC1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vproc1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VPROC1_OC_STATUS_MASK),
		(PMIC_STRUP_VPROC1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_proc2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_PROC2_OC_STATUS_MASK),
		(PMIC_STRUP_VSRAM_PROC2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vproc2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VPROC2_OC_STATUS_MASK),
		(PMIC_STRUP_VPROC2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_md_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_MD_OC_STATUS_MASK),
		(PMIC_STRUP_VSRAM_MD_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vsram_others_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VSRAM_OTHERS_OC_STATUS_MASK),
		(PMIC_STRUP_VSRAM_OTHERS_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_vemc_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OC_SDN_STS1),
		(&val),
		(PMIC_STRUP_VEMC_OC_STATUS_MASK),
		(PMIC_STRUP_VEMC_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pmu_thermal_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_THERMALSTATUS),
		(&val),
		(PMIC_PMU_THERMAL_DEB_MASK),
		(PMIC_PMU_THERMAL_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_thermal_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_THERMALSTATUS),
		(&val),
		(PMIC_STRUP_THERMAL_STATUS_MASK),
		(PMIC_STRUP_THERMAL_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in0_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CON),
		(val),
		(PMIC_RG_SRCLKEN_IN0_EN_MASK),
		(PMIC_RG_SRCLKEN_IN0_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in0_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CON),
		(&val),
		(PMIC_RG_SRCLKEN_IN0_EN_MASK),
		(PMIC_RG_SRCLKEN_IN0_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in0_hw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CON),
		(val),
		(PMIC_RG_SRCLKEN_IN0_HW_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN0_HW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in0_hw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CON),
		(&val),
		(PMIC_RG_SRCLKEN_IN0_HW_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN0_HW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CON),
		(val),
		(PMIC_RG_SRCLKEN_IN1_EN_MASK),
		(PMIC_RG_SRCLKEN_IN1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CON),
		(&val),
		(PMIC_RG_SRCLKEN_IN1_EN_MASK),
		(PMIC_RG_SRCLKEN_IN1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in1_hw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CON),
		(val),
		(PMIC_RG_SRCLKEN_IN1_HW_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN1_HW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in1_hw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CON),
		(&val),
		(PMIC_RG_SRCLKEN_IN1_HW_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN1_HW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in_sync_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CON),
		(val),
		(PMIC_RG_SRCLKEN_IN_SYNC_EN_MASK),
		(PMIC_RG_SRCLKEN_IN_SYNC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in_sync_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CON),
		(&val),
		(PMIC_RG_SRCLKEN_IN_SYNC_EN_MASK),
		(PMIC_RG_SRCLKEN_IN_SYNC_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_osc_en_auto_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CON),
		(val),
		(PMIC_RG_OSC_EN_AUTO_OFF_MASK),
		(PMIC_RG_OSC_EN_AUTO_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_osc_en_auto_off(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CON),
		(&val),
		(PMIC_RG_OSC_EN_AUTO_OFF_MASK),
		(PMIC_RG_OSC_EN_AUTO_OFF_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_test_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TEST_OUT),
		(&val),
		(PMIC_TEST_OUT_MASK),
		(PMIC_TEST_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TEST_CON0),
		(val),
		(PMIC_RG_MON_FLAG_SEL_MASK),
		(PMIC_RG_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mon_grp_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TEST_CON0),
		(val),
		(PMIC_RG_MON_GRP_SEL_MASK),
		(PMIC_RG_MON_GRP_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_nandtree_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TEST_CON1),
		(val),
		(PMIC_RG_NANDTREE_MODE_MASK),
		(PMIC_RG_NANDTREE_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_nandtree_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TEST_CON1),
		(&val),
		(PMIC_RG_NANDTREE_MODE_MASK),
		(PMIC_RG_NANDTREE_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_test_auxadc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TEST_CON1),
		(val),
		(PMIC_RG_TEST_AUXADC_MASK),
		(PMIC_RG_TEST_AUXADC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_efuse_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TEST_CON1),
		(val),
		(PMIC_RG_EFUSE_MODE_MASK),
		(PMIC_RG_EFUSE_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_efuse_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TEST_CON1),
		(&val),
		(PMIC_RG_EFUSE_MODE_MASK),
		(PMIC_RG_EFUSE_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_test_strup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TEST_CON1),
		(val),
		(PMIC_RG_TEST_STRUP_MASK),
		(PMIC_RG_TEST_STRUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_testmode_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TESTMODE_SW),
		(val),
		(PMIC_TESTMODE_SW_MASK),
		(PMIC_TESTMODE_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_pmu_test_mode_scan(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOPSTATUS),
		(&val),
		(PMIC_PMU_TEST_MODE_SCAN_MASK),
		(PMIC_PMU_TEST_MODE_SCAN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pwrkey_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOPSTATUS),
		(&val),
		(PMIC_PWRKEY_DEB_MASK),
		(PMIC_PWRKEY_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOPSTATUS),
		(&val),
		(PMIC_CHRDET_DEB_MASK),
		(PMIC_CHRDET_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_homekey_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOPSTATUS),
		(&val),
		(PMIC_HOMEKEY_DEB_MASK),
		(PMIC_HOMEKEY_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pmu_tdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TDSEL_CON),
		(val),
		(PMIC_RG_PMU_TDSEL_MASK),
		(PMIC_RG_PMU_TDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_tdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TDSEL_CON),
		(val),
		(PMIC_RG_SPI_TDSEL_MASK),
		(PMIC_RG_SPI_TDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_tdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TDSEL_CON),
		(val),
		(PMIC_RG_AUD_TDSEL_MASK),
		(PMIC_RG_AUD_TDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_e32cal_tdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TDSEL_CON),
		(val),
		(PMIC_RG_E32CAL_TDSEL_MASK),
		(PMIC_RG_E32CAL_TDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pmu_rdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RDSEL_CON),
		(val),
		(PMIC_RG_PMU_RDSEL_MASK),
		(PMIC_RG_PMU_RDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_rdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RDSEL_CON),
		(val),
		(PMIC_RG_SPI_RDSEL_MASK),
		(PMIC_RG_SPI_RDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_rdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RDSEL_CON),
		(val),
		(PMIC_RG_AUD_RDSEL_MASK),
		(PMIC_RG_AUD_RDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_e32cal_rdsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RDSEL_CON),
		(val),
		(PMIC_RG_E32CAL_RDSEL_MASK),
		(PMIC_RG_E32CAL_RDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_wdtrstb_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_WDTRSTB_IN_MASK),
		(PMIC_RG_SMT_WDTRSTB_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_srclken_in0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_SRCLKEN_IN0_MASK),
		(PMIC_RG_SMT_SRCLKEN_IN0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_srclken_in1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_SRCLKEN_IN1_MASK),
		(PMIC_RG_SMT_SRCLKEN_IN1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_rtc_32k1v8_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_RTC_32K1V8_0_MASK),
		(PMIC_RG_SMT_RTC_32K1V8_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_rtc_32k1v8_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_RTC_32K1V8_1_MASK),
		(PMIC_RG_SMT_RTC_32K1V8_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_homekey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_HOMEKEY_MASK),
		(PMIC_RG_SMT_HOMEKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_scp_vreq_vao(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON0),
		(val),
		(PMIC_RG_SMT_SCP_VREQ_VAO_MASK),
		(PMIC_RG_SMT_SCP_VREQ_VAO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_spi_clk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_SPI_CLK_MASK),
		(PMIC_RG_SMT_SPI_CLK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_spi_csn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_SPI_CSN_MASK),
		(PMIC_RG_SMT_SPI_CSN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_spi_mosi(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_SPI_MOSI_MASK),
		(PMIC_RG_SMT_SPI_MOSI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_spi_miso(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_SPI_MISO_MASK),
		(PMIC_RG_SMT_SPI_MISO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_clk_mosi(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_CLK_MOSI_MASK),
		(PMIC_RG_SMT_AUD_CLK_MOSI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_dat_mosi0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_DAT_MOSI0_MASK),
		(PMIC_RG_SMT_AUD_DAT_MOSI0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_dat_mosi1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_DAT_MOSI1_MASK),
		(PMIC_RG_SMT_AUD_DAT_MOSI1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_dat_mosi2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_DAT_MOSI2_MASK),
		(PMIC_RG_SMT_AUD_DAT_MOSI2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_sync_mosi(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_SYNC_MOSI_MASK),
		(PMIC_RG_SMT_AUD_SYNC_MOSI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_nle_mosi0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_NLE_MOSI0_MASK),
		(PMIC_RG_SMT_AUD_NLE_MOSI0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_nle_mosi1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_NLE_MOSI1_MASK),
		(PMIC_RG_SMT_AUD_NLE_MOSI1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_dat_miso0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_DAT_MISO0_MASK),
		(PMIC_RG_SMT_AUD_DAT_MISO0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_dat_miso1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_DAT_MISO1_MASK),
		(PMIC_RG_SMT_AUD_DAT_MISO1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smt_aud_dat_miso2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMT_CON1),
		(val),
		(PMIC_RG_SMT_AUD_DAT_MISO2_MASK),
		(PMIC_RG_SMT_AUD_DAT_MISO2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_top_rsv0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RSV0),
		(&val),
		(PMIC_RG_TOP_RSV0_MASK),
		(PMIC_RG_TOP_RSV0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_top_rsv1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RSV1),
		(&val),
		(PMIC_RG_TOP_RSV1_MASK),
		(PMIC_RG_TOP_RSV1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_octl_srclken_in0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON0),
		(val),
		(PMIC_RG_OCTL_SRCLKEN_IN0_MASK),
		(PMIC_RG_OCTL_SRCLKEN_IN0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_srclken_in1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON0),
		(val),
		(PMIC_RG_OCTL_SRCLKEN_IN1_MASK),
		(PMIC_RG_OCTL_SRCLKEN_IN1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_rtc_32k1v8_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON0),
		(val),
		(PMIC_RG_OCTL_RTC_32K1V8_0_MASK),
		(PMIC_RG_OCTL_RTC_32K1V8_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_rtc_32k1v8_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON0),
		(val),
		(PMIC_RG_OCTL_RTC_32K1V8_1_MASK),
		(PMIC_RG_OCTL_RTC_32K1V8_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_spi_clk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON1),
		(val),
		(PMIC_RG_OCTL_SPI_CLK_MASK),
		(PMIC_RG_OCTL_SPI_CLK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_spi_csn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON1),
		(val),
		(PMIC_RG_OCTL_SPI_CSN_MASK),
		(PMIC_RG_OCTL_SPI_CSN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_spi_mosi(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON1),
		(val),
		(PMIC_RG_OCTL_SPI_MOSI_MASK),
		(PMIC_RG_OCTL_SPI_MOSI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_spi_miso(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON1),
		(val),
		(PMIC_RG_OCTL_SPI_MISO_MASK),
		(PMIC_RG_OCTL_SPI_MISO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_clk_mosi(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON2),
		(val),
		(PMIC_RG_OCTL_AUD_CLK_MOSI_MASK),
		(PMIC_RG_OCTL_AUD_CLK_MOSI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_dat_mosi0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON2),
		(val),
		(PMIC_RG_OCTL_AUD_DAT_MOSI0_MASK),
		(PMIC_RG_OCTL_AUD_DAT_MOSI0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_dat_mosi1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON2),
		(val),
		(PMIC_RG_OCTL_AUD_DAT_MOSI1_MASK),
		(PMIC_RG_OCTL_AUD_DAT_MOSI1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_dat_mosi2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON2),
		(val),
		(PMIC_RG_OCTL_AUD_DAT_MOSI2_MASK),
		(PMIC_RG_OCTL_AUD_DAT_MOSI2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_sync_mosi(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON3),
		(val),
		(PMIC_RG_OCTL_AUD_SYNC_MOSI_MASK),
		(PMIC_RG_OCTL_AUD_SYNC_MOSI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_nle_mosi0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON3),
		(val),
		(PMIC_RG_OCTL_AUD_NLE_MOSI0_MASK),
		(PMIC_RG_OCTL_AUD_NLE_MOSI0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_nle_mosi1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON3),
		(val),
		(PMIC_RG_OCTL_AUD_NLE_MOSI1_MASK),
		(PMIC_RG_OCTL_AUD_NLE_MOSI1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_dat_miso0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON3),
		(val),
		(PMIC_RG_OCTL_AUD_DAT_MISO0_MASK),
		(PMIC_RG_OCTL_AUD_DAT_MISO0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_dat_miso1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON4),
		(val),
		(PMIC_RG_OCTL_AUD_DAT_MISO1_MASK),
		(PMIC_RG_OCTL_AUD_DAT_MISO1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_aud_dat_miso2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON4),
		(val),
		(PMIC_RG_OCTL_AUD_DAT_MISO2_MASK),
		(PMIC_RG_OCTL_AUD_DAT_MISO2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_homekey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON4),
		(val),
		(PMIC_RG_OCTL_HOMEKEY_MASK),
		(PMIC_RG_OCTL_HOMEKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_octl_scp_vreq_vao(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DRV_CON4),
		(val),
		(PMIC_RG_OCTL_SCP_VREQ_VAO_MASK),
		(PMIC_RG_OCTL_SCP_VREQ_VAO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_srclken_in0_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_SRCLKEN_IN0_FILTER_EN_MASK),
		(PMIC_RG_SRCLKEN_IN0_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in0_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_SRCLKEN_IN0_FILTER_EN_MASK),
		(PMIC_RG_SRCLKEN_IN0_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in1_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_SRCLKEN_IN1_FILTER_EN_MASK),
		(PMIC_RG_SRCLKEN_IN1_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in1_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_SRCLKEN_IN1_FILTER_EN_MASK),
		(PMIC_RG_SRCLKEN_IN1_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_rtc32k_1v8_0_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_RTC32K_1V8_0_FILTER_EN_MASK),
		(PMIC_RG_RTC32K_1V8_0_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rtc32k_1v8_0_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_RTC32K_1V8_0_FILTER_EN_MASK),
		(PMIC_RG_RTC32K_1V8_0_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_rtc32k_1v8_1_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_RTC32K_1V8_1_FILTER_EN_MASK),
		(PMIC_RG_RTC32K_1V8_1_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rtc32k_1v8_1_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_RTC32K_1V8_1_FILTER_EN_MASK),
		(PMIC_RG_RTC32K_1V8_1_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spi_clk_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_SPI_CLK_FILTER_EN_MASK),
		(PMIC_RG_SPI_CLK_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_spi_clk_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_SPI_CLK_FILTER_EN_MASK),
		(PMIC_RG_SPI_CLK_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spi_csn_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_SPI_CSN_FILTER_EN_MASK),
		(PMIC_RG_SPI_CSN_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_spi_csn_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_SPI_CSN_FILTER_EN_MASK),
		(PMIC_RG_SPI_CSN_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spi_mosi_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_SPI_MOSI_FILTER_EN_MASK),
		(PMIC_RG_SPI_MOSI_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_spi_mosi_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_SPI_MOSI_FILTER_EN_MASK),
		(PMIC_RG_SPI_MOSI_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spi_miso_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_SPI_MISO_FILTER_EN_MASK),
		(PMIC_RG_SPI_MISO_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_spi_miso_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_SPI_MISO_FILTER_EN_MASK),
		(PMIC_RG_SPI_MISO_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_clk_mosi_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_CLK_MOSI_FILTER_EN_MASK),
		(PMIC_RG_AUD_CLK_MOSI_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_clk_mosi_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_CLK_MOSI_FILTER_EN_MASK),
		(PMIC_RG_AUD_CLK_MOSI_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_dat_mosi0_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_DAT_MOSI0_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MOSI0_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_dat_mosi0_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_DAT_MOSI0_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MOSI0_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_dat_mosi1_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_DAT_MOSI1_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MOSI1_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_dat_mosi1_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_DAT_MOSI1_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MOSI1_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_dat_mosi2_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_DAT_MOSI2_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MOSI2_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_dat_mosi2_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_DAT_MOSI2_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MOSI2_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_sync_mosi_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_SYNC_MOSI_FILTER_EN_MASK),
		(PMIC_RG_AUD_SYNC_MOSI_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_sync_mosi_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_SYNC_MOSI_FILTER_EN_MASK),
		(PMIC_RG_AUD_SYNC_MOSI_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_dat_miso0_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_DAT_MISO0_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MISO0_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_dat_miso0_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_DAT_MISO0_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MISO0_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_dat_miso1_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_DAT_MISO1_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MISO1_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_dat_miso1_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_DAT_MISO1_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MISO1_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_dat_miso2_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON0),
		(val),
		(PMIC_RG_AUD_DAT_MISO2_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MISO2_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_dat_miso2_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON0),
		(&val),
		(PMIC_RG_AUD_DAT_MISO2_FILTER_EN_MASK),
		(PMIC_RG_AUD_DAT_MISO2_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_wdtrstb_in_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON1),
		(val),
		(PMIC_RG_WDTRSTB_IN_FILTER_EN_MASK),
		(PMIC_RG_WDTRSTB_IN_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_wdtrstb_in_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON1),
		(&val),
		(PMIC_RG_WDTRSTB_IN_FILTER_EN_MASK),
		(PMIC_RG_WDTRSTB_IN_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_homekey_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON1),
		(val),
		(PMIC_RG_HOMEKEY_FILTER_EN_MASK),
		(PMIC_RG_HOMEKEY_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_homekey_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON1),
		(&val),
		(PMIC_RG_HOMEKEY_FILTER_EN_MASK),
		(PMIC_RG_HOMEKEY_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_scp_vreq_vao_filter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON1),
		(val),
		(PMIC_RG_SCP_VREQ_VAO_FILTER_EN_MASK),
		(PMIC_RG_SCP_VREQ_VAO_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_scp_vreq_vao_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON1),
		(&val),
		(PMIC_RG_SCP_VREQ_VAO_FILTER_EN_MASK),
		(PMIC_RG_SCP_VREQ_VAO_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_nle_mosi0_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON1),
		(val),
		(PMIC_RG_AUD_NLE_MOSI0_FILTER_EN_MASK),
		(PMIC_RG_AUD_NLE_MOSI0_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_nle_mosi0_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON1),
		(&val),
		(PMIC_RG_AUD_NLE_MOSI0_FILTER_EN_MASK),
		(PMIC_RG_AUD_NLE_MOSI0_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_nle_mosi1_filter_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON1),
		(val),
		(PMIC_RG_AUD_NLE_MOSI1_FILTER_EN_MASK),
		(PMIC_RG_AUD_NLE_MOSI1_FILTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_nle_mosi1_filter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FILTER_CON1),
		(&val),
		(PMIC_RG_AUD_NLE_MOSI1_FILTER_EN_MASK),
		(PMIC_RG_AUD_NLE_MOSI1_FILTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in0_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_SRCLKEN_IN0_RCSEL_MASK),
		(PMIC_RG_SRCLKEN_IN0_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_srclken_in1_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_SRCLKEN_IN1_RCSEL_MASK),
		(PMIC_RG_SRCLKEN_IN1_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc32k_1v8_0_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_RTC32K_1V8_0_RCSEL_MASK),
		(PMIC_RG_RTC32K_1V8_0_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc32k_1v8_1_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_RTC32K_1V8_1_RCSEL_MASK),
		(PMIC_RG_RTC32K_1V8_1_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_clk_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_SPI_CLK_RCSEL_MASK),
		(PMIC_RG_SPI_CLK_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_csn_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_SPI_CSN_RCSEL_MASK),
		(PMIC_RG_SPI_CSN_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_mosi_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_SPI_MOSI_RCSEL_MASK),
		(PMIC_RG_SPI_MOSI_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_miso_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_SPI_MISO_RCSEL_MASK),
		(PMIC_RG_SPI_MISO_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_clk_mosi_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_CLK_MOSI_RCSEL_MASK),
		(PMIC_RG_AUD_CLK_MOSI_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dat_mosi0_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_DAT_MOSI0_RCSEL_MASK),
		(PMIC_RG_AUD_DAT_MOSI0_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dat_mosi1_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_DAT_MOSI1_RCSEL_MASK),
		(PMIC_RG_AUD_DAT_MOSI1_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dat_mosi2_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_DAT_MOSI2_RCSEL_MASK),
		(PMIC_RG_AUD_DAT_MOSI2_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_sync_mosi_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_SYNC_MOSI_RCSEL_MASK),
		(PMIC_RG_AUD_SYNC_MOSI_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dat_miso0_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_DAT_MISO0_RCSEL_MASK),
		(PMIC_RG_AUD_DAT_MISO0_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dat_miso1_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_DAT_MISO1_RCSEL_MASK),
		(PMIC_RG_AUD_DAT_MISO1_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dat_miso2_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON2),
		(val),
		(PMIC_RG_AUD_DAT_MISO2_RCSEL_MASK),
		(PMIC_RG_AUD_DAT_MISO2_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wdtrstb_in_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON3),
		(val),
		(PMIC_RG_WDTRSTB_IN_RCSEL_MASK),
		(PMIC_RG_WDTRSTB_IN_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_homekey_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON3),
		(val),
		(PMIC_RG_HOMEKEY_RCSEL_MASK),
		(PMIC_RG_HOMEKEY_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_scp_vreq_vao_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON3),
		(val),
		(PMIC_RG_SCP_VREQ_VAO_RCSEL_MASK),
		(PMIC_RG_SCP_VREQ_VAO_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_nle_mosi0_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON3),
		(val),
		(PMIC_RG_AUD_NLE_MOSI0_RCSEL_MASK),
		(PMIC_RG_AUD_NLE_MOSI0_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_nle_mosi1_rcsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FILTER_CON3),
		(val),
		(PMIC_RG_AUD_NLE_MOSI1_RCSEL_MASK),
		(PMIC_RG_AUD_NLE_MOSI1_RCSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_STATUS),
		(val),
		(PMIC_TOP_STATUS_MASK),
		(PMIC_TOP_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_vm_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_TRAP),
		(&val),
		(PMIC_VM_MODE_MASK),
		(PMIC_VM_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_ID),
		(&val),
		(PMIC_TOP1_ANA_ID_MASK),
		(PMIC_TOP1_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_ID),
		(&val),
		(PMIC_TOP1_DIG_ID_MASK),
		(PMIC_TOP1_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_REV0),
		(&val),
		(PMIC_TOP1_ANA_MINOR_REV_MASK),
		(PMIC_TOP1_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_REV0),
		(&val),
		(PMIC_TOP1_ANA_MAJOR_REV_MASK),
		(PMIC_TOP1_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_REV0),
		(&val),
		(PMIC_TOP1_DIG_MINOR_REV_MASK),
		(PMIC_TOP1_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_REV0),
		(&val),
		(PMIC_TOP1_DIG_MAJOR_REV_MASK),
		(PMIC_TOP1_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_DSN_DBI),
		(&val),
		(PMIC_TOP1_DSN_CBS_MASK),
		(PMIC_TOP1_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_DSN_DBI),
		(&val),
		(PMIC_TOP1_DSN_BIX_MASK),
		(PMIC_TOP1_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_DSN_DBI),
		(&val),
		(PMIC_TOP1_DSN_ESP_MASK),
		(PMIC_TOP1_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top1_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP1_DSN_DXI),
		(&val),
		(PMIC_TOP1_DSN_FPI_MASK),
		(PMIC_TOP1_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_gpio_dir0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_DIR0),
		(val),
		(PMIC_GPIO_DIR0_MASK),
		(PMIC_GPIO_DIR0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_dir1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_DIR1),
		(val),
		(PMIC_GPIO_DIR1_MASK),
		(PMIC_GPIO_DIR1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_pullen0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_PULLEN0),
		(val),
		(PMIC_GPIO_PULLEN0_MASK),
		(PMIC_GPIO_PULLEN0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_pullen1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_PULLEN1),
		(val),
		(PMIC_GPIO_PULLEN1_MASK),
		(PMIC_GPIO_PULLEN1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_pullsel0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_PULLSEL0),
		(val),
		(PMIC_GPIO_PULLSEL0_MASK),
		(PMIC_GPIO_PULLSEL0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_pullsel1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_PULLSEL1),
		(val),
		(PMIC_GPIO_PULLSEL1_MASK),
		(PMIC_GPIO_PULLSEL1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_dinv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_DINV0),
		(val),
		(PMIC_GPIO_DINV0_MASK),
		(PMIC_GPIO_DINV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_dinv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_DINV1),
		(val),
		(PMIC_GPIO_DINV1_MASK),
		(PMIC_GPIO_DINV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_dout0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_DOUT0),
		(val),
		(PMIC_GPIO_DOUT0_MASK),
		(PMIC_GPIO_DOUT0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_dout1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_DOUT1),
		(val),
		(PMIC_GPIO_DOUT1_MASK),
		(PMIC_GPIO_DOUT1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_gpio_pi0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_GPIO_PI0),
		(&val),
		(PMIC_GPIO_PI0_MASK),
		(PMIC_GPIO_PI0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_gpio_pi1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_GPIO_PI1),
		(&val),
		(PMIC_GPIO_PI1_MASK),
		(PMIC_GPIO_PI1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_gpio_poe0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_GPIO_POE0),
		(&val),
		(PMIC_GPIO_POE0_MASK),
		(PMIC_GPIO_POE0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_gpio_poe1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_GPIO_POE1),
		(&val),
		(PMIC_GPIO_POE1_MASK),
		(PMIC_GPIO_POE1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_gpio0_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE0),
		(val),
		(PMIC_GPIO0_MODE_MASK),
		(PMIC_GPIO0_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio1_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE0),
		(val),
		(PMIC_GPIO1_MODE_MASK),
		(PMIC_GPIO1_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio2_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE0),
		(val),
		(PMIC_GPIO2_MODE_MASK),
		(PMIC_GPIO2_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio3_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE0),
		(val),
		(PMIC_GPIO3_MODE_MASK),
		(PMIC_GPIO3_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio4_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE1),
		(val),
		(PMIC_GPIO4_MODE_MASK),
		(PMIC_GPIO4_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio5_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE1),
		(val),
		(PMIC_GPIO5_MODE_MASK),
		(PMIC_GPIO5_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio6_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE1),
		(val),
		(PMIC_GPIO6_MODE_MASK),
		(PMIC_GPIO6_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio7_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE1),
		(val),
		(PMIC_GPIO7_MODE_MASK),
		(PMIC_GPIO7_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio8_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE2),
		(val),
		(PMIC_GPIO8_MODE_MASK),
		(PMIC_GPIO8_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio9_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE2),
		(val),
		(PMIC_GPIO9_MODE_MASK),
		(PMIC_GPIO9_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio10_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE2),
		(val),
		(PMIC_GPIO10_MODE_MASK),
		(PMIC_GPIO10_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio11_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE2),
		(val),
		(PMIC_GPIO11_MODE_MASK),
		(PMIC_GPIO11_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio12_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE3),
		(val),
		(PMIC_GPIO12_MODE_MASK),
		(PMIC_GPIO12_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio13_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE3),
		(val),
		(PMIC_GPIO13_MODE_MASK),
		(PMIC_GPIO13_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio14_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE3),
		(val),
		(PMIC_GPIO14_MODE_MASK),
		(PMIC_GPIO14_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio15_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE3),
		(val),
		(PMIC_GPIO15_MODE_MASK),
		(PMIC_GPIO15_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio16_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE4),
		(val),
		(PMIC_GPIO16_MODE_MASK),
		(PMIC_GPIO16_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio17_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE4),
		(val),
		(PMIC_GPIO17_MODE_MASK),
		(PMIC_GPIO17_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio18_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE4),
		(val),
		(PMIC_GPIO18_MODE_MASK),
		(PMIC_GPIO18_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio19_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_MODE4),
		(val),
		(PMIC_GPIO19_MODE_MASK),
		(PMIC_GPIO19_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpio_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_GPIO_RSV),
		(val),
		(PMIC_GPIO_RSV_MASK),
		(PMIC_GPIO_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_top2_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_ID),
		(&val),
		(PMIC_TOP2_ANA_ID_MASK),
		(PMIC_TOP2_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_ID),
		(&val),
		(PMIC_TOP2_DIG_ID_MASK),
		(PMIC_TOP2_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_REV0),
		(&val),
		(PMIC_TOP2_ANA_MINOR_REV_MASK),
		(PMIC_TOP2_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_REV0),
		(&val),
		(PMIC_TOP2_ANA_MAJOR_REV_MASK),
		(PMIC_TOP2_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_REV0),
		(&val),
		(PMIC_TOP2_DIG_MINOR_REV_MASK),
		(PMIC_TOP2_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_REV0),
		(&val),
		(PMIC_TOP2_DIG_MAJOR_REV_MASK),
		(PMIC_TOP2_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_DSN_DBI),
		(&val),
		(PMIC_TOP2_DSN_CBS_MASK),
		(PMIC_TOP2_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_DSN_DBI),
		(&val),
		(PMIC_TOP2_DSN_BIX_MASK),
		(PMIC_TOP2_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top2_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP2_DSN_DXI),
		(&val),
		(PMIC_TOP2_DSN_FPI_MASK),
		(PMIC_TOP2_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_sck32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_SCK32K_CK_PDN_MASK),
		(PMIC_RG_SCK32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_intrp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_INTRP_CK_PDN_MASK),
		(PMIC_RG_INTRP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_efuse_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_EFUSE_CK_PDN_MASK),
		(PMIC_RG_EFUSE_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ck_pdn_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_CK_PDN_RSV0_MASK),
		(PMIC_RG_CK_PDN_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ck_pdn_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_CK_PDN_RSV1_MASK),
		(PMIC_RG_CK_PDN_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_SPI_CK_PDN_MASK),
		(PMIC_RG_SPI_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ck_pdn_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_CK_PDN_RSV2_MASK),
		(PMIC_RG_CK_PDN_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pmu32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_PMU32K_CK_PDN_MASK),
		(PMIC_RG_PMU32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fqmtr_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_FQMTR_32K_CK_PDN_MASK),
		(PMIC_RG_FQMTR_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fqmtr_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_FQMTR_CK_PDN_MASK),
		(PMIC_RG_FQMTR_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pmu128k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_PMU128K_CK_PDN_MASK),
		(PMIC_RG_PMU128K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc26m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC26M_CK_PDN_MASK),
		(PMIC_RG_RTC26M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC32K_CK_PDN_MASK),
		(PMIC_RG_RTC32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc32k_1v8_0_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON1),
		(val),
		(PMIC_RG_RTC32K_1V8_0_PDN_MASK),
		(PMIC_RG_RTC32K_1V8_0_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc32k_1v8_1_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON1),
		(val),
		(PMIC_RG_RTC32K_1V8_1_PDN_MASK),
		(PMIC_RG_RTC32K_1V8_1_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_trim_128k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON1),
		(val),
		(PMIC_RG_TRIM_128K_CK_PDN_MASK),
		(PMIC_RG_TRIM_128K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_test_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON1),
		(val),
		(PMIC_RG_BGR_TEST_CK_PDN_MASK),
		(PMIC_RG_BGR_TEST_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pchr_test_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKPDN_CON1),
		(val),
		(PMIC_RG_PCHR_TEST_CK_PDN_MASK),
		(PMIC_RG_PCHR_TEST_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fqmtr_ck_cksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_FQMTR_CK_CKSEL_MASK),
		(PMIC_RG_FQMTR_CK_CKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_32k1v8_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_RTC_32K1V8_SEL_MASK),
		(PMIC_RG_RTC_32K1V8_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pmu32k_ck_cksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_PMU32K_CK_CKSEL_MASK),
		(PMIC_RG_PMU32K_CK_CKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_top_cksel_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_TOP_CKSEL_CON0_RSV_MASK),
		(PMIC_RG_TOP_CKSEL_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_srcvolten_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON1),
		(val),
		(PMIC_RG_SRCVOLTEN_SW_MASK),
		(PMIC_RG_SRCVOLTEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vowen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON1),
		(val),
		(PMIC_RG_VOWEN_SW_MASK),
		(PMIC_RG_VOWEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_srcvolten_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON1),
		(val),
		(PMIC_RG_SRCVOLTEN_MODE_MASK),
		(PMIC_RG_SRCVOLTEN_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srcvolten_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CKSEL_CON1),
		(&val),
		(PMIC_RG_SRCVOLTEN_MODE_MASK),
		(PMIC_RG_SRCVOLTEN_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vowen_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON1),
		(val),
		(PMIC_RG_VOWEN_MODE_MASK),
		(PMIC_RG_VOWEN_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vowen_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CKSEL_CON1),
		(&val),
		(PMIC_RG_VOWEN_MODE_MASK),
		(PMIC_RG_VOWEN_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_top_cksel_con2_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKSEL_CON1),
		(val),
		(PMIC_RG_TOP_CKSEL_CON2_RSV_MASK),
		(PMIC_RG_TOP_CKSEL_CON2_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_reg_ck_divsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKDIVSEL_CON0),
		(val),
		(PMIC_RG_REG_CK_DIVSEL_MASK),
		(PMIC_RG_REG_CK_DIVSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_ckdivsel_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKDIVSEL_CON0),
		(val),
		(PMIC_TOP_CKDIVSEL_CON0_RSV_MASK),
		(PMIC_TOP_CKDIVSEL_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_efuse_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_EFUSE_CK_PDN_HWEN_MASK),
		(PMIC_RG_EFUSE_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint_32k_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_EINT_32K_CK_PDN_HWEN_MASK),
		(PMIC_RG_EINT_32K_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc26m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC26M_CK_PDN_HWEN_MASK),
		(PMIC_RG_RTC26M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_ckhwen_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKHWEN_CON0),
		(val),
		(PMIC_TOP_CKHWEN_CON0_RSV_MASK),
		(PMIC_TOP_CKHWEN_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pmu128k_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_PMU128K_CK_TST_DIS_MASK),
		(PMIC_RG_PMU128K_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo_1m_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_DCXO_1M_CK_TST_DIS_MASK),
		(PMIC_RG_DCXO_1M_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo_26m_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_DCXO_26M_CK_TST_DIS_MASK),
		(PMIC_RG_DCXO_26M_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_clk_26m_dig_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_XO_CLK_26M_DIG_TST_DIS_MASK),
		(PMIC_RG_XO_CLK_26M_DIG_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_26m_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_RTC_26M_CK_TST_DIS_MASK),
		(PMIC_RG_RTC_26M_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_32k_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_RTC_32K_CK_TST_DIS_MASK),
		(PMIC_RG_RTC_32K_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_sck_32k_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_SCK_32K_CK_TST_DIS_MASK),
		(PMIC_RG_SCK_32K_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_cktst_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON0),
		(val),
		(PMIC_TOP_CKTST_CON0_RSV_MASK),
		(PMIC_TOP_CKTST_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pmu128k_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_PMU128K_CK_TSTSEL_MASK),
		(PMIC_RG_PMU128K_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo_1m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_DCXO_1M_CK_TSTSEL_MASK),
		(PMIC_RG_DCXO_1M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo_26m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_DCXO_26M_CK_TSTSEL_MASK),
		(PMIC_RG_DCXO_26M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_clk_26m_dig_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_XO_CLK_26M_DIG_TSTSEL_MASK),
		(PMIC_RG_XO_CLK_26M_DIG_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_26m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_RTC_26M_CK_TSTSEL_MASK),
		(PMIC_RG_RTC_26M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_32k_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_RTC_32K_CK_TSTSEL_MASK),
		(PMIC_RG_RTC_32K_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_sck_32k_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_SCK_32K_CK_TSTSEL_MASK),
		(PMIC_RG_SCK_32K_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_efuse_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_EFUSE_CK_TSTSEL_MASK),
		(PMIC_RG_EFUSE_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_test_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_BGR_TEST_CK_TSTSEL_MASK),
		(PMIC_RG_BGR_TEST_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pchr_test_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_PCHR_TEST_CK_TSTSEL_MASK),
		(PMIC_RG_PCHR_TEST_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fqmtr_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_FQMTR_CK_TSTSEL_MASK),
		(PMIC_RG_FQMTR_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_tstck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CKTST_CON1),
		(val),
		(PMIC_RG_DCXO1M_TSTCK_SEL_MASK),
		(PMIC_RG_DCXO1M_TSTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_buck_sw_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_BUCK_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_BUCK_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_buck_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_BUCK_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_BUCK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_bm_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_BM_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_BM_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_bm_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_BM_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_BM_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_hk_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_HK_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_HK_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_hk_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_HK_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_HK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_ldo_sw_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_LDO_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_LDO_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_ldo_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_LDO_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_LDO_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_sck_sw_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_SCK_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_SCK_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_sck_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_SCK_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_SCK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_mdb_sw_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_MDB_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_MDB_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_mdb_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON0),
		(val),
		(PMIC_RG_DCXO26M_CKEN_MDB_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_MDB_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_buck_sw_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON1),
		(val),
		(PMIC_RG_DCXO1M_CKEN_BUCK_SW_SEL_MASK),
		(PMIC_RG_DCXO1M_CKEN_BUCK_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_buck_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON1),
		(val),
		(PMIC_RG_DCXO1M_CKEN_BUCK_SW_MASK),
		(PMIC_RG_DCXO1M_CKEN_BUCK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_ldo_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON1),
		(val),
		(PMIC_RG_DCXO1M_CKEN_LDO_SW_SEL_MASK),
		(PMIC_RG_DCXO1M_CKEN_LDO_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_ldo_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON1),
		(val),
		(PMIC_RG_DCXO1M_CKEN_LDO_SW_MASK),
		(PMIC_RG_DCXO1M_CKEN_LDO_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_hk_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON1),
		(val),
		(PMIC_RG_DCXO1M_CKEN_HK_SW_SEL_MASK),
		(PMIC_RG_DCXO1M_CKEN_HK_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_hk_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_CON1),
		(val),
		(PMIC_RG_DCXO1M_CKEN_HK_SW_MASK),
		(PMIC_RG_DCXO1M_CKEN_HK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_top_mdb_dcm_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_TOP_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_TOP_MDB_DCM_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_top_mdb_dcm_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_TOP_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_TOP_MDB_DCM_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_top_mdb_dcm_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_TOP_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_TOP_MDB_DCM_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_top_mdb_dcm_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_TOP_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_TOP_MDB_DCM_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_sck_mdb_dcm_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_SCK_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_SCK_MDB_DCM_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_sck_mdb_dcm_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_SCK_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_SCK_MDB_DCM_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_sck_mdb_dcm_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_SCK_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_SCK_MDB_DCM_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_sck_mdb_dcm_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_SCK_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_SCK_MDB_DCM_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_mdb_dcm_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_LDO_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_LDO_MDB_DCM_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_mdb_dcm_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_LDO_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_LDO_MDB_DCM_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_mdb_dcm_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_LDO_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_LDO_MDB_DCM_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_mdb_dcm_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_LDO_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_LDO_MDB_DCM_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_mdb_dcm_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_BUCK_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_BUCK_MDB_DCM_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_mdb_dcm_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_BUCK_MDB_DCM_SW_MODE_MASK),
		(PMIC_RG_BUCK_MDB_DCM_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_mdb_dcm_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_BUCK_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_BUCK_MDB_DCM_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_mdb_dcm_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_BUCK_MDB_DCM_SW_EN_MASK),
		(PMIC_RG_BUCK_MDB_DCM_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mdb_dcxo26m_dcm_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_DCM0),
		(val),
		(PMIC_RG_MDB_DCXO26M_DCM_LP_EN_MASK),
		(PMIC_RG_MDB_DCXO26M_DCM_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mdb_dcxo26m_dcm_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_DCM0),
		(&val),
		(PMIC_RG_MDB_DCXO26M_DCM_LP_EN_MASK),
		(PMIC_RG_MDB_DCXO26M_DCM_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_efuse_man_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_EFUSE_MAN_RST_MASK),
		(PMIC_RG_EFUSE_MAN_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_driver_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_DRIVER_RST_MASK),
		(PMIC_RG_DRIVER_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fqmtr_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_FQMTR_RST_MASK),
		(PMIC_RG_FQMTR_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_RTC_RST_MASK),
		(PMIC_RG_RTC_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_type_c_cc_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_TYPE_C_CC_RST_MASK),
		(PMIC_RG_TYPE_C_CC_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_clk_trim_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_CLK_TRIM_RST_MASK),
		(PMIC_RG_CLK_TRIM_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_srclken_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON0),
		(val),
		(PMIC_RG_BUCK_SRCLKEN_RST_MASK),
		(PMIC_RG_BUCK_SRCLKEN_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_prot_pmpp_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON1),
		(val),
		(PMIC_RG_BUCK_PROT_PMPP_RST_MASK),
		(PMIC_RG_BUCK_PROT_PMPP_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spk_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON1),
		(val),
		(PMIC_RG_SPK_RST_MASK),
		(PMIC_RG_SPK_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ft_vr_sysrstb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON1),
		(val),
		(PMIC_RG_FT_VR_SYSRSTB_MASK),
		(PMIC_RG_FT_VR_SYSRSTB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_cali_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON1),
		(val),
		(PMIC_RG_LDO_CALI_RST_MASK),
		(PMIC_RG_LDO_CALI_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_rst_con1_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON1),
		(val),
		(PMIC_TOP_RST_CON1_RSV_MASK),
		(PMIC_TOP_RST_CON1_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_chr_ldo_det_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON2),
		(val),
		(PMIC_RG_CHR_LDO_DET_MODE_MASK),
		(PMIC_RG_CHR_LDO_DET_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_chr_ldo_det_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_CON2),
		(&val),
		(PMIC_RG_CHR_LDO_DET_MODE_MASK),
		(PMIC_RG_CHR_LDO_DET_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_chr_ldo_det_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON2),
		(val),
		(PMIC_RG_CHR_LDO_DET_SW_MASK),
		(PMIC_RG_CHR_LDO_DET_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_chrwdt_flag_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON2),
		(val),
		(PMIC_RG_CHRWDT_FLAG_MODE_MASK),
		(PMIC_RG_CHRWDT_FLAG_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_chrwdt_flag_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_CON2),
		(&val),
		(PMIC_RG_CHRWDT_FLAG_MODE_MASK),
		(PMIC_RG_CHRWDT_FLAG_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_chrwdt_flag_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON2),
		(val),
		(PMIC_RG_CHRWDT_FLAG_SW_MASK),
		(PMIC_RG_CHRWDT_FLAG_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_rst_con2_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON2),
		(val),
		(PMIC_TOP_RST_CON2_RSV_MASK),
		(PMIC_TOP_RST_CON2_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_gpio_rst_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_CON3),
		(val),
		(PMIC_RG_GPIO_RST_SEL_MASK),
		(PMIC_RG_GPIO_RST_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wdtrstb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_WDTRSTB_EN_MASK),
		(PMIC_RG_WDTRSTB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_wdtrstb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_MISC),
		(&val),
		(PMIC_RG_WDTRSTB_EN_MASK),
		(PMIC_RG_WDTRSTB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_wdtrstb_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_WDTRSTB_MODE_MASK),
		(PMIC_RG_WDTRSTB_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_wdtrstb_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_MISC),
		(&val),
		(PMIC_RG_WDTRSTB_MODE_MASK),
		(PMIC_RG_WDTRSTB_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_wdtrstb_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_MISC),
		(&val),
		(PMIC_WDTRSTB_STATUS_MASK),
		(PMIC_WDTRSTB_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_wdtrstb_status_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_WDTRSTB_STATUS_CLR_MASK),
		(PMIC_WDTRSTB_STATUS_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wdtrstb_fb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_WDTRSTB_FB_EN_MASK),
		(PMIC_RG_WDTRSTB_FB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_wdtrstb_fb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_MISC),
		(&val),
		(PMIC_RG_WDTRSTB_FB_EN_MASK),
		(PMIC_RG_WDTRSTB_FB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_wdtrstb_deb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_WDTRSTB_DEB_MASK),
		(PMIC_RG_WDTRSTB_DEB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pwrkey_key_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_PWRKEY_KEY_MODE_MASK),
		(PMIC_RG_PWRKEY_KEY_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pwrkey_key_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_MISC),
		(&val),
		(PMIC_RG_PWRKEY_KEY_MODE_MASK),
		(PMIC_RG_PWRKEY_KEY_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pwrkey_rst_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_PWRKEY_RST_EN_MASK),
		(PMIC_RG_PWRKEY_RST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pwrkey_rst_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_RST_MISC),
		(&val),
		(PMIC_RG_PWRKEY_RST_EN_MASK),
		(PMIC_RG_PWRKEY_RST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pwrrst_tmr_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_PWRRST_TMR_DIS_MASK),
		(PMIC_RG_PWRRST_TMR_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pwrkey_rst_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_RG_PWRKEY_RST_TD_MASK),
		(PMIC_RG_PWRKEY_RST_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_rst_misc_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_MISC),
		(val),
		(PMIC_TOP_RST_MISC_RSV_MASK),
		(PMIC_TOP_RST_MISC_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vpwrin_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_VPWRIN_RSTB_STATUS_MASK),
		(PMIC_VPWRIN_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ddlo_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_DDLO_RSTB_STATUS_MASK),
		(PMIC_DDLO_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_uvlo_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_UVLO_RSTB_STATUS_MASK),
		(PMIC_UVLO_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_ddlo_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_RTC_DDLO_RSTB_STATUS_MASK),
		(PMIC_RTC_DDLO_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_chrwdt_reg_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_CHRWDT_REG_RSTB_STATUS_MASK),
		(PMIC_CHRWDT_REG_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_chrdet_reg_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_CHRDET_REG_RSTB_STATUS_MASK),
		(PMIC_CHRDET_REG_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bwdt_ddlo_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_BWDT_DDLO_RSTB_STATUS_MASK),
		(PMIC_BWDT_DDLO_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_rst_status_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_RST_STATUS),
		(val),
		(PMIC_TOP_RST_STATUS_RSV_MASK),
		(PMIC_TOP_RST_STATUS_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_top2_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP2_ELR0),
		(val),
		(PMIC_RG_TOP2_RSV0_MASK),
		(PMIC_RG_TOP2_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_top2_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP2_ELR1),
		(val),
		(PMIC_RG_TOP2_RSV1_MASK),
		(PMIC_RG_TOP2_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_top3_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_ID),
		(&val),
		(PMIC_TOP3_ANA_ID_MASK),
		(PMIC_TOP3_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_ID),
		(&val),
		(PMIC_TOP3_DIG_ID_MASK),
		(PMIC_TOP3_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_REV0),
		(&val),
		(PMIC_TOP3_ANA_MINOR_REV_MASK),
		(PMIC_TOP3_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_REV0),
		(&val),
		(PMIC_TOP3_ANA_MAJOR_REV_MASK),
		(PMIC_TOP3_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_REV0),
		(&val),
		(PMIC_TOP3_DIG_MINOR_REV_MASK),
		(PMIC_TOP3_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_REV0),
		(&val),
		(PMIC_TOP3_DIG_MAJOR_REV_MASK),
		(PMIC_TOP3_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_DSN_DBI),
		(&val),
		(PMIC_TOP3_DSN_CBS_MASK),
		(PMIC_TOP3_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_DSN_DBI),
		(&val),
		(PMIC_TOP3_DSN_BIX_MASK),
		(PMIC_TOP3_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_DSN_DBI),
		(&val),
		(PMIC_TOP3_DSN_ESP_MASK),
		(PMIC_TOP3_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_top3_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP3_DSN_DXI),
		(&val),
		(PMIC_TOP3_DSN_FPI_MASK),
		(PMIC_TOP3_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_spi_cmd_alert(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_MISC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_SPI_CMD_ALERT_MASK),
		(PMIC_RG_INT_EN_SPI_CMD_ALERT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_spi_cmd_alert(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_MISC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_SPI_CMD_ALERT_MASK),
		(PMIC_RG_INT_EN_SPI_CMD_ALERT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_spi_cmd_alert(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_MISC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_SPI_CMD_ALERT_MASK),
		(PMIC_RG_INT_MASK_SPI_CMD_ALERT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_spi_cmd_alert(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_MISC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_SPI_CMD_ALERT_MASK),
		(PMIC_RG_INT_RAW_STATUS_SPI_CMD_ALERT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_buck_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BUCK_TOP_MASK),
		(PMIC_RG_INT_MASK_BUCK_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_ldo_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_LDO_TOP_MASK),
		(PMIC_RG_INT_MASK_LDO_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_psc_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_PSC_TOP_MASK),
		(PMIC_RG_INT_MASK_PSC_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_sck_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_SCK_TOP_MASK),
		(PMIC_RG_INT_MASK_SCK_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bm_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BM_TOP_MASK),
		(PMIC_RG_INT_MASK_BM_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_hk_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_HK_TOP_MASK),
		(PMIC_RG_INT_MASK_HK_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_xpp_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_XPP_TOP_MASK),
		(PMIC_RG_INT_MASK_XPP_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_aud_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_AUD_TOP_MASK),
		(PMIC_RG_INT_MASK_AUD_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_misc_top(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_MISC_TOP_MASK),
		(PMIC_RG_INT_MASK_MISC_TOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_int_status_buck_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_BUCK_TOP_MASK),
		(PMIC_INT_STATUS_BUCK_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_ldo_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_LDO_TOP_MASK),
		(PMIC_INT_STATUS_LDO_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_psc_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_PSC_TOP_MASK),
		(PMIC_INT_STATUS_PSC_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_sck_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_SCK_TOP_MASK),
		(PMIC_INT_STATUS_SCK_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_bm_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_BM_TOP_MASK),
		(PMIC_INT_STATUS_BM_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_hk_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_HK_TOP_MASK),
		(PMIC_INT_STATUS_HK_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_xpp_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_XPP_TOP_MASK),
		(PMIC_INT_STATUS_XPP_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_aud_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_AUD_TOP_MASK),
		(PMIC_INT_STATUS_AUD_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_misc_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_MISC_TOP_MASK),
		(PMIC_INT_STATUS_MISC_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_status_top_rsv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_STATUS0),
		(&val),
		(PMIC_INT_STATUS_TOP_RSV_MASK),
		(PMIC_INT_STATUS_TOP_RSV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_buck_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_BUCK_TOP_MASK),
		(PMIC_INT_RAW_STATUS_BUCK_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_ldo_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_LDO_TOP_MASK),
		(PMIC_INT_RAW_STATUS_LDO_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_psc_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_PSC_TOP_MASK),
		(PMIC_INT_RAW_STATUS_PSC_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_sck_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_SCK_TOP_MASK),
		(PMIC_INT_RAW_STATUS_SCK_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_bm_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_BM_TOP_MASK),
		(PMIC_INT_RAW_STATUS_BM_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_hk_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_HK_TOP_MASK),
		(PMIC_INT_RAW_STATUS_HK_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_xpp_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_XPP_TOP_MASK),
		(PMIC_INT_RAW_STATUS_XPP_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_aud_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_AUD_TOP_MASK),
		(PMIC_INT_RAW_STATUS_AUD_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_misc_top(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_MISC_TOP_MASK),
		(PMIC_INT_RAW_STATUS_MISC_TOP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_int_raw_status_top_rsv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_INT_RAW_STATUS_TOP_RSV_MASK),
		(PMIC_INT_RAW_STATUS_TOP_RSV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_polarity(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_POLARITY_MASK),
		(PMIC_RG_INT_POLARITY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_DCXO_CKEN_SW),
		(val),
		(PMIC_RG_DCXO26M_CKEN_SW_SEL_MASK),
		(PMIC_RG_DCXO26M_CKEN_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo26m_cken_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_DCXO_CKEN_SW),
		(val),
		(PMIC_RG_DCXO26M_CKEN_SW_MASK),
		(PMIC_RG_DCXO26M_CKEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_DCXO_CKEN_SW),
		(val),
		(PMIC_RG_DCXO1M_CKEN_SW_SEL_MASK),
		(PMIC_RG_DCXO1M_CKEN_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo1m_cken_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_DCXO_CKEN_SW),
		(val),
		(PMIC_RG_DCXO1M_CKEN_SW_MASK),
		(PMIC_RG_DCXO1M_CKEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pmrc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON0),
		(val),
		(PMIC_PMRC_EN_MASK),
		(PMIC_PMRC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pmrc_en_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON0_SET),
		(val),
		(PMIC_PMRC_EN_SET_MASK),
		(PMIC_PMRC_EN_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pmrc_en_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON0_CLR),
		(val),
		(PMIC_PMRC_EN_CLR_MASK),
		(PMIC_PMRC_EN_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vr_spm_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON1),
		(val),
		(PMIC_RG_VR_SPM_MODE_MASK),
		(PMIC_RG_VR_SPM_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vr_spm_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PMRC_CON1),
		(&val),
		(PMIC_RG_VR_SPM_MODE_MASK),
		(PMIC_RG_VR_SPM_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vr_md_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON1),
		(val),
		(PMIC_RG_VR_MD_MODE_MASK),
		(PMIC_RG_VR_MD_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vr_md_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PMRC_CON1),
		(&val),
		(PMIC_RG_VR_MD_MODE_MASK),
		(PMIC_RG_VR_MD_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vr_sshub_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON1),
		(val),
		(PMIC_RG_VR_SSHUB_MODE_MASK),
		(PMIC_RG_VR_SSHUB_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vr_sshub_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PMRC_CON1),
		(&val),
		(PMIC_RG_VR_SSHUB_MODE_MASK),
		(PMIC_RG_VR_SSHUB_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_pmrc_con1_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON1_SET),
		(val),
		(PMIC_PMRC_CON1_SET_MASK),
		(PMIC_PMRC_CON1_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pmrc_con1_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON1_CLR),
		(val),
		(PMIC_PMRC_CON1_CLR_MASK),
		(PMIC_PMRC_CON1_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_srclken2_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON2),
		(val),
		(PMIC_RG_SRCLKEN2_MODE_MASK),
		(PMIC_RG_SRCLKEN2_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken2_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PMRC_CON2),
		(&val),
		(PMIC_RG_SRCLKEN2_MODE_MASK),
		(PMIC_RG_SRCLKEN2_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken3_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PMRC_CON2),
		(val),
		(PMIC_RG_SRCLKEN3_MODE_MASK),
		(PMIC_RG_SRCLKEN3_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken3_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PMRC_CON2),
		(&val),
		(PMIC_RG_SRCLKEN3_MODE_MASK),
		(PMIC_RG_SRCLKEN3_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_ID),
		(&val),
		(PMIC_PLT0_ANA_ID_MASK),
		(PMIC_PLT0_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_ID),
		(&val),
		(PMIC_PLT0_DIG_ID_MASK),
		(PMIC_PLT0_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_REV0),
		(&val),
		(PMIC_PLT0_ANA_MINOR_REV_MASK),
		(PMIC_PLT0_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_REV0),
		(&val),
		(PMIC_PLT0_ANA_MAJOR_REV_MASK),
		(PMIC_PLT0_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_REV0),
		(&val),
		(PMIC_PLT0_DIG_MINOR_REV_MASK),
		(PMIC_PLT0_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_REV0),
		(&val),
		(PMIC_PLT0_DIG_MAJOR_REV_MASK),
		(PMIC_PLT0_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_REV1),
		(&val),
		(PMIC_PLT0_DSN_CBS_MASK),
		(PMIC_PLT0_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_REV1),
		(&val),
		(PMIC_PLT0_DSN_BIX_MASK),
		(PMIC_PLT0_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_plt0_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PLT0_DSN_DXI),
		(&val),
		(PMIC_PLT0_DSN_FPI_MASK),
		(PMIC_PLT0_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_osc_128k_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_TRIM),
		(val),
		(PMIC_RG_OSC_128K_TRIM_EN_MASK),
		(PMIC_RG_OSC_128K_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_osc_128k_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_TRIM),
		(&val),
		(PMIC_RG_OSC_128K_TRIM_EN_MASK),
		(PMIC_RG_OSC_128K_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_osc_128k_trim_rate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_CLK_TRIM),
		(val),
		(PMIC_RG_OSC_128K_TRIM_RATE_MASK),
		(PMIC_RG_OSC_128K_TRIM_RATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_da_osc_128k_trim(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_CLK_TRIM),
		(&val),
		(PMIC_DA_OSC_128K_TRIM_MASK),
		(PMIC_DA_OSC_128K_TRIM_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_otp_pa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON0),
		(val),
		(PMIC_RG_OTP_PA_MASK),
		(PMIC_RG_OTP_PA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_pdin(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON1),
		(val),
		(PMIC_RG_OTP_PDIN_MASK),
		(PMIC_RG_OTP_PDIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_ptm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON2),
		(val),
		(PMIC_RG_OTP_PTM_MASK),
		(PMIC_RG_OTP_PTM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_pwe(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON3),
		(val),
		(PMIC_RG_OTP_PWE_MASK),
		(PMIC_RG_OTP_PWE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_pprog(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON4),
		(val),
		(PMIC_RG_OTP_PPROG_MASK),
		(PMIC_RG_OTP_PPROG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_pwe_src(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON5),
		(val),
		(PMIC_RG_OTP_PWE_SRC_MASK),
		(PMIC_RG_OTP_PWE_SRC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_prog_pkey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON6),
		(val),
		(PMIC_RG_OTP_PROG_PKEY_MASK),
		(PMIC_RG_OTP_PROG_PKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_rd_pkey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON7),
		(val),
		(PMIC_RG_OTP_RD_PKEY_MASK),
		(PMIC_RG_OTP_RD_PKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_rd_trig(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON8),
		(val),
		(PMIC_RG_OTP_RD_TRIG_MASK),
		(PMIC_RG_OTP_RD_TRIG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rd_rdy_bypass(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON9),
		(val),
		(PMIC_RG_RD_RDY_BYPASS_MASK),
		(PMIC_RG_RD_RDY_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_skip_otp_out(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON10),
		(val),
		(PMIC_RG_SKIP_OTP_OUT_MASK),
		(PMIC_RG_SKIP_OTP_OUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_rd_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_OTP_CON11),
		(val),
		(PMIC_RG_OTP_RD_SW_MASK),
		(PMIC_RG_OTP_RD_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_otp_dout_sw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OTP_CON12),
		(&val),
		(PMIC_RG_OTP_DOUT_SW_MASK),
		(PMIC_RG_OTP_DOUT_SW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_otp_rd_busy(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OTP_CON13),
		(&val),
		(PMIC_RG_OTP_RD_BUSY_MASK),
		(PMIC_RG_OTP_RD_BUSY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_otp_rd_ack(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OTP_CON13),
		(&val),
		(PMIC_RG_OTP_RD_ACK_MASK),
		(PMIC_RG_OTP_RD_ACK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_otp_pa_sw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_OTP_CON14),
		(&val),
		(PMIC_RG_OTP_PA_SW_MASK),
		(PMIC_RG_OTP_PA_SW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_tma_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_TMA_KEY),
		(val),
		(PMIC_TMA_KEY_MASK),
		(PMIC_TMA_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_mdb_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF0),
		(val),
		(PMIC_TOP_MDB_RSV0_MASK),
		(PMIC_TOP_MDB_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_top_mdb_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF1),
		(val),
		(PMIC_TOP_MDB_RSV1_MASK),
		(PMIC_TOP_MDB_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mdb_dm1_ds_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF2),
		(val),
		(PMIC_RG_MDB_DM1_DS_EN_MASK),
		(PMIC_RG_MDB_DM1_DS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mdb_dm1_ds_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_MDB_CONF2),
		(&val),
		(PMIC_RG_MDB_DM1_DS_EN_MASK),
		(PMIC_RG_MDB_DM1_DS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_auto_load_force(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF2),
		(val),
		(PMIC_RG_AUTO_LOAD_FORCE_MASK),
		(PMIC_RG_AUTO_LOAD_FORCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_otp_write_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF2),
		(val),
		(PMIC_RG_OTP_WRITE_SEL_MASK),
		(PMIC_RG_OTP_WRITE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_top_mdb_bridge_bypass_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF3),
		(val),
		(PMIC_RG_TOP_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_TOP_MDB_BRIDGE_BYPASS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_top_mdb_bridge_bypass_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_MDB_CONF3),
		(&val),
		(PMIC_RG_TOP_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_TOP_MDB_BRIDGE_BYPASS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_sck_mdb_bridge_bypass_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF3),
		(val),
		(PMIC_RG_SCK_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_SCK_MDB_BRIDGE_BYPASS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_sck_mdb_bridge_bypass_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_MDB_CONF3),
		(&val),
		(PMIC_RG_SCK_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_SCK_MDB_BRIDGE_BYPASS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_mdb_bridge_bypass_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF3),
		(val),
		(PMIC_RG_LDO_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_LDO_MDB_BRIDGE_BYPASS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_mdb_bridge_bypass_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_MDB_CONF3),
		(&val),
		(PMIC_RG_LDO_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_LDO_MDB_BRIDGE_BYPASS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_mdb_bridge_bypass_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF3),
		(val),
		(PMIC_RG_BUCK_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_BUCK_MDB_BRIDGE_BYPASS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_mdb_bridge_bypass_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_MDB_CONF3),
		(&val),
		(PMIC_RG_BUCK_MDB_BRIDGE_BYPASS_EN_MASK),
		(PMIC_RG_BUCK_MDB_BRIDGE_BYPASS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mdb_brdg_acs_suspend(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF3),
		(val),
		(PMIC_RG_MDB_BRDG_ACS_SUSPEND_MASK),
		(PMIC_RG_MDB_BRDG_ACS_SUSPEND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mdb_brdg_acs_deepidle(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_MDB_CONF3),
		(val),
		(PMIC_RG_MDB_BRDG_ACS_DEEPIDLE_MASK),
		(PMIC_RG_MDB_BRDG_ACS_DEEPIDLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_osc_128k_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PLT0_ELR0),
		(val),
		(PMIC_RG_OSC_128K_TRIM_MASK),
		(PMIC_RG_OSC_128K_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_spislv_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_ID),
		(&val),
		(PMIC_SPISLV_ANA_ID_MASK),
		(PMIC_SPISLV_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_ID),
		(&val),
		(PMIC_SPISLV_DIG_ID_MASK),
		(PMIC_SPISLV_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV0),
		(&val),
		(PMIC_SPISLV_ANA_MINOR_REV_MASK),
		(PMIC_SPISLV_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV0),
		(&val),
		(PMIC_SPISLV_ANA_MAJOR_REV_MASK),
		(PMIC_SPISLV_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV0),
		(&val),
		(PMIC_SPISLV_DIG_MINOR_REV_MASK),
		(PMIC_SPISLV_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV0),
		(&val),
		(PMIC_SPISLV_DIG_MAJOR_REV_MASK),
		(PMIC_SPISLV_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV1),
		(&val),
		(PMIC_SPISLV_DSN_CBS_MASK),
		(PMIC_SPISLV_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV1),
		(&val),
		(PMIC_SPISLV_DSN_BIX_MASK),
		(PMIC_SPISLV_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_REV1),
		(&val),
		(PMIC_SPISLV_DSN_ESP_MASK),
		(PMIC_SPISLV_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_spislv_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SPISLV_DSN_DXI),
		(&val),
		(PMIC_SPISLV_DSN_FPI_MASK),
		(PMIC_SPISLV_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spi_miso_mode_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON0),
		(val),
		(PMIC_RG_SPI_MISO_MODE_SEL_MASK),
		(PMIC_RG_SPI_MISO_MODE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_spi_miso_mode_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RG_SPI_CON0),
		(&val),
		(PMIC_RG_SPI_MISO_MODE_SEL_MASK),
		(PMIC_RG_SPI_MISO_MODE_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_en_record(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_RECORD0),
		(val),
		(PMIC_RG_EN_RECORD_MASK),
		(PMIC_RG_EN_RECORD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rd_record_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_RECORD0),
		(val),
		(PMIC_RG_RD_RECORD_EN_MASK),
		(PMIC_RG_RD_RECORD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rd_record_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RG_SPI_RECORD0),
		(&val),
		(PMIC_RG_RD_RECORD_EN_MASK),
		(PMIC_RG_RD_RECORD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spi_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_RECORD0),
		(val),
		(PMIC_RG_SPI_RSV_MASK),
		(PMIC_RG_SPI_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_dio_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_DIO_EN),
		(val),
		(PMIC_DEW_DIO_EN_MASK),
		(PMIC_DEW_DIO_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_dew_read_test(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DEW_READ_TEST),
		(&val),
		(PMIC_DEW_READ_TEST_MASK),
		(PMIC_DEW_READ_TEST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_dew_write_test(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_WRITE_TEST),
		(val),
		(PMIC_DEW_WRITE_TEST_MASK),
		(PMIC_DEW_WRITE_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_crc_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CRC_SWRST),
		(val),
		(PMIC_DEW_CRC_SWRST_MASK),
		(PMIC_DEW_CRC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_crc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CRC_EN),
		(val),
		(PMIC_DEW_CRC_EN_MASK),
		(PMIC_DEW_CRC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_dew_crc_val(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DEW_CRC_VAL),
		(&val),
		(PMIC_DEW_CRC_VAL_MASK),
		(PMIC_DEW_CRC_VAL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_dew_cipher_key_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CIPHER_KEY_SEL),
		(val),
		(PMIC_DEW_CIPHER_KEY_SEL_MASK),
		(PMIC_DEW_CIPHER_KEY_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_cipher_iv_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CIPHER_IV_SEL),
		(val),
		(PMIC_DEW_CIPHER_IV_SEL_MASK),
		(PMIC_DEW_CIPHER_IV_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_cipher_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CIPHER_EN),
		(val),
		(PMIC_DEW_CIPHER_EN_MASK),
		(PMIC_DEW_CIPHER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_dew_cipher_rdy(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DEW_CIPHER_RDY),
		(&val),
		(PMIC_DEW_CIPHER_RDY_MASK),
		(PMIC_DEW_CIPHER_RDY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_dew_cipher_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CIPHER_MODE),
		(val),
		(PMIC_DEW_CIPHER_MODE_MASK),
		(PMIC_DEW_CIPHER_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_cipher_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_CIPHER_SWRST),
		(val),
		(PMIC_DEW_CIPHER_SWRST_MASK),
		(PMIC_DEW_CIPHER_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dew_rddmy_no(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DEW_RDDMY_NO),
		(val),
		(PMIC_DEW_RDDMY_NO_MASK),
		(PMIC_DEW_RDDMY_NO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_dly_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON2),
		(val),
		(PMIC_RG_SPI_DLY_SEL_MASK),
		(PMIC_RG_SPI_DLY_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_record_cmd0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_CMD0),
		(&val),
		(PMIC_RECORD_CMD0_MASK),
		(PMIC_RECORD_CMD0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_cmd1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_CMD1),
		(&val),
		(PMIC_RECORD_CMD1_MASK),
		(PMIC_RECORD_CMD1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_cmd2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_CMD2),
		(&val),
		(PMIC_RECORD_CMD2_MASK),
		(PMIC_RECORD_CMD2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_cmd3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_CMD3),
		(&val),
		(PMIC_RECORD_CMD3_MASK),
		(PMIC_RECORD_CMD3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_cmd4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_CMD4),
		(&val),
		(PMIC_RECORD_CMD4_MASK),
		(PMIC_RECORD_CMD4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_cmd5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_CMD5),
		(&val),
		(PMIC_RECORD_CMD5_MASK),
		(PMIC_RECORD_CMD5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_wdata0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_WDATA0),
		(&val),
		(PMIC_RECORD_WDATA0_MASK),
		(PMIC_RECORD_WDATA0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_wdata1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_WDATA1),
		(&val),
		(PMIC_RECORD_WDATA1_MASK),
		(PMIC_RECORD_WDATA1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_wdata2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_WDATA2),
		(&val),
		(PMIC_RECORD_WDATA2_MASK),
		(PMIC_RECORD_WDATA2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_wdata3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_WDATA3),
		(&val),
		(PMIC_RECORD_WDATA3_MASK),
		(PMIC_RECORD_WDATA3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_wdata4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_WDATA4),
		(&val),
		(PMIC_RECORD_WDATA4_MASK),
		(PMIC_RECORD_WDATA4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_record_wdata5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RECORD_WDATA5),
		(&val),
		(PMIC_RECORD_WDATA5_MASK),
		(PMIC_RECORD_WDATA5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_addr_target(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON9),
		(val),
		(PMIC_RG_ADDR_TARGET_MASK),
		(PMIC_RG_ADDR_TARGET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_addr_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON10),
		(val),
		(PMIC_RG_ADDR_MASK_MASK),
		(PMIC_RG_ADDR_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wdata_target(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON11),
		(val),
		(PMIC_RG_WDATA_TARGET_MASK),
		(PMIC_RG_WDATA_TARGET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wdata_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON12),
		(val),
		(PMIC_RG_WDATA_MASK_MASK),
		(PMIC_RG_WDATA_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spi_record_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON13),
		(val),
		(PMIC_RG_SPI_RECORD_CLR_MASK),
		(PMIC_RG_SPI_RECORD_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_cmd_alert_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON13),
		(val),
		(PMIC_RG_CMD_ALERT_CLR_MASK),
		(PMIC_RG_CMD_ALERT_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_spislv_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SPISLV_KEY),
		(val),
		(PMIC_SPISLV_KEY_MASK),
		(PMIC_SPISLV_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_int_type_con0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_INT_TYPE_CON0),
		(val),
		(PMIC_INT_TYPE_CON0_MASK),
		(PMIC_INT_TYPE_CON0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_cpu_int_sta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_INT_STA),
		(&val),
		(PMIC_CPU_INT_STA_MASK),
		(PMIC_CPU_INT_STA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_md32_int_sta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_INT_STA),
		(&val),
		(PMIC_MD32_INT_STA_MASK),
		(PMIC_MD32_INT_STA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in3_smps_clk_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON1),
		(val),
		(PMIC_RG_SRCLKEN_IN3_SMPS_CLK_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN3_SMPS_CLK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in3_smps_clk_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RG_SPI_CON1),
		(&val),
		(PMIC_RG_SRCLKEN_IN3_SMPS_CLK_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN3_SMPS_CLK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in3_en_smps_test(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON1),
		(val),
		(PMIC_RG_SRCLKEN_IN3_EN_SMPS_TEST_MASK),
		(PMIC_RG_SRCLKEN_IN3_EN_SMPS_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in3_en_smps_test(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RG_SPI_CON1),
		(&val),
		(PMIC_RG_SRCLKEN_IN3_EN_SMPS_TEST_MASK),
		(PMIC_RG_SRCLKEN_IN3_EN_SMPS_TEST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in2_smps_clk_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON1),
		(val),
		(PMIC_RG_SRCLKEN_IN2_SMPS_CLK_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN2_SMPS_CLK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in2_smps_clk_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RG_SPI_CON1),
		(&val),
		(PMIC_RG_SRCLKEN_IN2_SMPS_CLK_MODE_MASK),
		(PMIC_RG_SRCLKEN_IN2_SMPS_CLK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in2_en_smps_test(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RG_SPI_CON1),
		(val),
		(PMIC_RG_SRCLKEN_IN2_EN_SMPS_TEST_MASK),
		(PMIC_RG_SRCLKEN_IN2_EN_SMPS_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in2_en_smps_test(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RG_SPI_CON1),
		(&val),
		(PMIC_RG_SRCLKEN_IN2_EN_SMPS_TEST_MASK),
		(PMIC_RG_SRCLKEN_IN2_EN_SMPS_TEST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_SPI_CON0),
		(val),
		(PMIC_RG_SRCLKEN_IN2_EN_MASK),
		(PMIC_RG_SRCLKEN_IN2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_SPI_CON0),
		(&val),
		(PMIC_RG_SRCLKEN_IN2_EN_MASK),
		(PMIC_RG_SRCLKEN_IN2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_srclken_in3_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_SPI_CON1),
		(val),
		(PMIC_RG_SRCLKEN_IN3_EN_MASK),
		(PMIC_RG_SRCLKEN_IN3_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_srclken_in3_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_TOP_SPI_CON1),
		(&val),
		(PMIC_RG_SRCLKEN_IN3_EN_MASK),
		(PMIC_RG_SRCLKEN_IN3_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DSN_ID),
		(&val),
		(PMIC_SCK_TOP_ANA_ID_MASK),
		(PMIC_SCK_TOP_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DSN_ID),
		(&val),
		(PMIC_SCK_TOP_DIG_ID_MASK),
		(PMIC_SCK_TOP_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DSN_REV0),
		(&val),
		(PMIC_SCK_TOP_ANA_MINOR_REV_MASK),
		(PMIC_SCK_TOP_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DSN_REV0),
		(&val),
		(PMIC_SCK_TOP_ANA_MAJOR_REV_MASK),
		(PMIC_SCK_TOP_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DSN_REV0),
		(&val),
		(PMIC_SCK_TOP_DIG_MINOR_REV_MASK),
		(PMIC_SCK_TOP_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DSN_REV0),
		(&val),
		(PMIC_SCK_TOP_DIG_MAJOR_REV_MASK),
		(PMIC_SCK_TOP_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DBI),
		(&val),
		(PMIC_SCK_TOP_CBS_MASK),
		(PMIC_SCK_TOP_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_DBI),
		(&val),
		(PMIC_SCK_TOP_BIX_MASK),
		(PMIC_SCK_TOP_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_sck_top_xtal_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CON0),
		(val),
		(PMIC_SCK_TOP_XTAL_SEL_MASK),
		(PMIC_SCK_TOP_XTAL_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sck_top_reserved(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CON0),
		(val),
		(PMIC_SCK_TOP_RESERVED_MASK),
		(PMIC_SCK_TOP_RESERVED_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_xosc32_enb_det(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_CON1),
		(&val),
		(PMIC_XOSC32_ENB_DET_MASK),
		(PMIC_XOSC32_ENB_DET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_sck_top_test_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_TEST_OUT),
		(&val),
		(PMIC_SCK_TOP_TEST_OUT_MASK),
		(PMIC_SCK_TOP_TEST_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_sck_top_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_TEST_CON0),
		(val),
		(PMIC_SCK_TOP_MON_FLAG_SEL_MASK),
		(PMIC_SCK_TOP_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sck_top_mon_grp_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_TEST_CON0),
		(val),
		(PMIC_SCK_TOP_MON_GRP_SEL_MASK),
		(PMIC_SCK_TOP_MON_GRP_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_sec_mclk_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_SEC_MCLK_PDN_MASK),
		(PMIC_RG_RTC_SEC_MCLK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eosc_cali_test_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_EOSC_CALI_TEST_CK_PDN_MASK),
		(PMIC_RG_EOSC_CALI_TEST_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_eosc32_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_EOSC32_CK_PDN_MASK),
		(PMIC_RG_RTC_EOSC32_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_sec_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_SEC_32K_CK_PDN_MASK),
		(PMIC_RG_RTC_SEC_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_mclk_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_MCLK_PDN_MASK),
		(PMIC_RG_RTC_MCLK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_32K_CK_PDN_MASK),
		(PMIC_RG_RTC_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_26m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_26M_CK_PDN_MASK),
		(PMIC_RG_RTC_26M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_2sec_off_det_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_2SEC_OFF_DET_PDN_MASK),
		(PMIC_RG_RTC_2SEC_OFF_DET_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_intrp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_RTC_INTRP_CK_PDN_MASK),
		(PMIC_RG_RTC_INTRP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_26m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_26M_CK_PDN_HWEN_MASK),
		(PMIC_RG_RTC_26M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_mclk_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_MCLK_PDN_HWEN_MASK),
		(PMIC_RG_RTC_MCLK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_sec_32k_ck_pdn_hwen(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_SEC_32K_CK_PDN_HWEN_MASK),
		(PMIC_RG_RTC_SEC_32K_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_sec_mclk_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_SEC_MCLK_PDN_HWEN_MASK),
		(PMIC_RG_RTC_SEC_MCLK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_intrp_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_INTRP_CK_PDN_HWEN_MASK),
		(PMIC_RG_RTC_INTRP_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_clk_pdn_hwen_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_CLK_PDN_HWEN_RSV_1_MASK),
		(PMIC_RG_RTC_CLK_PDN_HWEN_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_clk_pdn_hwen_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_RTC_CLK_PDN_HWEN_RSV_0_MASK),
		(PMIC_RG_RTC_CLK_PDN_HWEN_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_ck_tstsel_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKTST_CON),
		(val),
		(PMIC_RG_RTC_CK_TSTSEL_RSV_MASK),
		(PMIC_RG_RTC_CK_TSTSEL_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtcdet_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKTST_CON),
		(val),
		(PMIC_RG_RTCDET_CK_TSTSEL_MASK),
		(PMIC_RG_RTCDET_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eosc_cali_test_ck_tstsel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKTST_CON),
		(val),
		(PMIC_RG_EOSC_CALI_TEST_CK_TSTSEL_MASK),
		(PMIC_RG_EOSC_CALI_TEST_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_eosc32_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_CKTST_CON),
		(val),
		(PMIC_RG_RTC_EOSC32_CK_TSTSEL_MASK),
		(PMIC_RG_RTC_EOSC32_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_RTC_SWRST_MASK),
		(PMIC_RG_RTC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_sec_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_RTC_SEC_SWRST_MASK),
		(PMIC_RG_RTC_SEC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_rtc_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_RTC_SWRST_MASK),
		(PMIC_RG_BANK_RTC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_rtc_sec_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_RTC_SEC_SWRST_MASK),
		(PMIC_RG_BANK_RTC_SEC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_eosc_cali_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_EOSC_CALI_SWRST_MASK),
		(PMIC_RG_BANK_EOSC_CALI_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_sck_top_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_SCK_TOP_SWRST_MASK),
		(PMIC_RG_BANK_SCK_TOP_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_fqmtr_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_FQMTR_RST_MASK),
		(PMIC_RG_BANK_FQMTR_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_en_rtc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_RTC_MASK),
		(PMIC_RG_INT_EN_RTC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_rtc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_RTC_MASK),
		(PMIC_RG_INT_EN_RTC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_rtc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_RTC_MASK),
		(PMIC_RG_INT_MASK_RTC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_rtc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_SCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_RTC_MASK),
		(PMIC_RG_INT_RAW_STATUS_RTC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_sck_top_polarity(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SCK_TOP_INT_MISC_CON),
		(val),
		(PMIC_SCK_TOP_POLARITY_MASK),
		(PMIC_SCK_TOP_POLARITY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_eosc_cali_start(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_EOSC_CALI_CON0),
		(val),
		(PMIC_EOSC_CALI_START_MASK),
		(PMIC_EOSC_CALI_START_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_eosc_cali_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_EOSC_CALI_CON0),
		(val),
		(PMIC_EOSC_CALI_TD_MASK),
		(PMIC_EOSC_CALI_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_eosc_cali_test(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_EOSC_CALI_CON0),
		(val),
		(PMIC_EOSC_CALI_TEST_MASK),
		(PMIC_EOSC_CALI_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_eosc_cali_dcxo_rdy_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_EOSC_CALI_CON1),
		(val),
		(PMIC_EOSC_CALI_DCXO_RDY_TD_MASK),
		(PMIC_EOSC_CALI_DCXO_RDY_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_frc_vtcxo0_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_EOSC_CALI_CON1),
		(val),
		(PMIC_FRC_VTCXO0_ON_MASK),
		(PMIC_FRC_VTCXO0_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_eosc_cali_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_EOSC_CALI_CON1),
		(val),
		(PMIC_EOSC_CALI_RSV_MASK),
		(PMIC_EOSC_CALI_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_mix_eosc32_stp_lpdtb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_MIX_CON0),
		(&val),
		(PMIC_MIX_EOSC32_STP_LPDTB_MASK),
		(PMIC_MIX_EOSC32_STP_LPDTB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_mix_eosc32_stp_lpden(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON0),
		(val),
		(PMIC_MIX_EOSC32_STP_LPDEN_MASK),
		(PMIC_MIX_EOSC32_STP_LPDEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_xosc32_stp_pwdb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON0),
		(val),
		(PMIC_MIX_XOSC32_STP_PWDB_MASK),
		(PMIC_MIX_XOSC32_STP_PWDB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_mix_xosc32_stp_lpdtb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_MIX_CON0),
		(&val),
		(PMIC_MIX_XOSC32_STP_LPDTB_MASK),
		(PMIC_MIX_XOSC32_STP_LPDTB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_mix_xosc32_stp_lpden(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON0),
		(val),
		(PMIC_MIX_XOSC32_STP_LPDEN_MASK),
		(PMIC_MIX_XOSC32_STP_LPDEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_xosc32_stp_lpdrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON0),
		(val),
		(PMIC_MIX_XOSC32_STP_LPDRST_MASK),
		(PMIC_MIX_XOSC32_STP_LPDRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_xosc32_stp_cali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON0),
		(val),
		(PMIC_MIX_XOSC32_STP_CALI_MASK),
		(PMIC_MIX_XOSC32_STP_CALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_stmp_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON0),
		(val),
		(PMIC_STMP_MODE_MASK),
		(PMIC_STMP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_eosc32_stp_chop_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_EOSC32_STP_CHOP_EN_MASK),
		(PMIC_MIX_EOSC32_STP_CHOP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_dcxo_stp_lvsh_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_DCXO_STP_LVSH_EN_MASK),
		(PMIC_MIX_DCXO_STP_LVSH_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_pmu_stp_ddlo_vrtc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_PMU_STP_DDLO_VRTC_MASK),
		(PMIC_MIX_PMU_STP_DDLO_VRTC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_pmu_stp_ddlo_vrtc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_PMU_STP_DDLO_VRTC_EN_MASK),
		(PMIC_MIX_PMU_STP_DDLO_VRTC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_stp_xosc32_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_RTC_STP_XOSC32_ENB_MASK),
		(PMIC_MIX_RTC_STP_XOSC32_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_dcxo_stp_test_deglitch_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE_MASK),
		(PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_eosc32_stp_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_EOSC32_STP_RSV_MASK),
		(PMIC_MIX_EOSC32_STP_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_eosc32_vct_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_EOSC32_VCT_EN_MASK),
		(PMIC_MIX_EOSC32_VCT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_eosc32_opt(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_EOSC32_OPT_MASK),
		(PMIC_MIX_EOSC32_OPT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_dcxo_stp_lvsh_en_int(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_DCXO_STP_LVSH_EN_INT_MASK),
		(PMIC_MIX_DCXO_STP_LVSH_EN_INT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_gpio_coredetb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_RTC_GPIO_COREDETB_MASK),
		(PMIC_MIX_RTC_GPIO_COREDETB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_gpio_f32kob(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_RTC_GPIO_F32KOB_MASK),
		(PMIC_MIX_RTC_GPIO_F32KOB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_gpio_gpo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_RTC_GPIO_GPO_MASK),
		(PMIC_MIX_RTC_GPIO_GPO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_gpio_oe(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON1),
		(val),
		(PMIC_MIX_RTC_GPIO_OE_MASK),
		(PMIC_MIX_RTC_GPIO_OE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_mix_rtc_stp_debug_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_MIX_CON2),
		(&val),
		(PMIC_MIX_RTC_STP_DEBUG_OUT_MASK),
		(PMIC_MIX_RTC_STP_DEBUG_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_mix_rtc_stp_debug_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON2),
		(val),
		(PMIC_MIX_RTC_STP_DEBUG_SEL_MASK),
		(PMIC_MIX_RTC_STP_DEBUG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_stp_k_eosc32_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON2),
		(val),
		(PMIC_MIX_RTC_STP_K_EOSC32_EN_MASK),
		(PMIC_MIX_RTC_STP_K_EOSC32_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_rtc_stp_embck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON2),
		(val),
		(PMIC_MIX_RTC_STP_EMBCK_SEL_MASK),
		(PMIC_MIX_RTC_STP_EMBCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mix_stp_bbwakeup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON2),
		(val),
		(PMIC_MIX_STP_BBWAKEUP_MASK),
		(PMIC_MIX_STP_BBWAKEUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_mix_stp_rtc_ddlo(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_MIX_CON2),
		(&val),
		(PMIC_MIX_STP_RTC_DDLO_MASK),
		(PMIC_MIX_STP_RTC_DDLO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mix_rtc_xosc32_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_MIX_CON2),
		(&val),
		(PMIC_MIX_RTC_XOSC32_ENB_MASK),
		(PMIC_MIX_RTC_XOSC32_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_mix_efuse_xosc32_enb_opt(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_MIX_CON2),
		(val),
		(PMIC_MIX_EFUSE_XOSC32_ENB_OPT_MASK),
		(PMIC_MIX_EFUSE_XOSC32_ENB_OPT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rtc_test_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_DIG_CON0),
		(&val),
		(PMIC_RG_RTC_TEST_OUT_MASK),
		(PMIC_RG_RTC_TEST_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_rtc_dig_test_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_DIG_CON0),
		(val),
		(PMIC_RG_RTC_DIG_TEST_IN_MASK),
		(PMIC_RG_RTC_DIG_TEST_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_dig_test_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_DIG_CON0),
		(val),
		(PMIC_RG_RTC_DIG_TEST_MODE_MASK),
		(PMIC_RG_RTC_DIG_TEST_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rtc_dig_test_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_DIG_CON0),
		(&val),
		(PMIC_RG_RTC_DIG_TEST_MODE_MASK),
		(PMIC_RG_RTC_DIG_TEST_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fqmtr_tcksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FQMTR_CON0),
		(val),
		(PMIC_FQMTR_TCKSEL_MASK),
		(PMIC_FQMTR_TCKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fqmtr_busy(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FQMTR_CON0),
		(&val),
		(PMIC_FQMTR_BUSY_MASK),
		(PMIC_FQMTR_BUSY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fqmtr_dcxo26m_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FQMTR_CON0),
		(val),
		(PMIC_FQMTR_DCXO26M_EN_MASK),
		(PMIC_FQMTR_DCXO26M_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fqmtr_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FQMTR_CON0),
		(val),
		(PMIC_FQMTR_EN_MASK),
		(PMIC_FQMTR_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fqmtr_winset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FQMTR_CON1),
		(val),
		(PMIC_FQMTR_WINSET_MASK),
		(PMIC_FQMTR_WINSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fqmtr_data(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FQMTR_CON2),
		(&val),
		(PMIC_FQMTR_DATA_MASK),
		(PMIC_FQMTR_DATA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_xo_soc_vote(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_BUF_CTL0),
		(val),
		(PMIC_XO_SOC_VOTE_MASK),
		(PMIC_XO_SOC_VOTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_wcn_vote(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_BUF_CTL1),
		(val),
		(PMIC_XO_WCN_VOTE_MASK),
		(PMIC_XO_WCN_VOTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_nfc_vote(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_BUF_CTL2),
		(val),
		(PMIC_XO_NFC_VOTE_MASK),
		(PMIC_XO_NFC_VOTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cel_vote(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_BUF_CTL3),
		(val),
		(PMIC_XO_CEL_VOTE_MASK),
		(PMIC_XO_CEL_VOTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_ext_vote(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_BUF_CTL4),
		(val),
		(PMIC_XO_EXT_VOTE_MASK),
		(PMIC_XO_EXT_VOTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_mode_conn_bt_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_CONN_BT0),
		(val),
		(PMIC_XO_MODE_CONN_BT_MASK_MASK),
		(PMIC_XO_MODE_CONN_BT_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_buf_conn_bt_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_XO_CONN_BT0),
		(val),
		(PMIC_XO_BUF_CONN_BT_MASK_MASK),
		(PMIC_XO_BUF_CONN_BT_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bbpu(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_BBPU),
		(val),
		(PMIC_BBPU_MASK),
		(PMIC_BBPU_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_cbusy(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_BBPU),
		(&val),
		(PMIC_CBUSY_MASK),
		(PMIC_CBUSY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_alarm_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_BBPU),
		(&val),
		(PMIC_ALARM_STATUS_MASK),
		(PMIC_ALARM_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_alsta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_IRQ_STA),
		(&val),
		(PMIC_ALSTA_MASK),
		(PMIC_ALSTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_tcsta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_IRQ_STA),
		(&val),
		(PMIC_TCSTA_MASK),
		(PMIC_TCSTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_lpsta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_IRQ_STA),
		(&val),
		(PMIC_LPSTA_MASK),
		(PMIC_LPSTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_al_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_IRQ_EN),
		(val),
		(PMIC_AL_EN_MASK),
		(PMIC_AL_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_IRQ_EN),
		(val),
		(PMIC_TC_EN_MASK),
		(PMIC_TC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_oneshot(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_IRQ_EN),
		(val),
		(PMIC_ONESHOT_MASK),
		(PMIC_ONESHOT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_IRQ_EN),
		(val),
		(PMIC_LP_EN_MASK),
		(PMIC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_seccii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_SECCII_MASK),
		(PMIC_SECCII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mincii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_MINCII_MASK),
		(PMIC_MINCII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_houcii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_HOUCII_MASK),
		(PMIC_HOUCII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_domcii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_DOMCII_MASK),
		(PMIC_DOMCII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dowcii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_DOWCII_MASK),
		(PMIC_DOWCII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mthcii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_MTHCII_MASK),
		(PMIC_MTHCII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_yeacii(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_YEACII_MASK),
		(PMIC_YEACII_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_seccii_1_2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_SECCII_1_2_MASK),
		(PMIC_SECCII_1_2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_seccii_1_4(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_SECCII_1_4_MASK),
		(PMIC_SECCII_1_4_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_seccii_1_8(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CII_EN),
		(val),
		(PMIC_SECCII_1_8_MASK),
		(PMIC_SECCII_1_8_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sec_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_SEC_MSK_MASK),
		(PMIC_SEC_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_min_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_MIN_MSK_MASK),
		(PMIC_MIN_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_hou_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_HOU_MSK_MASK),
		(PMIC_HOU_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dom_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_DOM_MSK_MASK),
		(PMIC_DOM_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dow_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_DOW_MSK_MASK),
		(PMIC_DOW_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mth_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_MTH_MSK_MASK),
		(PMIC_MTH_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_yea_msk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MASK),
		(val),
		(PMIC_YEA_MSK_MASK),
		(PMIC_YEA_MSK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_second(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_SEC),
		(val),
		(PMIC_TC_SECOND_MASK),
		(PMIC_TC_SECOND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_minute(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_MIN),
		(val),
		(PMIC_TC_MINUTE_MASK),
		(PMIC_TC_MINUTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_hour(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_HOU),
		(val),
		(PMIC_TC_HOUR_MASK),
		(PMIC_TC_HOUR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_dom(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_DOM),
		(val),
		(PMIC_TC_DOM_MASK),
		(PMIC_TC_DOM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_dow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_DOW),
		(val),
		(PMIC_TC_DOW_MASK),
		(PMIC_TC_DOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_month(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_MTH),
		(val),
		(PMIC_TC_MONTH_MASK),
		(PMIC_TC_MONTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rtc_macro_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_TC_MTH),
		(&val),
		(PMIC_RTC_MACRO_ID_MASK),
		(PMIC_RTC_MACRO_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_tc_year(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_YEA),
		(val),
		(PMIC_TC_YEAR_MASK),
		(PMIC_TC_YEAR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_second(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_AL_SECOND_MASK),
		(PMIC_AL_SECOND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bbpu_auto_pdn_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_BBPU_AUTO_PDN_SEL_MASK),
		(PMIC_BBPU_AUTO_PDN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bbpu_2sec_ck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_BBPU_2SEC_CK_SEL_MASK),
		(PMIC_BBPU_2SEC_CK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bbpu_2sec_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_BBPU_2SEC_EN_MASK),
		(PMIC_BBPU_2SEC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bbpu_2sec_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_BBPU_2SEC_MODE_MASK),
		(PMIC_BBPU_2SEC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_bbpu_2sec_stat_sta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_AL_SEC),
		(&val),
		(PMIC_BBPU_2SEC_STAT_STA_MASK),
		(PMIC_BBPU_2SEC_STAT_STA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rtc_lpd_opt(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_RTC_LPD_OPT_MASK),
		(PMIC_RTC_LPD_OPT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_eosc32_vtcxo_on_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_SEC),
		(val),
		(PMIC_K_EOSC32_VTCXO_ON_SEL_MASK),
		(PMIC_K_EOSC32_VTCXO_ON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_minute(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MIN),
		(val),
		(PMIC_AL_MINUTE_MASK),
		(PMIC_AL_MINUTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_hour(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_HOU),
		(val),
		(PMIC_AL_HOUR_MASK),
		(PMIC_AL_HOUR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_new_spare0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_HOU),
		(val),
		(PMIC_NEW_SPARE0_MASK),
		(PMIC_NEW_SPARE0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_dom(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_DOM),
		(val),
		(PMIC_AL_DOM_MASK),
		(PMIC_AL_DOM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_new_spare1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_DOM),
		(val),
		(PMIC_NEW_SPARE1_MASK),
		(PMIC_NEW_SPARE1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_dow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_DOW),
		(val),
		(PMIC_AL_DOW_MASK),
		(PMIC_AL_DOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eosc_cali_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_DOW),
		(val),
		(PMIC_RG_EOSC_CALI_TD_MASK),
		(PMIC_RG_EOSC_CALI_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_new_spare2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_DOW),
		(val),
		(PMIC_NEW_SPARE2_MASK),
		(PMIC_NEW_SPARE2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_month(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MTH),
		(val),
		(PMIC_AL_MONTH_MASK),
		(PMIC_AL_MONTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_new_spare3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_MTH),
		(val),
		(PMIC_NEW_SPARE3_MASK),
		(PMIC_NEW_SPARE3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_al_year(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_YEA),
		(val),
		(PMIC_AL_YEAR_MASK),
		(PMIC_AL_YEAR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_k_eosc_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_AL_YEA),
		(val),
		(PMIC_RTC_K_EOSC_RSV_MASK),
		(PMIC_RTC_K_EOSC_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xosccali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_XOSCCALI_MASK),
		(PMIC_XOSCCALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rtc_xosc32_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_OSC32CON),
		(&val),
		(PMIC_RTC_XOSC32_ENB_MASK),
		(PMIC_RTC_XOSC32_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rtc_embck_sel_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_EMBCK_SEL_MODE_MASK),
		(PMIC_RTC_EMBCK_SEL_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_embck_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_EMBCK_SRC_SEL_MASK),
		(PMIC_RTC_EMBCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_embck_sel_option(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_EMBCK_SEL_OPTION_MASK),
		(PMIC_RTC_EMBCK_SEL_OPTION_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_gps_ckout_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_GPS_CKOUT_EN_MASK),
		(PMIC_RTC_GPS_CKOUT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_eosc32_vct_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_EOSC32_VCT_EN_MASK),
		(PMIC_RTC_EOSC32_VCT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_eosc32_chop_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_EOSC32_CHOP_EN_MASK),
		(PMIC_RTC_EOSC32_CHOP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_gp_osc32_con(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_GP_OSC32_CON_MASK),
		(PMIC_RTC_GP_OSC32_CON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_reg_xosc32_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_OSC32CON),
		(val),
		(PMIC_RTC_REG_XOSC32_ENB_MASK),
		(PMIC_RTC_REG_XOSC32_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_powerkey1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_POWERKEY1),
		(val),
		(PMIC_RTC_POWERKEY1_MASK),
		(PMIC_RTC_POWERKEY1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_powerkey2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_POWERKEY2),
		(val),
		(PMIC_RTC_POWERKEY2_MASK),
		(PMIC_RTC_POWERKEY2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_pdn1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_PDN1),
		(val),
		(PMIC_RTC_PDN1_MASK),
		(PMIC_RTC_PDN1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_pdn2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_PDN2),
		(val),
		(PMIC_RTC_PDN2_MASK),
		(PMIC_RTC_PDN2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_spar0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_SPAR0),
		(val),
		(PMIC_RTC_SPAR0_MASK),
		(PMIC_RTC_SPAR0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_spar1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_SPAR1),
		(val),
		(PMIC_RTC_SPAR1_MASK),
		(PMIC_RTC_SPAR1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_prot(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_PROT),
		(val),
		(PMIC_RTC_PROT_MASK),
		(PMIC_RTC_PROT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_diff(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_DIFF),
		(val),
		(PMIC_RTC_DIFF_MASK),
		(PMIC_RTC_DIFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_power_detected(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_DIFF),
		(&val),
		(PMIC_POWER_DETECTED_MASK),
		(PMIC_POWER_DETECTED_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_k_eosc32_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_DIFF),
		(val),
		(PMIC_K_EOSC32_RSV_MASK),
		(PMIC_K_EOSC32_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cali_rd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_DIFF),
		(val),
		(PMIC_CALI_RD_SEL_MASK),
		(PMIC_CALI_RD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_cali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CALI),
		(val),
		(PMIC_RTC_CALI_MASK),
		(PMIC_RTC_CALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cali_wr_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CALI),
		(val),
		(PMIC_CALI_WR_SEL_MASK),
		(PMIC_CALI_WR_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_eosc32_overflow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CALI),
		(val),
		(PMIC_K_EOSC32_OVERFLOW_MASK),
		(PMIC_K_EOSC32_OVERFLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vbat_lpsta_raw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_VBAT_LPSTA_RAW_MASK),
		(PMIC_VBAT_LPSTA_RAW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_eosc32_lpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_EOSC32_LPEN_MASK),
		(PMIC_EOSC32_LPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xosc32_lpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_XOSC32_LPEN_MASK),
		(PMIC_XOSC32_LPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_lprst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_LPRST_MASK),
		(PMIC_LPRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cdbo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_CDBO_MASK),
		(PMIC_CDBO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_f32kob(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_F32KOB_MASK),
		(PMIC_F32KOB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GPO_MASK),
		(PMIC_GPO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_goe(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GOE_MASK),
		(PMIC_GOE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gsr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GSR_MASK),
		(PMIC_GSR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gsmt(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GSMT_MASK),
		(PMIC_GSMT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GPEN_MASK),
		(PMIC_GPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_gpu(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GPU_MASK),
		(PMIC_GPU_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ge4(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GE4_MASK),
		(PMIC_GE4_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ge8(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_CON),
		(val),
		(PMIC_GE8_MASK),
		(PMIC_GE8_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_gpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_CON),
		(&val),
		(PMIC_GPI_MASK),
		(PMIC_GPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_lpsta_raw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_CON),
		(&val),
		(PMIC_LPSTA_RAW_MASK),
		(PMIC_LPSTA_RAW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rtc_int_cnt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_RTC_INT_CNT),
		(&val),
		(PMIC_RTC_INT_CNT_MASK),
		(PMIC_RTC_INT_CNT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rtc_sec_dat0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_SEC_DAT0),
		(val),
		(PMIC_RTC_SEC_DAT0_MASK),
		(PMIC_RTC_SEC_DAT0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_sec_dat1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_SEC_DAT1),
		(val),
		(PMIC_RTC_SEC_DAT1_MASK),
		(PMIC_RTC_SEC_DAT1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_sec_dat2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_SEC_DAT2),
		(val),
		(PMIC_RTC_SEC_DAT2_MASK),
		(PMIC_RTC_SEC_DAT2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_second_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_SEC_SEC),
		(val),
		(PMIC_TC_SECOND_SEC_MASK),
		(PMIC_TC_SECOND_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_minute_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_MIN_SEC),
		(val),
		(PMIC_TC_MINUTE_SEC_MASK),
		(PMIC_TC_MINUTE_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_hour_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_HOU_SEC),
		(val),
		(PMIC_TC_HOUR_SEC_MASK),
		(PMIC_TC_HOUR_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_dom_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_DOM_SEC),
		(val),
		(PMIC_TC_DOM_SEC_MASK),
		(PMIC_TC_DOM_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_dow_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_DOW_SEC),
		(val),
		(PMIC_TC_DOW_SEC_MASK),
		(PMIC_TC_DOW_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_month_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_MTH_SEC),
		(val),
		(PMIC_TC_MONTH_SEC_MASK),
		(PMIC_TC_MONTH_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_tc_year_sec(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_TC_YEA_SEC),
		(val),
		(PMIC_TC_YEAR_SEC_MASK),
		(PMIC_TC_YEAR_SEC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rtc_sec_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_RTC_SEC_CK_PDN),
		(val),
		(PMIC_RTC_SEC_CK_PDN_MASK),
		(PMIC_RTC_SEC_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_dcxo_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_DSN_DBI),
		(&val),
		(PMIC_DCXO_DSN_CBS_MASK),
		(PMIC_DCXO_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dcxo_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_DSN_DBI),
		(&val),
		(PMIC_DCXO_DSN_BIX_MASK),
		(PMIC_DCXO_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dcxo_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_DSN_DBI),
		(&val),
		(PMIC_DCXO_DSN_ESP_MASK),
		(PMIC_DCXO_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dcxo_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_DSN_DXI),
		(&val),
		(PMIC_DCXO_DSN_FPI_MASK),
		(PMIC_DCXO_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_xo_extbuf1_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF1_MODE_MASK),
		(PMIC_XO_EXTBUF1_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf1_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF1_EN_M_MASK),
		(PMIC_XO_EXTBUF1_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf2_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF2_MODE_MASK),
		(PMIC_XO_EXTBUF2_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf2_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF2_EN_M_MASK),
		(PMIC_XO_EXTBUF2_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf3_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF3_MODE_MASK),
		(PMIC_XO_EXTBUF3_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf3_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF3_EN_M_MASK),
		(PMIC_XO_EXTBUF3_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf4_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF4_MODE_MASK),
		(PMIC_XO_EXTBUF4_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf4_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_EXTBUF4_EN_M_MASK),
		(PMIC_XO_EXTBUF4_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_bb_lpm_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_BB_LPM_EN_M_MASK),
		(PMIC_XO_BB_LPM_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_enbb_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_ENBB_MAN_MASK),
		(PMIC_XO_ENBB_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_enbb_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_ENBB_EN_M_MASK),
		(PMIC_XO_ENBB_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_clksel_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW00),
		(val),
		(PMIC_XO_CLKSEL_MAN_MASK),
		(PMIC_XO_CLKSEL_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_clksel_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_CLKSEL_EN_M_MASK),
		(PMIC_XO_CLKSEL_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf1_ckg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF1_CKG_MAN_MASK),
		(PMIC_XO_EXTBUF1_CKG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf1_ckg_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF1_CKG_EN_M_MASK),
		(PMIC_XO_EXTBUF1_CKG_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf2_ckg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF2_CKG_MAN_MASK),
		(PMIC_XO_EXTBUF2_CKG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf2_ckg_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF2_CKG_EN_M_MASK),
		(PMIC_XO_EXTBUF2_CKG_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf3_ckg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF3_CKG_MAN_MASK),
		(PMIC_XO_EXTBUF3_CKG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf3_ckg_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF3_CKG_EN_M_MASK),
		(PMIC_XO_EXTBUF3_CKG_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf4_ckg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF4_CKG_MAN_MASK),
		(PMIC_XO_EXTBUF4_CKG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf4_ckg_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_EXTBUF4_CKG_EN_M_MASK),
		(PMIC_XO_EXTBUF4_CKG_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_hv_pbuf_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_HV_PBUF_MAN_MASK),
		(PMIC_XO_HV_PBUF_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_hv_pbuf_en_sync_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_HV_PBUF_EN_SYNC_M_MASK),
		(PMIC_XO_HV_PBUF_EN_SYNC_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_hv_pbufbias_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_HV_PBUFBIAS_EN_M_MASK),
		(PMIC_XO_HV_PBUFBIAS_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_lv_pbuf_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_LV_PBUF_MAN_MASK),
		(PMIC_XO_LV_PBUF_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_lv_pbufbias_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_LV_PBUFBIAS_EN_M_MASK),
		(PMIC_XO_LV_PBUFBIAS_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_lv_pbuf_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_LV_PBUF_EN_M_MASK),
		(PMIC_XO_LV_PBUF_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_bblpm_cksel_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW01),
		(val),
		(PMIC_XO_BBLPM_CKSEL_M_MASK),
		(PMIC_XO_BBLPM_CKSEL_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_en32k_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_EN32K_MAN_MASK),
		(PMIC_XO_EN32K_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_en32k_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_EN32K_M_MASK),
		(PMIC_XO_EN32K_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_cbank_pol(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_RG_XO_CBANK_POL_MASK),
		(PMIC_RG_XO_CBANK_POL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_xmode_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_XMODE_M_MASK),
		(PMIC_XO_XMODE_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_strup_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_STRUP_MODE_MASK),
		(PMIC_XO_STRUP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_RG_XO_PCTAT_CCOMP_MASK),
		(PMIC_RG_XO_PCTAT_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_vtest_sel_mux(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_RG_XO_VTEST_SEL_MUX_MASK),
		(PMIC_RG_XO_VTEST_SEL_MUX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_SWRST_MASK),
		(PMIC_XO_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cbank_sync_dyn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_CBANK_SYNC_DYN_MASK),
		(PMIC_XO_CBANK_SYNC_DYN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_pctat_en_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_PCTAT_EN_MAN_MASK),
		(PMIC_XO_PCTAT_EN_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_pctat_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW02),
		(val),
		(PMIC_XO_PCTAT_EN_M_MASK),
		(PMIC_XO_PCTAT_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_pmu_cken_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_PMU_CKEN_M_MASK),
		(PMIC_XO_PMU_CKEN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_pmu_cken_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_PMU_CKEN_MAN_MASK),
		(PMIC_XO_PMU_CKEN_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf6_ckg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_EXTBUF6_CKG_MAN_MASK),
		(PMIC_XO_EXTBUF6_CKG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf6_ckg_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_EXTBUF6_CKG_EN_M_MASK),
		(PMIC_XO_EXTBUF6_CKG_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf7_ckg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_EXTBUF7_CKG_MAN_MASK),
		(PMIC_XO_EXTBUF7_CKG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf7_ckg_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_EXTBUF7_CKG_EN_M_MASK),
		(PMIC_XO_EXTBUF7_CKG_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_core_lpm_isel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_RG_XO_CORE_LPM_ISEL_MASK),
		(PMIC_RG_XO_CORE_LPM_ISEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_core_lpm_isel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW03),
		(&val),
		(PMIC_RG_XO_CORE_LPM_ISEL_MASK),
		(PMIC_RG_XO_CORE_LPM_ISEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_xo_fpm_isel_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW03),
		(val),
		(PMIC_XO_FPM_ISEL_M_MASK),
		(PMIC_XO_FPM_ISEL_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cdac_fpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW04),
		(val),
		(PMIC_XO_CDAC_FPM_MASK),
		(PMIC_XO_CDAC_FPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cdac_lpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW04),
		(val),
		(PMIC_XO_CDAC_LPM_MASK),
		(PMIC_XO_CDAC_LPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_32kdiv_nfrac_fpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW05),
		(val),
		(PMIC_XO_32KDIV_NFRAC_FPM_MASK),
		(PMIC_XO_32KDIV_NFRAC_FPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cofst_fpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW05),
		(val),
		(PMIC_XO_COFST_FPM_MASK),
		(PMIC_XO_COFST_FPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_32kdiv_nfrac_lpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW06),
		(val),
		(PMIC_XO_32KDIV_NFRAC_LPM_MASK),
		(PMIC_XO_32KDIV_NFRAC_LPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cofst_lpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW06),
		(val),
		(PMIC_XO_COFST_LPM_MASK),
		(PMIC_XO_COFST_LPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_MAN_MASK),
		(PMIC_XO_CORE_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_EN_M_MASK),
		(PMIC_XO_CORE_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_turbo_en_sync_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_TURBO_EN_SYNC_M_MASK),
		(PMIC_XO_CORE_TURBO_EN_SYNC_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_is_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_RG_XO_PCTAT_IS_EN_MASK),
		(PMIC_RG_XO_PCTAT_IS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_pctat_is_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW07),
		(&val),
		(PMIC_RG_XO_PCTAT_IS_EN_MASK),
		(PMIC_RG_XO_PCTAT_IS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_xo_startup_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_STARTUP_EN_M_MASK),
		(PMIC_XO_STARTUP_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_cmp_gsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_RG_XO_CMP_GSEL_MASK),
		(PMIC_RG_XO_CMP_GSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_vbsel_sync_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_VBSEL_SYNC_M_MASK),
		(PMIC_XO_CORE_VBSEL_SYNC_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_fpmbias_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_FPMBIAS_EN_M_MASK),
		(PMIC_XO_CORE_FPMBIAS_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_lpmcf_sync_fpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_LPMCF_SYNC_FPM_MASK),
		(PMIC_XO_CORE_LPMCF_SYNC_FPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_lpmcf_sync_lpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_XO_CORE_LPMCF_SYNC_LPM_MASK),
		(PMIC_XO_CORE_LPMCF_SYNC_LPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_core_lpm_isel_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_RG_XO_CORE_LPM_ISEL_MAN_MASK),
		(PMIC_RG_XO_CORE_LPM_ISEL_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_core_lpm_isel_man(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW07),
		(&val),
		(PMIC_RG_XO_CORE_LPM_ISEL_MAN_MASK),
		(PMIC_RG_XO_CORE_LPM_ISEL_MAN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_core_lpm_idac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW07),
		(val),
		(PMIC_RG_XO_CORE_LPM_IDAC_MASK),
		(PMIC_RG_XO_CORE_LPM_IDAC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_core_lpm_idac(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW07),
		(&val),
		(PMIC_RG_XO_CORE_LPM_IDAC_MASK),
		(PMIC_RG_XO_CORE_LPM_IDAC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_xo_aac_cmp_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_AAC_CMP_MAN_MASK),
		(PMIC_XO_AAC_CMP_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_aac_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_AAC_EN_M_MASK),
		(PMIC_XO_AAC_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_pmic_top_dig_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_PMIC_TOP_DIG_SW_MASK),
		(PMIC_XO_PMIC_TOP_DIG_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cmp_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_CMP_EN_M_MASK),
		(PMIC_XO_CMP_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_aac_vsel_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_AAC_VSEL_M_MASK),
		(PMIC_XO_AAC_VSEL_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_aac_x1en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_RG_XO_AAC_X1EN_MASK),
		(PMIC_RG_XO_AAC_X1EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_lvbuf_cksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_RG_XO_LVBUF_CKSEL_MASK),
		(PMIC_RG_XO_LVBUF_CKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_rfck_extbuf_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_RG_XO_RFCK_EXTBUF_LP_MASK),
		(PMIC_RG_XO_RFCK_EXTBUF_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_rfck_extbuf_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW08),
		(&val),
		(PMIC_RG_XO_RFCK_EXTBUF_LP_MASK),
		(PMIC_RG_XO_RFCK_EXTBUF_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_bbck_extbuf_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_RG_XO_BBCK_EXTBUF_LP_MASK),
		(PMIC_RG_XO_BBCK_EXTBUF_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_bbck_extbuf_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW08),
		(&val),
		(PMIC_RG_XO_BBCK_EXTBUF_LP_MASK),
		(PMIC_RG_XO_BBCK_EXTBUF_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_xo_aac_fpm_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_AAC_FPM_TIME_MASK),
		(PMIC_XO_AAC_FPM_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_aac_isel_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_AAC_ISEL_MAN_MASK),
		(PMIC_XO_AAC_ISEL_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_aac_fpm_swen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW08),
		(val),
		(PMIC_XO_AAC_FPM_SWEN_MASK),
		(PMIC_XO_AAC_FPM_SWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_32kdiv_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_32KDIV_SWRST_MASK),
		(PMIC_XO_32KDIV_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_32kdiv_ratio_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_32KDIV_RATIO_MAN_MASK),
		(PMIC_XO_32KDIV_RATIO_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_32kdiv_test_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_32KDIV_TEST_EN_MASK),
		(PMIC_XO_32KDIV_TEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_ctl_sync_buf_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_CTL_SYNC_BUF_MAN_MASK),
		(PMIC_XO_CTL_SYNC_BUF_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_ctl_sync_buf_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_CTL_SYNC_BUF_EN_M_MASK),
		(PMIC_XO_CTL_SYNC_BUF_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_hv_pbuf_vset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_RG_XO_HV_PBUF_VSET_MASK),
		(PMIC_RG_XO_HV_PBUF_VSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf6_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_EXTBUF6_MODE_MASK),
		(PMIC_XO_EXTBUF6_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf6_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_EXTBUF6_EN_M_MASK),
		(PMIC_XO_EXTBUF6_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf7_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_EXTBUF7_MODE_MASK),
		(PMIC_XO_EXTBUF7_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf7_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW09),
		(val),
		(PMIC_XO_EXTBUF7_EN_M_MASK),
		(PMIC_XO_EXTBUF7_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_mdb_tbo_en_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_XO_MDB_TBO_EN_SEL_MASK),
		(PMIC_XO_MDB_TBO_EN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf4_clksel_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_XO_EXTBUF4_CLKSEL_MAN_MASK),
		(PMIC_XO_EXTBUF4_CLKSEL_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vio18pg_bufen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_XO_VIO18PG_BUFEN_MASK),
		(PMIC_XO_VIO18PG_BUFEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cal_en_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_XO_CAL_EN_MAN_MASK),
		(PMIC_XO_CAL_EN_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_cal_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_XO_CAL_EN_M_MASK),
		(PMIC_XO_CAL_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_core_osctd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_CORE_OSCTD_MASK),
		(PMIC_RG_XO_CORE_OSCTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_thadc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_XO_THADC_EN_MASK),
		(PMIC_XO_THADC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_sync_ckpol(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_SYNC_CKPOL_MASK),
		(PMIC_RG_XO_SYNC_CKPOL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_core_fpm_idac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_CORE_FPM_IDAC_MASK),
		(PMIC_RG_XO_CORE_FPM_IDAC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_ctl_pol(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_CTL_POL_MASK),
		(PMIC_RG_XO_CTL_POL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_ctl_sync_byp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_CTL_SYNC_BYP_MASK),
		(PMIC_RG_XO_CTL_SYNC_BYP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_vxo22pg_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_VXO22PG_MAN_MASK),
		(PMIC_RG_XO_VXO22PG_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_hv_pbuf_byp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_HV_PBUF_BYP_MASK),
		(PMIC_RG_XO_HV_PBUF_BYP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_hv_pbuf_encl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW10),
		(val),
		(PMIC_RG_XO_HV_PBUF_ENCL_MASK),
		(PMIC_RG_XO_HV_PBUF_ENCL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_hv_pbuf_encl(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW10),
		(&val),
		(PMIC_RG_XO_HV_PBUF_ENCL_MASK),
		(PMIC_RG_XO_HV_PBUF_ENCL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_core_vgbias_vset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_CORE_VGBIAS_VSET_MASK),
		(PMIC_RG_XO_CORE_VGBIAS_VSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_core_turbo_en_sync_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_XO_CORE_TURBO_EN_SYNC_MAN_MASK),
		(PMIC_XO_CORE_TURBO_EN_SYNC_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_hv_pbuf_iset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_HV_PBUF_ISET_MASK),
		(PMIC_RG_XO_HV_PBUF_ISET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_heater_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_HEATER_SEL_MASK),
		(PMIC_RG_XO_HEATER_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_reserved6(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_RESERVED6_MASK),
		(PMIC_RG_XO_RESERVED6_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_vow_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_VOW_EN_MASK),
		(PMIC_RG_XO_VOW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_vow_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW11),
		(&val),
		(PMIC_RG_XO_VOW_EN_MASK),
		(PMIC_RG_XO_VOW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_lv_pbuf_iset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_LV_PBUF_ISET_MASK),
		(PMIC_RG_XO_LV_PBUF_ISET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_lv_pbuf_fpmiset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW11),
		(val),
		(PMIC_RG_XO_LV_PBUF_FPMISET_MASK),
		(PMIC_RG_XO_LV_PBUF_FPMISET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_bb_lpm_en_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_BB_LPM_EN_SEL_MASK),
		(PMIC_XO_BB_LPM_EN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf1_bblpm_en_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF1_BBLPM_EN_MASK_MASK),
		(PMIC_XO_EXTBUF1_BBLPM_EN_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf2_bblpm_en_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF2_BBLPM_EN_MASK_MASK),
		(PMIC_XO_EXTBUF2_BBLPM_EN_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf3_bblpm_en_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF3_BBLPM_EN_MASK_MASK),
		(PMIC_XO_EXTBUF3_BBLPM_EN_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf4_bblpm_en_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF4_BBLPM_EN_MASK_MASK),
		(PMIC_XO_EXTBUF4_BBLPM_EN_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf6_bblpm_en_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF6_BBLPM_EN_MASK_MASK),
		(PMIC_XO_EXTBUF6_BBLPM_EN_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf7_bblpm_en_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF7_BBLPM_EN_MASK_MASK),
		(PMIC_XO_EXTBUF7_BBLPM_EN_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_dig26m_div4_32kdiv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_RG_XO_DIG26M_DIV4_32KDIV_MASK),
		(PMIC_RG_XO_DIG26M_DIV4_32KDIV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_bblpm_freq_fpm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_RG_XO_BBLPM_FREQ_FPM_MASK),
		(PMIC_RG_XO_BBLPM_FREQ_FPM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf2_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_RG_XO_EXTBUF2_INV_MASK),
		(PMIC_RG_XO_EXTBUF2_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf3_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_RG_XO_EXTBUF3_INV_MASK),
		(PMIC_RG_XO_EXTBUF3_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_thadc_en_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_THADC_EN_MAN_MASK),
		(PMIC_XO_THADC_EN_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_extbuf2_clksel_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_XO_EXTBUF2_CLKSEL_MAN_MASK),
		(PMIC_XO_EXTBUF2_CLKSEL_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_audio_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_RG_XO_AUDIO_EN_MASK),
		(PMIC_RG_XO_AUDIO_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_audio_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW12),
		(&val),
		(PMIC_RG_XO_AUDIO_EN_MASK),
		(PMIC_RG_XO_AUDIO_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_audio_atten(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW12),
		(val),
		(PMIC_RG_XO_AUDIO_ATTEN_MASK),
		(PMIC_RG_XO_AUDIO_ATTEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf2_srsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_EXTBUF2_SRSEL_MASK),
		(PMIC_RG_XO_EXTBUF2_SRSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_dig26m_deglitch(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_DIG26M_DEGLITCH_MASK),
		(PMIC_RG_XO_DIG26M_DEGLITCH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf4_srsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_EXTBUF4_SRSEL_MASK),
		(PMIC_RG_XO_EXTBUF4_SRSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_dig26m_div2_sw_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_DIG26M_DIV2_SW_MAN_MASK),
		(PMIC_RG_XO_DIG26M_DIV2_SW_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf1_hd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_EXTBUF1_HD_MASK),
		(PMIC_RG_XO_EXTBUF1_HD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf3_hd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_EXTBUF3_HD_MASK),
		(PMIC_RG_XO_EXTBUF3_HD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf6_hd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_EXTBUF6_HD_MASK),
		(PMIC_RG_XO_EXTBUF6_HD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf7_hd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW13),
		(val),
		(PMIC_RG_XO_EXTBUF7_HD_MASK),
		(PMIC_RG_XO_EXTBUF7_HD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_sta_ctl_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_STA_CTL_MAN_MASK),
		(PMIC_XO_STA_CTL_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_sta_ctl_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_STA_CTL_M_MASK),
		(PMIC_XO_STA_CTL_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vbbck_en_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_VBBCK_EN_MAN_MASK),
		(PMIC_XO_VBBCK_EN_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vbbck_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_VBBCK_EN_M_MASK),
		(PMIC_XO_VBBCK_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vrfck_en_man(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_VRFCK_EN_MAN_MASK),
		(PMIC_XO_VRFCK_EN_MAN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vrfck_en_m(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_VRFCK_EN_M_MASK),
		(PMIC_XO_VRFCK_EN_M_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_reserved2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW14),
		(val),
		(PMIC_XO_RESERVED2_MASK),
		(PMIC_XO_RESERVED2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_reserved1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW15),
		(val),
		(PMIC_RG_XO_RESERVED1_MASK),
		(PMIC_RG_XO_RESERVED1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_reserved2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW15),
		(val),
		(PMIC_RG_XO_RESERVED2_MASK),
		(PMIC_RG_XO_RESERVED2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_static_auxout_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW16),
		(val),
		(PMIC_XO_STATIC_AUXOUT_SEL_MASK),
		(PMIC_XO_STATIC_AUXOUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_auxout_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW16),
		(val),
		(PMIC_XO_AUXOUT_SEL_MASK),
		(PMIC_XO_AUXOUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_xo_static_auxout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW17),
		(&val),
		(PMIC_XO_STATIC_AUXOUT_MASK),
		(PMIC_XO_STATIC_AUXOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_bg_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_BG_EN_MASK),
		(PMIC_RG_XO_PCTAT_BG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_pctat_bg_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW18),
		(&val),
		(PMIC_RG_XO_PCTAT_BG_EN_MASK),
		(PMIC_RG_XO_PCTAT_BG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_rptat_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_RPTAT_SEL_MASK),
		(PMIC_RG_XO_PCTAT_RPTAT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_iptat_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_IPTAT_SEL_MASK),
		(PMIC_RG_XO_PCTAT_IPTAT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_rctat_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_RCTAT_SEL_MASK),
		(PMIC_RG_XO_PCTAT_RCTAT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_ictat_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_ICTAT_SEL_MASK),
		(PMIC_RG_XO_PCTAT_ICTAT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_cbank_sync_byp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_CBANK_SYNC_BYP_MASK),
		(PMIC_RG_XO_CBANK_SYNC_BYP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_vctat_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_VCTAT_SEL_MASK),
		(PMIC_RG_XO_PCTAT_VCTAT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_pctat_vtemp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW18),
		(val),
		(PMIC_RG_XO_PCTAT_VTEMP_MASK),
		(PMIC_RG_XO_PCTAT_VTEMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_core_lpm_pmicbias(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW19),
		(val),
		(PMIC_RG_XO_CORE_LPM_PMICBIAS_MASK),
		(PMIC_RG_XO_CORE_LPM_PMICBIAS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xo_core_lpm_pmicbias(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_CW19),
		(&val),
		(PMIC_RG_XO_CORE_LPM_PMICBIAS_MASK),
		(PMIC_RG_XO_CORE_LPM_PMICBIAS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf1_rsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW19),
		(val),
		(PMIC_RG_XO_EXTBUF1_RSEL_MASK),
		(PMIC_RG_XO_EXTBUF1_RSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf2_rsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW19),
		(val),
		(PMIC_RG_XO_EXTBUF2_RSEL_MASK),
		(PMIC_RG_XO_EXTBUF2_RSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf3_rsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW19),
		(val),
		(PMIC_RG_XO_EXTBUF3_RSEL_MASK),
		(PMIC_RG_XO_EXTBUF3_RSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf4_rsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW19),
		(val),
		(PMIC_RG_XO_EXTBUF4_RSEL_MASK),
		(PMIC_RG_XO_EXTBUF4_RSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xo_extbuf7_rsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_CW19),
		(val),
		(PMIC_RG_XO_EXTBUF7_RSEL_MASK),
		(PMIC_RG_XO_EXTBUF7_RSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_dcxo_elr_len(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_ELR_NUM),
		(&val),
		(PMIC_DCXO_ELR_LEN_MASK),
		(PMIC_DCXO_ELR_LEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_xo_dig26m_div2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ELR0),
		(val),
		(PMIC_RG_XO_DIG26M_DIV2_MASK),
		(PMIC_RG_XO_DIG26M_DIV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_pwrkey_rstb_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ELR0),
		(val),
		(PMIC_XO_PWRKEY_RSTB_SEL_MASK),
		(PMIC_XO_PWRKEY_RSTB_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_elr_reserved(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ELR0),
		(val),
		(PMIC_XO_ELR_RESERVED_MASK),
		(PMIC_XO_ELR_RESERVED_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_psc_top_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_ID),
		(&val),
		(PMIC_PSC_TOP_ANA_ID_MASK),
		(PMIC_PSC_TOP_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_ID),
		(&val),
		(PMIC_PSC_TOP_DIG_ID_MASK),
		(PMIC_PSC_TOP_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_REV0),
		(&val),
		(PMIC_PSC_TOP_ANA_MINOR_REV_MASK),
		(PMIC_PSC_TOP_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_REV0),
		(&val),
		(PMIC_PSC_TOP_ANA_MAJOR_REV_MASK),
		(PMIC_PSC_TOP_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_REV0),
		(&val),
		(PMIC_PSC_TOP_DIG_MINOR_REV_MASK),
		(PMIC_PSC_TOP_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_REV0),
		(&val),
		(PMIC_PSC_TOP_DIG_MAJOR_REV_MASK),
		(PMIC_PSC_TOP_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_DBI),
		(&val),
		(PMIC_PSC_TOP_CBS_MASK),
		(PMIC_PSC_TOP_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_DBI),
		(&val),
		(PMIC_PSC_TOP_BIX_MASK),
		(PMIC_PSC_TOP_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_DBI),
		(&val),
		(PMIC_PSC_TOP_ESP_MASK),
		(PMIC_PSC_TOP_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_DXI),
		(&val),
		(PMIC_PSC_TOP_FPI_MASK),
		(PMIC_PSC_TOP_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_clk_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TPM0),
		(&val),
		(PMIC_PSC_TOP_CLK_OFFSET_MASK),
		(PMIC_PSC_TOP_CLK_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_rst_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TPM0),
		(&val),
		(PMIC_PSC_TOP_RST_OFFSET_MASK),
		(PMIC_PSC_TOP_RST_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_int_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TPM1),
		(&val),
		(PMIC_PSC_TOP_INT_OFFSET_MASK),
		(PMIC_PSC_TOP_INT_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_psc_top_int_len(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TPM1),
		(&val),
		(PMIC_PSC_TOP_INT_LEN_MASK),
		(PMIC_PSC_TOP_INT_LEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_chrdet_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_CLKCTL_0),
		(val),
		(PMIC_RG_CHRDET_32K_CK_PDN_MASK),
		(PMIC_RG_CHRDET_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_RSTCTL_0),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_RST_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_pwrmsk_rst_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_RSTCTL_0),
		(val),
		(PMIC_RG_PSEQ_PWRMSK_RST_SEL_MASK),
		(PMIC_RG_PSEQ_PWRMSK_RST_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_strup_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_RSTCTL_0),
		(val),
		(PMIC_BANK_STRUP_SWRST_MASK),
		(PMIC_BANK_STRUP_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_pseq_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_RSTCTL_0),
		(val),
		(PMIC_BANK_PSEQ_SWRST_MASK),
		(PMIC_BANK_PSEQ_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_chrdet_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_RSTCTL_0),
		(val),
		(PMIC_BANK_CHRDET_SWRST_MASK),
		(PMIC_BANK_CHRDET_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_chrdet_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_RSTCTL_0),
		(val),
		(PMIC_RG_CHRDET_RST_MASK),
		(PMIC_RG_CHRDET_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_en_pwrkey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_PWRKEY_MASK),
		(PMIC_RG_INT_EN_PWRKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_pwrkey(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_PWRKEY_MASK),
		(PMIC_RG_INT_EN_PWRKEY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_homekey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_HOMEKEY_MASK),
		(PMIC_RG_INT_EN_HOMEKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_homekey(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_HOMEKEY_MASK),
		(PMIC_RG_INT_EN_HOMEKEY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_pwrkey_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_PWRKEY_R_MASK),
		(PMIC_RG_INT_EN_PWRKEY_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_pwrkey_r(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_PWRKEY_R_MASK),
		(PMIC_RG_INT_EN_PWRKEY_R_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_homekey_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_HOMEKEY_R_MASK),
		(PMIC_RG_INT_EN_HOMEKEY_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_homekey_r(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_HOMEKEY_R_MASK),
		(PMIC_RG_INT_EN_HOMEKEY_R_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_ni_lbat_int(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_NI_LBAT_INT_MASK),
		(PMIC_RG_INT_EN_NI_LBAT_INT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_ni_lbat_int(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_NI_LBAT_INT_MASK),
		(PMIC_RG_INT_EN_NI_LBAT_INT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_chrdet_edge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_CHRDET_EDGE_MASK),
		(PMIC_RG_INT_EN_CHRDET_EDGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_chrdet_edge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_CHRDET_EDGE_MASK),
		(PMIC_RG_INT_EN_CHRDET_EDGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_pwrkey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_PWRKEY_MASK),
		(PMIC_RG_INT_MASK_PWRKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_homekey(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_HOMEKEY_MASK),
		(PMIC_RG_INT_MASK_HOMEKEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_pwrkey_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_PWRKEY_R_MASK),
		(PMIC_RG_INT_MASK_PWRKEY_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_homekey_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_HOMEKEY_R_MASK),
		(PMIC_RG_INT_MASK_HOMEKEY_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_ni_lbat_int(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_NI_LBAT_INT_MASK),
		(PMIC_RG_INT_MASK_NI_LBAT_INT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_chrdet_edge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_CHRDET_EDGE_MASK),
		(PMIC_RG_INT_MASK_CHRDET_EDGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_pwrkey(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_PWRKEY_MASK),
		(PMIC_RG_INT_RAW_STATUS_PWRKEY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_homekey(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_HOMEKEY_MASK),
		(PMIC_RG_INT_RAW_STATUS_HOMEKEY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_pwrkey_r(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_PWRKEY_R_MASK),
		(PMIC_RG_INT_RAW_STATUS_PWRKEY_R_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_homekey_r(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_HOMEKEY_R_MASK),
		(PMIC_RG_INT_RAW_STATUS_HOMEKEY_R_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_ni_lbat_int(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_NI_LBAT_INT_MASK),
		(PMIC_RG_INT_RAW_STATUS_NI_LBAT_INT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_chrdet_edge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSC_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_CHRDET_EDGE_MASK),
		(PMIC_RG_INT_RAW_STATUS_CHRDET_EDGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_psc_int_polarity(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MISC_CON),
		(val),
		(PMIC_RG_PSC_INT_POLARITY_MASK),
		(PMIC_RG_PSC_INT_POLARITY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_homekey_int_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MISC_CON),
		(val),
		(PMIC_RG_HOMEKEY_INT_SEL_MASK),
		(PMIC_RG_HOMEKEY_INT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pwrkey_int_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_INT_MISC_CON),
		(val),
		(PMIC_RG_PWRKEY_INT_SEL_MASK),
		(PMIC_RG_PWRKEY_INT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_psc_mon_grp_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSC_TOP_MON_CTL),
		(val),
		(PMIC_RG_PSC_MON_GRP_SEL_MASK),
		(PMIC_RG_PSC_MON_GRP_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_strup_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ID),
		(&val),
		(PMIC_STRUP_ANA_ID_MASK),
		(PMIC_STRUP_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ID),
		(&val),
		(PMIC_STRUP_DIG_ID_MASK),
		(PMIC_STRUP_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_REV0),
		(&val),
		(PMIC_STRUP_ANA_MINOR_REV_MASK),
		(PMIC_STRUP_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_REV0),
		(&val),
		(PMIC_STRUP_ANA_MAJOR_REV_MASK),
		(PMIC_STRUP_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_REV0),
		(&val),
		(PMIC_STRUP_DIG_MINOR_REV_MASK),
		(PMIC_STRUP_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_REV0),
		(&val),
		(PMIC_STRUP_DIG_MAJOR_REV_MASK),
		(PMIC_STRUP_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_DBI),
		(&val),
		(PMIC_STRUP_CBS_MASK),
		(PMIC_STRUP_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_strup_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_DBI),
		(&val),
		(PMIC_STRUP_BIX_MASK),
		(PMIC_STRUP_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_tm_out(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON0),
		(val),
		(PMIC_RG_TM_OUT_MASK),
		(PMIC_RG_TM_OUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_thrdet_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON0),
		(val),
		(PMIC_RG_THRDET_SEL_MASK),
		(PMIC_RG_THRDET_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_thr_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON0),
		(val),
		(PMIC_RG_STRUP_THR_SEL_MASK),
		(PMIC_RG_STRUP_THR_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_thr_tmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON0),
		(val),
		(PMIC_RG_THR_TMODE_MASK),
		(PMIC_RG_THR_TMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vref_bg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON0),
		(val),
		(PMIC_RG_VREF_BG_MASK),
		(PMIC_RG_VREF_BG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_ana_chip_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON1),
		(&val),
		(PMIC_RGS_ANA_CHIP_ID_MASK),
		(PMIC_RGS_ANA_CHIP_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pmu_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON1),
		(val),
		(PMIC_RG_PMU_RSV_MASK),
		(PMIC_RG_PMU_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rst_drvsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON1),
		(val),
		(PMIC_RG_RST_DRVSEL_MASK),
		(PMIC_RG_RST_DRVSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_en1_drvsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON1),
		(val),
		(PMIC_RG_EN1_DRVSEL_MASK),
		(PMIC_RG_EN1_DRVSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_en2_drvsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ANA_CON1),
		(val),
		(PMIC_RG_EN2_DRVSEL_MASK),
		(PMIC_RG_EN2_DRVSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vusb_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VUSB_PG_STATUS_MASK),
		(PMIC_RGS_VUSB_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vaux18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VAUX18_PG_STATUS_MASK),
		(PMIC_RGS_VAUX18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vaud18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VAUD18_PG_STATUS_MASK),
		(PMIC_RGS_VAUD18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vxo22_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VXO22_PG_STATUS_MASK),
		(PMIC_RGS_VXO22_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vemc_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VEMC_PG_STATUS_MASK),
		(PMIC_RGS_VEMC_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vio18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VIO18_PG_STATUS_MASK),
		(PMIC_RGS_VIO18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vufs_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VUFS_PG_STATUS_MASK),
		(PMIC_RGS_VUFS_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_md_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VSRAM_MD_PG_STATUS_MASK),
		(PMIC_RGS_VSRAM_MD_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_others_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VSRAM_OTHERS_PG_STATUS_MASK),
		(PMIC_RGS_VSRAM_OTHERS_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_proc1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VSRAM_PROC1_PG_STATUS_MASK),
		(PMIC_RGS_VSRAM_PROC1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_proc2_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VSRAM_PROC2_PG_STATUS_MASK),
		(PMIC_RGS_VSRAM_PROC2_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_va12_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VA12_PG_STATUS_MASK),
		(PMIC_RGS_VA12_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_va09_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VA09_PG_STATUS_MASK),
		(PMIC_RGS_VA09_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vm18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VM18_PG_STATUS_MASK),
		(PMIC_RGS_VM18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrfck_1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VRFCK_1_PG_STATUS_MASK),
		(PMIC_RGS_VRFCK_1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrfck_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON2),
		(&val),
		(PMIC_RGS_VRFCK_PG_STATUS_MASK),
		(PMIC_RGS_VRFCK_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vbbck_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VBBCK_PG_STATUS_MASK),
		(PMIC_RGS_VBBCK_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrf18_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VRF18_PG_STATUS_MASK),
		(PMIC_RGS_VRF18_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vs1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VS1_PG_STATUS_MASK),
		(PMIC_RGS_VS1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vmodem_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VMODEM_PG_STATUS_MASK),
		(PMIC_RGS_VMODEM_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vproc1_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VPROC1_PG_STATUS_MASK),
		(PMIC_RGS_VPROC1_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vproc2_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VPROC2_PG_STATUS_MASK),
		(PMIC_RGS_VPROC2_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcore_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VCORE_PG_STATUS_MASK),
		(PMIC_RGS_VCORE_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vpu_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VPU_PG_STATUS_MASK),
		(PMIC_RGS_VPU_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vgpu11_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VGPU11_PG_STATUS_MASK),
		(PMIC_RGS_VGPU11_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vgpu12_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VGPU12_PG_STATUS_MASK),
		(PMIC_RGS_VGPU12_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vs2_pg_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_ANA_CON3),
		(&val),
		(PMIC_RGS_VS2_PG_STATUS_MASK),
		(PMIC_RGS_VS2_PG_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_iref_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ELR_0),
		(val),
		(PMIC_RG_STRUP_IREF_TRIM_MASK),
		(PMIC_RG_STRUP_IREF_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_thr_loc_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_ELR_0),
		(val),
		(PMIC_RG_THR_LOC_SEL_MASK),
		(PMIC_RG_THR_LOC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_pseq_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ID),
		(&val),
		(PMIC_PSEQ_ANA_ID_MASK),
		(PMIC_PSEQ_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ID),
		(&val),
		(PMIC_PSEQ_DIG_ID_MASK),
		(PMIC_PSEQ_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_REV0),
		(&val),
		(PMIC_PSEQ_ANA_MINOR_REV_MASK),
		(PMIC_PSEQ_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_REV0),
		(&val),
		(PMIC_PSEQ_ANA_MAJOR_REV_MASK),
		(PMIC_PSEQ_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_REV0),
		(&val),
		(PMIC_PSEQ_DIG_MAJOR_REV_MASK),
		(PMIC_PSEQ_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_DBI),
		(&val),
		(PMIC_PSEQ_CBS_MASK),
		(PMIC_PSEQ_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_DBI),
		(&val),
		(PMIC_PSEQ_BIX_MASK),
		(PMIC_PSEQ_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pseq_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_DXI),
		(&val),
		(PMIC_PSEQ_FPI_MASK),
		(PMIC_PSEQ_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pwrhold(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL0),
		(val),
		(PMIC_RG_PWRHOLD_MASK),
		(PMIC_RG_PWRHOLD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_usbdl_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL0),
		(val),
		(PMIC_RG_USBDL_MODE_MASK),
		(PMIC_RG_USBDL_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_usbdl_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PPCCTL0),
		(&val),
		(PMIC_RG_USBDL_MODE_MASK),
		(PMIC_RG_USBDL_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_wdtrst_act(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL0),
		(val),
		(PMIC_RG_WDTRST_ACT_MASK),
		(PMIC_RG_WDTRST_ACT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_crst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL1),
		(val),
		(PMIC_RG_CRST_MASK),
		(PMIC_RG_CRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL1),
		(val),
		(PMIC_RG_WRST_MASK),
		(PMIC_RG_WRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_crst_intv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL1),
		(val),
		(PMIC_RG_CRST_INTV_MASK),
		(PMIC_RG_CRST_INTV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wrst_intv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL1),
		(val),
		(PMIC_RG_WRST_INTV_MASK),
		(PMIC_RG_WRST_INTV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_wdtrst_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCFG0),
		(val),
		(PMIC_RG_WDTRST_EN_MASK),
		(PMIC_RG_WDTRST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_wdtrst_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PPCCFG0),
		(&val),
		(PMIC_RG_WDTRST_EN_MASK),
		(PMIC_RG_WDTRST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_keypwr_vcore_opt(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCFG0),
		(val),
		(PMIC_RG_KEYPWR_VCORE_OPT_MASK),
		(PMIC_RG_KEYPWR_VCORE_OPT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rsv_swreg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON9),
		(val),
		(PMIC_RG_RSV_SWREG_MASK),
		(PMIC_RG_RSV_SWREG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_thr_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON11),
		(val),
		(PMIC_RG_STRUP_THR_CLR_MASK),
		(PMIC_RG_STRUP_THR_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_SEL_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_td(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_TD_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_EN_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_long_press_ext_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON12),
		(&val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_EN_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_chr_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_CHR_CTRL_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_CHR_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_pwrkey_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_PWRKEY_CTRL_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_PWRKEY_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_spar_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_SPAR_CTRL_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_SPAR_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_ext_rtca_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_RTCA_CTRL_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_EXT_RTCA_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smart_rst_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_SMART_RST_SDN_EN_MASK),
		(PMIC_RG_SMART_RST_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_smart_rst_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON12),
		(&val),
		(PMIC_RG_SMART_RST_SDN_EN_MASK),
		(PMIC_RG_SMART_RST_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_smart_rst_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_SMART_RST_MODE_MASK),
		(PMIC_RG_SMART_RST_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_smart_rst_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON12),
		(&val),
		(PMIC_RG_SMART_RST_MODE_MASK),
		(PMIC_RG_SMART_RST_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_uvlo_dec_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON12),
		(val),
		(PMIC_RG_UVLO_DEC_EN_MASK),
		(PMIC_RG_UVLO_DEC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_uvlo_dec_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON12),
		(&val),
		(PMIC_RG_UVLO_DEC_EN_MASK),
		(PMIC_RG_UVLO_DEC_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_pwrkey_count_reset(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON13),
		(val),
		(PMIC_RG_STRUP_PWRKEY_COUNT_RESET_MASK),
		(PMIC_RG_STRUP_PWRKEY_COUNT_RESET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_pup_pkey_release(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PWRKEY_PRESS_STS),
		(&val),
		(PMIC_PUP_PKEY_RELEASE_MASK),
		(PMIC_PUP_PKEY_RELEASE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pwrkey_long_press_count(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PWRKEY_PRESS_STS),
		(&val),
		(PMIC_PWRKEY_LONG_PRESS_COUNT_MASK),
		(PMIC_PWRKEY_LONG_PRESS_COUNT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_por_flag(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PORFLAG),
		(val),
		(PMIC_RG_POR_FLAG_MASK),
		(PMIC_RG_POR_FLAG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_usbdl(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON4),
		(&val),
		(PMIC_USBDL_MASK),
		(PMIC_USBDL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_just_smart_rst(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON4),
		(&val),
		(PMIC_JUST_SMART_RST_MASK),
		(PMIC_JUST_SMART_RST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_just_pwrkey_rst(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON4),
		(&val),
		(PMIC_JUST_PWRKEY_RST_MASK),
		(PMIC_JUST_PWRKEY_RST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_clr_just_smart_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON4),
		(val),
		(PMIC_RG_CLR_JUST_SMART_RST_MASK),
		(PMIC_RG_CLR_JUST_SMART_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_clr_just_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON4),
		(val),
		(PMIC_CLR_JUST_RST_MASK),
		(PMIC_CLR_JUST_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_ther_deb_rtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON1),
		(val),
		(PMIC_RG_STRUP_THER_DEB_RTD_MASK),
		(PMIC_RG_STRUP_THER_DEB_RTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_ther_deb_ftd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON2),
		(val),
		(PMIC_RG_STRUP_THER_DEB_FTD_MASK),
		(PMIC_RG_STRUP_THER_DEB_FTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_ext_pmic_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON5),
		(val),
		(PMIC_RG_STRUP_EXT_PMIC_EN_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_ext_pmic_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON5),
		(&val),
		(PMIC_RG_STRUP_EXT_PMIC_EN_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_ext_pmic_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON5),
		(val),
		(PMIC_RG_STRUP_EXT_PMIC_SEL_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_ext_pmic_pg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON5),
		(&val),
		(PMIC_RGS_EXT_PMIC_PG_MASK),
		(PMIC_RGS_EXT_PMIC_PG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_ext_pmic_en1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON5),
		(&val),
		(PMIC_DA_EXT_PMIC_EN1_MASK),
		(PMIC_DA_EXT_PMIC_EN1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_ext_pmic_en2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON5),
		(&val),
		(PMIC_DA_EXT_PMIC_EN2_MASK),
		(PMIC_DA_EXT_PMIC_EN2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ext_pmic_pg_debtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON5),
		(val),
		(PMIC_RG_EXT_PMIC_PG_DEBTD_MASK),
		(PMIC_RG_EXT_PMIC_PG_DEBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rtc_spar_deb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON19),
		(val),
		(PMIC_RG_RTC_SPAR_DEB_EN_MASK),
		(PMIC_RG_RTC_SPAR_DEB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rtc_spar_deb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON19),
		(&val),
		(PMIC_RG_RTC_SPAR_DEB_EN_MASK),
		(PMIC_RG_RTC_SPAR_DEB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_rtc_alarm_deb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON19),
		(val),
		(PMIC_RG_RTC_ALARM_DEB_EN_MASK),
		(PMIC_RG_RTC_ALARM_DEB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_rtc_alarm_deb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON19),
		(&val),
		(PMIC_RG_RTC_ALARM_DEB_EN_MASK),
		(PMIC_RG_RTC_ALARM_DEB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_ext_pmic_pg_h2l_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_EXT_PMIC_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_ext_pmic_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_EXT_PMIC_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vm18_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VM18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VM18_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vm18_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VM18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VM18_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vio18_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VIO18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VIO18_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vio18_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VIO18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VIO18_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vufs_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VUFS_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VUFS_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vufs_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VUFS_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VUFS_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vbbck_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VBBCK_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VBBCK_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vbbck_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VBBCK_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VBBCK_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vrfck_1_pg_h2l_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VRFCK_1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VRFCK_1_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vrfck_1_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VRFCK_1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VRFCK_1_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vs1_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VS1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VS1_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vs1_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VS1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VS1_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_va12_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VA12_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VA12_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_va12_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VA12_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VA12_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_va09_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VA09_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VA09_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_va09_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VA09_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VA09_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vs2_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VS2_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VS2_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vs2_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VS2_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VS2_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vmodem_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VMODEM_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VMODEM_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vmodem_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VMODEM_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VMODEM_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vpu_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VPU_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VPU_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vpu_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VPU_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VPU_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vgpu12_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VGPU12_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VGPU12_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vgpu12_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VGPU12_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VGPU12_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vgpu11_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VGPU11_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VGPU11_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vgpu11_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VGPU11_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VGPU11_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vcore_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VCORE_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VCORE_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vcore_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VCORE_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VCORE_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vaux18_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB0),
		(val),
		(PMIC_RG_STRUP_VAUX18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VAUX18_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vaux18_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB0),
		(&val),
		(PMIC_RG_STRUP_VAUX18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VAUX18_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vrf18_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VRF18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VRF18_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vrf18_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VRF18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VRF18_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vusb_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VUSB_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VUSB_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vusb_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VUSB_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VUSB_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vaud18_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VAUD18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VAUD18_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vaud18_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VAUD18_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VAUD18_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_proc1_pg_h2l_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_proc1_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vproc1_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VPROC1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VPROC1_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vproc1_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VPROC1_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VPROC1_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_proc2_pg_h2l_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_proc2_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vproc2_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VPROC2_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VPROC2_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vproc2_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VPROC2_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VPROC2_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_md_pg_h2l_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_MD_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_MD_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_md_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_MD_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_MD_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_others_pg_h2l_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_others_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vemc_pg_h2l_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGDEB1),
		(val),
		(PMIC_RG_STRUP_VEMC_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VEMC_PG_H2L_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vemc_pg_h2l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGDEB1),
		(&val),
		(PMIC_RG_STRUP_VEMC_PG_H2L_EN_MASK),
		(PMIC_RG_STRUP_VEMC_PG_H2L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vm18_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VM18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VM18_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vm18_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VM18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VM18_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vio18_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VIO18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VIO18_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vio18_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VIO18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VIO18_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vufs_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VUFS_PG_ENB_MASK),
		(PMIC_RG_STRUP_VUFS_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vufs_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VUFS_PG_ENB_MASK),
		(PMIC_RG_STRUP_VUFS_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vbbck_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VBBCK_PG_ENB_MASK),
		(PMIC_RG_STRUP_VBBCK_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vbbck_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VBBCK_PG_ENB_MASK),
		(PMIC_RG_STRUP_VBBCK_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vrfck_1_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VRFCK_1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VRFCK_1_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vrfck_1_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VRFCK_1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VRFCK_1_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vs1_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VS1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VS1_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vs1_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VS1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VS1_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_va12_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VA12_PG_ENB_MASK),
		(PMIC_RG_STRUP_VA12_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_va12_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VA12_PG_ENB_MASK),
		(PMIC_RG_STRUP_VA12_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_va09_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VA09_PG_ENB_MASK),
		(PMIC_RG_STRUP_VA09_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_va09_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VA09_PG_ENB_MASK),
		(PMIC_RG_STRUP_VA09_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vs2_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VS2_PG_ENB_MASK),
		(PMIC_RG_STRUP_VS2_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vs2_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VS2_PG_ENB_MASK),
		(PMIC_RG_STRUP_VS2_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vmodem_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VMODEM_PG_ENB_MASK),
		(PMIC_RG_STRUP_VMODEM_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vmodem_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VMODEM_PG_ENB_MASK),
		(PMIC_RG_STRUP_VMODEM_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vpu_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VPU_PG_ENB_MASK),
		(PMIC_RG_STRUP_VPU_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vpu_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VPU_PG_ENB_MASK),
		(PMIC_RG_STRUP_VPU_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vgpu12_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VGPU12_PG_ENB_MASK),
		(PMIC_RG_STRUP_VGPU12_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vgpu12_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VGPU12_PG_ENB_MASK),
		(PMIC_RG_STRUP_VGPU12_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vgpu11_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VGPU11_PG_ENB_MASK),
		(PMIC_RG_STRUP_VGPU11_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vgpu11_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VGPU11_PG_ENB_MASK),
		(PMIC_RG_STRUP_VGPU11_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vcore_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VCORE_PG_ENB_MASK),
		(PMIC_RG_STRUP_VCORE_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vcore_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VCORE_PG_ENB_MASK),
		(PMIC_RG_STRUP_VCORE_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vaux18_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VAUX18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VAUX18_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vaux18_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VAUX18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VAUX18_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vxo22_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB0),
		(val),
		(PMIC_RG_STRUP_VXO22_PG_ENB_MASK),
		(PMIC_RG_STRUP_VXO22_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vxo22_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB0),
		(&val),
		(PMIC_RG_STRUP_VXO22_PG_ENB_MASK),
		(PMIC_RG_STRUP_VXO22_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vrf18_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VRF18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VRF18_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vrf18_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VRF18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VRF18_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vusb_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VUSB_PG_ENB_MASK),
		(PMIC_RG_STRUP_VUSB_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vusb_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VUSB_PG_ENB_MASK),
		(PMIC_RG_STRUP_VUSB_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vaud18_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VAUD18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VAUD18_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vaud18_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VAUD18_PG_ENB_MASK),
		(PMIC_RG_STRUP_VAUD18_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_proc1_pg_enb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_proc1_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC1_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vproc1_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VPROC1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VPROC1_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vproc1_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VPROC1_PG_ENB_MASK),
		(PMIC_RG_STRUP_VPROC1_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_proc2_pg_enb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_proc2_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC2_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vproc2_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VPROC2_PG_ENB_MASK),
		(PMIC_RG_STRUP_VPROC2_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vproc2_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VPROC2_PG_ENB_MASK),
		(PMIC_RG_STRUP_VPROC2_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_md_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_MD_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_MD_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_md_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_MD_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_MD_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_others_pg_enb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_others_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_OTHERS_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vemc_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_PGENB1),
		(val),
		(PMIC_RG_STRUP_VEMC_PG_ENB_MASK),
		(PMIC_RG_STRUP_VEMC_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vemc_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_PGENB1),
		(&val),
		(PMIC_RG_STRUP_VEMC_PG_ENB_MASK),
		(PMIC_RG_STRUP_VEMC_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vm18_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VM18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VM18_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vm18_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VM18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VM18_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vio18_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VIO18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VIO18_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vio18_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VIO18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VIO18_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vufs_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VUFS_OC_ENB_MASK),
		(PMIC_RG_STRUP_VUFS_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vufs_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VUFS_OC_ENB_MASK),
		(PMIC_RG_STRUP_VUFS_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vbbck_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VBBCK_OC_ENB_MASK),
		(PMIC_RG_STRUP_VBBCK_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vbbck_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VBBCK_OC_ENB_MASK),
		(PMIC_RG_STRUP_VBBCK_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vrfck_1_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VRFCK_1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VRFCK_1_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vrfck_1_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VRFCK_1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VRFCK_1_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vs1_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VS1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VS1_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vs1_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VS1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VS1_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_va12_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VA12_OC_ENB_MASK),
		(PMIC_RG_STRUP_VA12_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_va12_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VA12_OC_ENB_MASK),
		(PMIC_RG_STRUP_VA12_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_va09_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VA09_OC_ENB_MASK),
		(PMIC_RG_STRUP_VA09_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_va09_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VA09_OC_ENB_MASK),
		(PMIC_RG_STRUP_VA09_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vs2_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VS2_OC_ENB_MASK),
		(PMIC_RG_STRUP_VS2_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vs2_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VS2_OC_ENB_MASK),
		(PMIC_RG_STRUP_VS2_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vmodem_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VMODEM_OC_ENB_MASK),
		(PMIC_RG_STRUP_VMODEM_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vmodem_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VMODEM_OC_ENB_MASK),
		(PMIC_RG_STRUP_VMODEM_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vpu_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VPU_OC_ENB_MASK),
		(PMIC_RG_STRUP_VPU_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vpu_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VPU_OC_ENB_MASK),
		(PMIC_RG_STRUP_VPU_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vgpu12_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VGPU12_OC_ENB_MASK),
		(PMIC_RG_STRUP_VGPU12_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vgpu12_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VGPU12_OC_ENB_MASK),
		(PMIC_RG_STRUP_VGPU12_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vgpu11_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VGPU11_OC_ENB_MASK),
		(PMIC_RG_STRUP_VGPU11_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vgpu11_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VGPU11_OC_ENB_MASK),
		(PMIC_RG_STRUP_VGPU11_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vcore_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VCORE_OC_ENB_MASK),
		(PMIC_RG_STRUP_VCORE_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vcore_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VCORE_OC_ENB_MASK),
		(PMIC_RG_STRUP_VCORE_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vaux18_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VAUX18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VAUX18_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vaux18_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VAUX18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VAUX18_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vxo22_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB0),
		(val),
		(PMIC_RG_STRUP_VXO22_OC_ENB_MASK),
		(PMIC_RG_STRUP_VXO22_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vxo22_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB0),
		(&val),
		(PMIC_RG_STRUP_VXO22_OC_ENB_MASK),
		(PMIC_RG_STRUP_VXO22_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vrf18_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VRF18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VRF18_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vrf18_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VRF18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VRF18_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vusb_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VUSB_OC_ENB_MASK),
		(PMIC_RG_STRUP_VUSB_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vusb_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VUSB_OC_ENB_MASK),
		(PMIC_RG_STRUP_VUSB_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vaud18_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VAUD18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VAUD18_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vaud18_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VAUD18_OC_ENB_MASK),
		(PMIC_RG_STRUP_VAUD18_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_proc1_oc_enb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_PROC1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC1_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_proc1_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_PROC1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC1_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vproc1_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VPROC1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VPROC1_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vproc1_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VPROC1_OC_ENB_MASK),
		(PMIC_RG_STRUP_VPROC1_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_proc2_oc_enb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_PROC2_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC2_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_proc2_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_PROC2_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_PROC2_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vproc2_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VPROC2_OC_ENB_MASK),
		(PMIC_RG_STRUP_VPROC2_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vproc2_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VPROC2_OC_ENB_MASK),
		(PMIC_RG_STRUP_VPROC2_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_md_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_MD_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_MD_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_md_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_MD_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_MD_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vsram_others_oc_enb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VSRAM_OTHERS_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_OTHERS_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vsram_others_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VSRAM_OTHERS_OC_ENB_MASK),
		(PMIC_RG_STRUP_VSRAM_OTHERS_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_vemc_oc_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_OCENB1),
		(val),
		(PMIC_RG_STRUP_VEMC_OC_ENB_MASK),
		(PMIC_RG_STRUP_VEMC_OC_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_vemc_oc_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_OCENB1),
		(&val),
		(PMIC_RG_STRUP_VEMC_OC_ENB_MASK),
		(PMIC_RG_STRUP_VEMC_OC_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pseq_force_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCTST0),
		(val),
		(PMIC_RG_PSEQ_FORCE_ON_MASK),
		(PMIC_RG_PSEQ_FORCE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_force_test_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCTST0),
		(val),
		(PMIC_RG_PSEQ_FORCE_TEST_EN_MASK),
		(PMIC_RG_PSEQ_FORCE_TEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pseq_force_test_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PPCTST0),
		(&val),
		(PMIC_RG_PSEQ_FORCE_TEST_EN_MASK),
		(PMIC_RG_PSEQ_FORCE_TEST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pseq_bypass_deb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCTST0),
		(val),
		(PMIC_RG_PSEQ_BYPASS_DEB_MASK),
		(PMIC_RG_PSEQ_BYPASS_DEB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_bypass_seq(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCTST0),
		(val),
		(PMIC_RG_PSEQ_BYPASS_SEQ_MASK),
		(PMIC_RG_PSEQ_BYPASS_SEQ_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_lpbwdt_acc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCTST0),
		(val),
		(PMIC_RG_PSEQ_LPBWDT_ACC_MASK),
		(PMIC_RG_PSEQ_LPBWDT_ACC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pseq_lpbwdt_acc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PPCTST0),
		(&val),
		(PMIC_RG_PSEQ_LPBWDT_ACC_MASK),
		(PMIC_RG_PSEQ_LPBWDT_ACC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pseq_force_all_doff(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCTST0),
		(val),
		(PMIC_RG_PSEQ_FORCE_ALL_DOFF_MASK),
		(PMIC_RG_PSEQ_FORCE_ALL_DOFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_pg_ck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL2),
		(val),
		(PMIC_RG_PSEQ_PG_CK_SEL_MASK),
		(PMIC_RG_PSEQ_PG_CK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_spar_xcpt_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL2),
		(val),
		(PMIC_RG_PSEQ_SPAR_XCPT_MASK_MASK),
		(PMIC_RG_PSEQ_SPAR_XCPT_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_rtca_xcpt_mask(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL2),
		(val),
		(PMIC_RG_PSEQ_RTCA_XCPT_MASK_MASK),
		(PMIC_RG_PSEQ_RTCA_XCPT_MASK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_thm_shdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PPCCTL2),
		(val),
		(PMIC_RG_THM_SHDN_EN_MASK),
		(PMIC_RG_THM_SHDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_thm_shdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PPCCTL2),
		(&val),
		(PMIC_RG_THM_SHDN_EN_MASK),
		(PMIC_RG_THM_SHDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_uvlo_u1u2_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_STRUP_UVLO_U1U2_SEL_MASK),
		(PMIC_RG_STRUP_UVLO_U1U2_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_uvlo_u1u2_sel_swctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_STRUP_UVLO_U1U2_SEL_SWCTRL_MASK),
		(PMIC_RG_STRUP_UVLO_U1U2_SEL_SWCTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ovlo_rdb_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_OVLO_RDB_TD_MASK),
		(PMIC_RG_OVLO_RDB_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ovlo_rdb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_OVLO_RDB_EN_MASK),
		(PMIC_RG_OVLO_RDB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ovlo_rdb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON10),
		(&val),
		(PMIC_RG_OVLO_RDB_EN_MASK),
		(PMIC_RG_OVLO_RDB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_thr_test(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_THR_TEST_MASK),
		(PMIC_RG_THR_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_envtem(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_STRUP_ENVTEM_MASK),
		(PMIC_RG_STRUP_ENVTEM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_envtem(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON10),
		(&val),
		(PMIC_RG_STRUP_ENVTEM_MASK),
		(PMIC_RG_STRUP_ENVTEM_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_envtem_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON10),
		(val),
		(PMIC_RG_STRUP_ENVTEM_CTRL_MASK),
		(PMIC_RG_STRUP_ENVTEM_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_envtem_ctrl(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON10),
		(&val),
		(PMIC_RG_STRUP_ENVTEM_CTRL_MASK),
		(PMIC_RG_STRUP_ENVTEM_CTRL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_dduvlo_deb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_DDUVLO_DEB_EN_MASK),
		(PMIC_DDUVLO_DEB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_ft_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_STRUP_FT_CTRL_MASK),
		(PMIC_RG_STRUP_FT_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_biasgen_force(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_BIASGEN_FORCE_MASK),
		(PMIC_RG_BIASGEN_FORCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_pwron(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_STRUP_PWRON_MASK),
		(PMIC_RG_STRUP_PWRON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_pwron_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_STRUP_PWRON_SEL_MASK),
		(PMIC_RG_STRUP_PWRON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_biasgen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_BIASGEN_MASK),
		(PMIC_RG_BIASGEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_biasgen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_BIASGEN_SEL_MASK),
		(PMIC_RG_BIASGEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo_pmu_cken(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_DCXO_PMU_CKEN_MASK),
		(PMIC_RG_DCXO_PMU_CKEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dcxo_pmu_cken_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_RG_DCXO_PMU_CKEN_SEL_MASK),
		(PMIC_RG_DCXO_PMU_CKEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_strup_dig_io_pg_force(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON3),
		(val),
		(PMIC_STRUP_DIG_IO_PG_FORCE_MASK),
		(PMIC_STRUP_DIG_IO_PG_FORCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_atst_pg_chk(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON6),
		(val),
		(PMIC_RG_ATST_PG_CHK_MASK),
		(PMIC_RG_ATST_PG_CHK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_pg_deb_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON6),
		(val),
		(PMIC_RG_STRUP_PG_DEB_MODE_MASK),
		(PMIC_RG_STRUP_PG_DEB_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_pg_deb_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_STRUP_CON6),
		(&val),
		(PMIC_RG_STRUP_PG_DEB_MODE_MASK),
		(PMIC_RG_STRUP_PG_DEB_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ovlo_fcmpl_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON6),
		(val),
		(PMIC_RG_OVLO_FCMPL_SW_SEL_MASK),
		(PMIC_RG_OVLO_FCMPL_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ovlo_fcmpl_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON6),
		(val),
		(PMIC_RG_OVLO_FCMPL_SW_MASK),
		(PMIC_RG_OVLO_FCMPL_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_uvlo_vsys_vth_sw_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON6),
		(val),
		(PMIC_RG_UVLO_VSYS_VTH_SW_SEL_MASK),
		(PMIC_RG_UVLO_VSYS_VTH_SW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_uvlo_vsys_vth_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_STRUP_CON6),
		(val),
		(PMIC_RG_UVLO_VSYS_VTH_SW_MASK),
		(PMIC_RG_UVLO_VSYS_VTH_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_cps_w_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSWKEY),
		(val),
		(PMIC_RG_CPS_W_KEY_MASK),
		(PMIC_RG_CPS_W_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_slot_intv_down(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSCFG0),
		(val),
		(PMIC_RG_SLOT_INTV_DOWN_MASK),
		(PMIC_RG_SLOT_INTV_DOWN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dseq_len(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSCFG0),
		(val),
		(PMIC_RG_DSEQ_LEN_MASK),
		(PMIC_RG_DSEQ_LEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vxo22_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA0),
		(val),
		(PMIC_RG_VXO22_DSA_MASK),
		(PMIC_RG_VXO22_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA0),
		(val),
		(PMIC_RG_VAUX18_DSA_MASK),
		(PMIC_RG_VAUX18_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA0),
		(val),
		(PMIC_RG_VCORE_DSA_MASK),
		(PMIC_RG_VCORE_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA1),
		(val),
		(PMIC_RG_VGPU11_DSA_MASK),
		(PMIC_RG_VGPU11_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA1),
		(val),
		(PMIC_RG_VGPU12_DSA_MASK),
		(PMIC_RG_VGPU12_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA1),
		(val),
		(PMIC_RG_VPU_DSA_MASK),
		(PMIC_RG_VPU_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ext_pmic_en2_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA2),
		(val),
		(PMIC_RG_EXT_PMIC_EN2_DSA_MASK),
		(PMIC_RG_EXT_PMIC_EN2_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ext_pmic_en2_dsa(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CPSDSA2),
		(&val),
		(PMIC_RG_EXT_PMIC_EN2_DSA_MASK),
		(PMIC_RG_EXT_PMIC_EN2_DSA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA2),
		(val),
		(PMIC_RG_VMODEM_DSA_MASK),
		(PMIC_RG_VMODEM_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA2),
		(val),
		(PMIC_RG_VS2_DSA_MASK),
		(PMIC_RG_VS2_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va09_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA3),
		(val),
		(PMIC_RG_VA09_DSA_MASK),
		(PMIC_RG_VA09_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va12_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA3),
		(val),
		(PMIC_RG_VA12_DSA_MASK),
		(PMIC_RG_VA12_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA3),
		(val),
		(PMIC_RG_VS1_DSA_MASK),
		(PMIC_RG_VS1_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA4),
		(val),
		(PMIC_RG_VRFCK_1_DSA_MASK),
		(PMIC_RG_VRFCK_1_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbbck_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA4),
		(val),
		(PMIC_RG_VBBCK_DSA_MASK),
		(PMIC_RG_VBBCK_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vufs_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA4),
		(val),
		(PMIC_RG_VUFS_DSA_MASK),
		(PMIC_RG_VUFS_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio18_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA5),
		(val),
		(PMIC_RG_VIO18_DSA_MASK),
		(PMIC_RG_VIO18_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vm18_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA5),
		(val),
		(PMIC_RG_VM18_DSA_MASK),
		(PMIC_RG_VM18_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ext_pmic_en1_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA5),
		(val),
		(PMIC_RG_EXT_PMIC_EN1_DSA_MASK),
		(PMIC_RG_EXT_PMIC_EN1_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ext_pmic_en1_dsa(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CPSDSA5),
		(&val),
		(PMIC_RG_EXT_PMIC_EN1_DSA_MASK),
		(PMIC_RG_EXT_PMIC_EN1_DSA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA6),
		(val),
		(PMIC_RG_VEMC_DSA_MASK),
		(PMIC_RG_VEMC_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_others_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA6),
		(val),
		(PMIC_RG_VSRAM_OTHERS_DSA_MASK),
		(PMIC_RG_VSRAM_OTHERS_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_md_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA6),
		(val),
		(PMIC_RG_VSRAM_MD_DSA_MASK),
		(PMIC_RG_VSRAM_MD_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA7),
		(val),
		(PMIC_RG_VPROC2_DSA_MASK),
		(PMIC_RG_VPROC2_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA7),
		(val),
		(PMIC_RG_VSRAM_PROC2_DSA_MASK),
		(PMIC_RG_VSRAM_PROC2_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA7),
		(val),
		(PMIC_RG_VPROC1_DSA_MASK),
		(PMIC_RG_VPROC1_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA8),
		(val),
		(PMIC_RG_VSRAM_PROC1_DSA_MASK),
		(PMIC_RG_VSRAM_PROC1_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaud18_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA8),
		(val),
		(PMIC_RG_VAUD18_DSA_MASK),
		(PMIC_RG_VAUD18_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vusb_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA8),
		(val),
		(PMIC_RG_VUSB_DSA_MASK),
		(PMIC_RG_VUSB_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_dsa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSDSA9),
		(val),
		(PMIC_RG_VRF18_DSA_MASK),
		(PMIC_RG_VRF18_DSA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bwdt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_BWDT_EN_MASK),
		(PMIC_RG_BWDT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bwdt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR0),
		(&val),
		(PMIC_RG_BWDT_EN_MASK),
		(PMIC_RG_BWDT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_bwdt_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_BWDT_TSEL_MASK),
		(PMIC_RG_BWDT_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bwdt_csel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_BWDT_CSEL_MASK),
		(PMIC_RG_BWDT_CSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bwdt_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_BWDT_TD_MASK),
		(PMIC_RG_BWDT_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bwdt_chrtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_BWDT_CHRTD_MASK),
		(PMIC_RG_BWDT_CHRTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bwdt_ddlo_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_BWDT_DDLO_TD_MASK),
		(PMIC_RG_BWDT_DDLO_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_slot_intv_up(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_SLOT_INTV_UP_MASK),
		(PMIC_RG_SLOT_INTV_UP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_seq_len(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_SEQ_LEN_MASK),
		(PMIC_RG_SEQ_LEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_elr_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR0),
		(val),
		(PMIC_RG_PSEQ_ELR_RSV0_MASK),
		(PMIC_RG_PSEQ_ELR_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pspg_shdn_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_PSPG_SHDN_ENB_MASK),
		(PMIC_RG_PSPG_SHDN_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pspg_shdn_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_PSPG_SHDN_ENB_MASK),
		(PMIC_RG_PSPG_SHDN_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pseq_f32k_force(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_PSEQ_F32K_FORCE_MASK),
		(PMIC_RG_PSEQ_F32K_FORCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pseq_1ms_tk_ext(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_PSEQ_1MS_TK_EXT_MASK),
		(PMIC_RG_PSEQ_1MS_TK_EXT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smps_ivgen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_SMPS_IVGEN_SEL_MASK),
		(PMIC_RG_SMPS_IVGEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_strup_long_press_reset_extend(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_STRUP_LONG_PRESS_RESET_EXTEND_MASK),
		(PMIC_RG_STRUP_LONG_PRESS_RESET_EXTEND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_cps_s0ext_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_CPS_S0EXT_ENB_MASK),
		(PMIC_RG_CPS_S0EXT_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_cps_s0ext_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_CPS_S0EXT_ENB_MASK),
		(PMIC_RG_CPS_S0EXT_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_cps_s0ext_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_CPS_S0EXT_TD_MASK),
		(PMIC_RG_CPS_S0EXT_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_sdn_dly_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_SDN_DLY_ENB_MASK),
		(PMIC_RG_SDN_DLY_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_sdn_dly_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_SDN_DLY_ENB_MASK),
		(PMIC_RG_SDN_DLY_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_chrdet_deb_td(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_CHRDET_DEB_TD_MASK),
		(PMIC_RG_CHRDET_DEB_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pwrkey_event_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_PWRKEY_EVENT_MODE_MASK),
		(PMIC_RG_PWRKEY_EVENT_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pwrkey_event_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_PWRKEY_EVENT_MODE_MASK),
		(PMIC_RG_PWRKEY_EVENT_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_pwrkey_event_mode_hw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_PWRKEY_EVENT_MODE_HW_MASK),
		(PMIC_RG_PWRKEY_EVENT_MODE_HW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_pwrkey_event_mode_hw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_PWRKEY_EVENT_MODE_HW_MASK),
		(PMIC_RG_PWRKEY_EVENT_MODE_HW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_pg_stb_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_LDO_PG_STB_MODE_MASK),
		(PMIC_RG_LDO_PG_STB_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_pg_stb_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_LDO_PG_STB_MODE_MASK),
		(PMIC_RG_LDO_PG_STB_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_strup_ext_pmic_pg_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR1),
		(val),
		(PMIC_RG_STRUP_EXT_PMIC_PG_ENB_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_PG_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_strup_ext_pmic_pg_enb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PSEQ_ELR1),
		(&val),
		(PMIC_RG_STRUP_EXT_PMIC_PG_ENB_MASK),
		(PMIC_RG_STRUP_EXT_PMIC_PG_ENB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_psc_elr_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR2),
		(val),
		(PMIC_RG_PSC_ELR_RSV0_MASK),
		(PMIC_RG_PSC_ELR_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_psc_elr_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PSEQ_ELR3),
		(val),
		(PMIC_RG_PSC_ELR_RSV1_MASK),
		(PMIC_RG_PSC_ELR_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vxo22_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR0),
		(val),
		(PMIC_RG_VXO22_USA_MASK),
		(PMIC_RG_VXO22_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR0),
		(val),
		(PMIC_RG_VAUX18_USA_MASK),
		(PMIC_RG_VAUX18_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR0),
		(val),
		(PMIC_RG_VCORE_USA_MASK),
		(PMIC_RG_VCORE_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR1),
		(val),
		(PMIC_RG_VGPU11_USA_MASK),
		(PMIC_RG_VGPU11_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR1),
		(val),
		(PMIC_RG_VGPU12_USA_MASK),
		(PMIC_RG_VGPU12_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR1),
		(val),
		(PMIC_RG_VPU_USA_MASK),
		(PMIC_RG_VPU_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ext_pmic_en2_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR2),
		(val),
		(PMIC_RG_EXT_PMIC_EN2_USA_MASK),
		(PMIC_RG_EXT_PMIC_EN2_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ext_pmic_en2_usa(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CPSUSA_ELR2),
		(&val),
		(PMIC_RG_EXT_PMIC_EN2_USA_MASK),
		(PMIC_RG_EXT_PMIC_EN2_USA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR2),
		(val),
		(PMIC_RG_VMODEM_USA_MASK),
		(PMIC_RG_VMODEM_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR2),
		(val),
		(PMIC_RG_VS2_USA_MASK),
		(PMIC_RG_VS2_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va09_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR3),
		(val),
		(PMIC_RG_VA09_USA_MASK),
		(PMIC_RG_VA09_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va12_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR3),
		(val),
		(PMIC_RG_VA12_USA_MASK),
		(PMIC_RG_VA12_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR3),
		(val),
		(PMIC_RG_VS1_USA_MASK),
		(PMIC_RG_VS1_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR4),
		(val),
		(PMIC_RG_VRFCK_1_USA_MASK),
		(PMIC_RG_VRFCK_1_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbbck_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR4),
		(val),
		(PMIC_RG_VBBCK_USA_MASK),
		(PMIC_RG_VBBCK_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vufs_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR4),
		(val),
		(PMIC_RG_VUFS_USA_MASK),
		(PMIC_RG_VUFS_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio18_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR5),
		(val),
		(PMIC_RG_VIO18_USA_MASK),
		(PMIC_RG_VIO18_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vm18_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR5),
		(val),
		(PMIC_RG_VM18_USA_MASK),
		(PMIC_RG_VM18_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ext_pmic_en1_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR5),
		(val),
		(PMIC_RG_EXT_PMIC_EN1_USA_MASK),
		(PMIC_RG_EXT_PMIC_EN1_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ext_pmic_en1_usa(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CPSUSA_ELR5),
		(&val),
		(PMIC_RG_EXT_PMIC_EN1_USA_MASK),
		(PMIC_RG_EXT_PMIC_EN1_USA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR6),
		(val),
		(PMIC_RG_VEMC_USA_MASK),
		(PMIC_RG_VEMC_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_others_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR6),
		(val),
		(PMIC_RG_VSRAM_OTHERS_USA_MASK),
		(PMIC_RG_VSRAM_OTHERS_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_md_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR6),
		(val),
		(PMIC_RG_VSRAM_MD_USA_MASK),
		(PMIC_RG_VSRAM_MD_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR7),
		(val),
		(PMIC_RG_VPROC2_USA_MASK),
		(PMIC_RG_VPROC2_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR7),
		(val),
		(PMIC_RG_VSRAM_PROC2_USA_MASK),
		(PMIC_RG_VSRAM_PROC2_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR7),
		(val),
		(PMIC_RG_VPROC1_USA_MASK),
		(PMIC_RG_VPROC1_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR8),
		(val),
		(PMIC_RG_VSRAM_PROC1_USA_MASK),
		(PMIC_RG_VSRAM_PROC1_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaud18_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR8),
		(val),
		(PMIC_RG_VAUD18_USA_MASK),
		(PMIC_RG_VAUD18_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vusb_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR8),
		(val),
		(PMIC_RG_VUSB_USA_MASK),
		(PMIC_RG_VUSB_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_usa(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CPSUSA_ELR9),
		(val),
		(PMIC_RG_VRF18_USA_MASK),
		(PMIC_RG_VRF18_USA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_chrdet_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_ID),
		(&val),
		(PMIC_CHRDET_ANA_ID_MASK),
		(PMIC_CHRDET_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_ID),
		(&val),
		(PMIC_CHRDET_DIG_ID_MASK),
		(PMIC_CHRDET_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_REV0),
		(&val),
		(PMIC_CHRDET_ANA_MINOR_REV_MASK),
		(PMIC_CHRDET_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_REV0),
		(&val),
		(PMIC_CHRDET_ANA_MAJOR_REV_MASK),
		(PMIC_CHRDET_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_REV0),
		(&val),
		(PMIC_CHRDET_DIG_MINOR_REV_MASK),
		(PMIC_CHRDET_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_REV0),
		(&val),
		(PMIC_CHRDET_DIG_MAJOR_REV_MASK),
		(PMIC_CHRDET_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_DBI),
		(&val),
		(PMIC_CHRDET_CBS_MASK),
		(PMIC_CHRDET_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_DBI),
		(&val),
		(PMIC_CHRDET_BIX_MASK),
		(PMIC_CHRDET_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_chrdet_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHRDET_DXI),
		(&val),
		(PMIC_CHRDET_FPI_MASK),
		(PMIC_CHRDET_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_chrdet(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHR_CON0),
		(&val),
		(PMIC_RGS_CHRDET_MASK),
		(PMIC_RGS_CHRDET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_chrdetb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHR_CON0),
		(&val),
		(PMIC_AD_CHRDETB_MASK),
		(PMIC_AD_CHRDETB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_chrdet_deb_bypass(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CHR_CON1),
		(val),
		(PMIC_RG_CHRDET_DEB_BYPASS_MASK),
		(PMIC_RG_CHRDET_DEB_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_envtem_d(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CHR_CON2),
		(val),
		(PMIC_RG_ENVTEM_D_MASK),
		(PMIC_RG_ENVTEM_D_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_envtem_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_CHR_CON2),
		(val),
		(PMIC_RG_ENVTEM_EN_MASK),
		(PMIC_RG_ENVTEM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_envtem_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_CHR_CON2),
		(&val),
		(PMIC_RG_ENVTEM_EN_MASK),
		(PMIC_RG_ENVTEM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_da_qi_bgr_ext_buf_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_DA0),
		(val),
		(PMIC_DA_QI_BGR_EXT_BUF_EN_MASK),
		(PMIC_DA_QI_BGR_EXT_BUF_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_test_rstb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON0),
		(val),
		(PMIC_RG_BGR_TEST_RSTB_MASK),
		(PMIC_RG_BGR_TEST_RSTB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_test_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON0),
		(val),
		(PMIC_RG_BGR_TEST_EN_MASK),
		(PMIC_RG_BGR_TEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bgr_test_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PCHR_VREF_ANA_CON0),
		(&val),
		(PMIC_RG_BGR_TEST_EN_MASK),
		(PMIC_RG_BGR_TEST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_bgr_unchop(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON1),
		(val),
		(PMIC_RG_BGR_UNCHOP_MASK),
		(PMIC_RG_BGR_UNCHOP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_unchop_ph(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON1),
		(val),
		(PMIC_RG_BGR_UNCHOP_PH_MASK),
		(PMIC_RG_BGR_UNCHOP_PH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_uvlo_vthl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON1),
		(val),
		(PMIC_RG_UVLO_VTHL_MASK),
		(PMIC_RG_UVLO_VTHL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_lbat_int_vth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON2),
		(val),
		(PMIC_RG_LBAT_INT_VTH_MASK),
		(PMIC_RG_LBAT_INT_VTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ovlo_vth_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON3),
		(val),
		(PMIC_RG_OVLO_VTH_SEL_MASK),
		(PMIC_RG_OVLO_VTH_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pchr_rv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ANA_CON4),
		(val),
		(PMIC_RG_PCHR_RV_MASK),
		(PMIC_RG_PCHR_RV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_pcas_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_PCAS_EN_MASK),
		(PMIC_RG_FGD_BGR_PCAS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_fgd_bgr_pcas_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(&val),
		(PMIC_RG_FGD_BGR_PCAS_EN_MASK),
		(PMIC_RG_FGD_BGR_PCAS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_ncas_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_NCAS_EN_MASK),
		(PMIC_RG_FGD_BGR_NCAS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_fgd_bgr_ncas_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(&val),
		(PMIC_RG_FGD_BGR_NCAS_EN_MASK),
		(PMIC_RG_FGD_BGR_NCAS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_EN_MASK),
		(PMIC_RG_FGD_BGR_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_fgd_bgr_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(&val),
		(PMIC_RG_FGD_BGR_EN_MASK),
		(PMIC_RG_FGD_BGR_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_bias_select(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_BIAS_SELECT_MASK),
		(PMIC_RG_FGD_BGR_BIAS_SELECT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_size_select(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_SIZE_SELECT_MASK),
		(PMIC_RG_FGD_BGR_SIZE_SELECT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_RSV_MASK),
		(PMIC_RG_FGD_BGR_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgd_bgr_current_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGD_BGR_ANA_CON0),
		(val),
		(PMIC_RG_FGD_BGR_CURRENT_TRIM_MASK),
		(PMIC_RG_FGD_BGR_CURRENT_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ELR_0),
		(val),
		(PMIC_RG_BGR_TRIM_MASK),
		(PMIC_RG_BGR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bgr_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ELR_0),
		(val),
		(PMIC_RG_BGR_TRIM_EN_MASK),
		(PMIC_RG_BGR_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bgr_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PCHR_VREF_ELR_0),
		(&val),
		(PMIC_RG_BGR_TRIM_EN_MASK),
		(PMIC_RG_BGR_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_bgr_rsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ELR_0),
		(val),
		(PMIC_RG_BGR_RSEL_MASK),
		(PMIC_RG_BGR_RSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ovlo_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_PCHR_VREF_ELR_0),
		(val),
		(PMIC_RG_OVLO_EN_MASK),
		(PMIC_RG_OVLO_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ovlo_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_PCHR_VREF_ELR_0),
		(&val),
		(PMIC_RG_OVLO_EN_MASK),
		(PMIC_RG_OVLO_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_baton_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_BATON_32K_CK_PDN_MASK),
		(PMIC_RG_BATON_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_ft_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_FGADC_FT_CK_PDN_MASK),
		(PMIC_RG_FGADC_FT_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_dig_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_FGADC_DIG_CK_PDN_MASK),
		(PMIC_RG_FGADC_DIG_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_ana_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_FGADC_ANA_CK_PDN_MASK),
		(PMIC_RG_FGADC_ANA_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_g_bif_1m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_G_BIF_1M_CK_PDN_MASK),
		(PMIC_RG_G_BIF_1M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_x1_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_BIF_X1_CK_PDN_MASK),
		(PMIC_RG_BIF_X1_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_x4_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_BIF_X4_CK_PDN_MASK),
		(PMIC_RG_BIF_X4_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_x104_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_BIF_X104_CK_PDN_MASK),
		(PMIC_RG_BIF_X104_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bm_intrp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_BM_INTRP_CK_PDN_MASK),
		(PMIC_RG_BM_INTRP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bm_top_ckpdn_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_BM_TOP_CKPDN_CON0_RSV_MASK),
		(PMIC_RG_BM_TOP_CKPDN_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_ana_ck_cksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_FGADC_ANA_CK_CKSEL_MASK),
		(PMIC_RG_FGADC_ANA_CK_CKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_x4_ck_divsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKDIVSEL_CON0),
		(val),
		(PMIC_RG_BIF_X4_CK_DIVSEL_MASK),
		(PMIC_RG_BIF_X4_CK_DIVSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bm_top_ckdivsel_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKDIVSEL_CON0),
		(val),
		(PMIC_BM_TOP_CKDIVSEL_CON0_RSV_MASK),
		(PMIC_BM_TOP_CKDIVSEL_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_x4_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_BIF_X4_CK_PDN_HWEN_MASK),
		(PMIC_RG_BIF_X4_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_x104_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_BIF_X104_CK_PDN_HWEN_MASK),
		(PMIC_RG_BIF_X104_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bm_top_ckhwen_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKHWEN_CON0),
		(val),
		(PMIC_BM_TOP_CKHWEN_CON0_RSV_MASK),
		(PMIC_BM_TOP_CKHWEN_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fg_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_FG_CK_TSTSEL_MASK),
		(PMIC_RG_FG_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_ana_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_FGADC_ANA_CK_TSTSEL_MASK),
		(PMIC_RG_FGADC_ANA_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fg_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_FG_CK_TST_DIS_MASK),
		(PMIC_RG_FG_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_FGADC_SWRST_MASK),
		(PMIC_RG_FGADC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BATON_SWRST_MASK),
		(PMIC_RG_BATON_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bif_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BIF_SWRST_MASK),
		(PMIC_RG_BIF_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_batdeb_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BATON_BATDEB_SWRST_MASK),
		(PMIC_RG_BATON_BATDEB_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_fgadc_ana_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_FGADC_ANA_SWRST_MASK),
		(PMIC_RG_BANK_FGADC_ANA_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_fgadc0_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_FGADC0_SWRST_MASK),
		(PMIC_RG_BANK_FGADC0_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_fgadc1_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_FGADC1_SWRST_MASK),
		(PMIC_RG_BANK_FGADC1_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_baton_ana_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_BATON_ANA_SWRST_MASK),
		(PMIC_RG_BANK_BATON_ANA_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_baton_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_BATON_SWRST_MASK),
		(PMIC_RG_BANK_BATON_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bank_bif_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON0),
		(val),
		(PMIC_RG_BANK_BIF_SWRST_MASK),
		(PMIC_RG_BANK_BIF_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgadc_rst_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON1),
		(val),
		(PMIC_RG_FGADC_RST_SRC_SEL_MASK),
		(PMIC_RG_FGADC_RST_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bm_top_rst_con1_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RST_CON1),
		(val),
		(PMIC_BM_TOP_RST_CON1_RSV_MASK),
		(PMIC_BM_TOP_RST_CON1_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_bat_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_BAT_H_MASK),
		(PMIC_RG_INT_EN_FG_BAT_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_bat_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_BAT_H_MASK),
		(PMIC_RG_INT_EN_FG_BAT_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_bat_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_BAT_L_MASK),
		(PMIC_RG_INT_EN_FG_BAT_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_bat_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_BAT_L_MASK),
		(PMIC_RG_INT_EN_FG_BAT_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_cur_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_CUR_H_MASK),
		(PMIC_RG_INT_EN_FG_CUR_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_cur_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_CUR_H_MASK),
		(PMIC_RG_INT_EN_FG_CUR_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_cur_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_CUR_L_MASK),
		(PMIC_RG_INT_EN_FG_CUR_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_cur_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_CUR_L_MASK),
		(PMIC_RG_INT_EN_FG_CUR_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_zcv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_ZCV_MASK),
		(PMIC_RG_INT_EN_FG_ZCV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_zcv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_ZCV_MASK),
		(PMIC_RG_INT_EN_FG_ZCV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_n_charge_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_N_CHARGE_L_MASK),
		(PMIC_RG_INT_EN_FG_N_CHARGE_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_n_charge_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_N_CHARGE_L_MASK),
		(PMIC_RG_INT_EN_FG_N_CHARGE_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_iavg_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_IAVG_H_MASK),
		(PMIC_RG_INT_EN_FG_IAVG_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_iavg_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_IAVG_H_MASK),
		(PMIC_RG_INT_EN_FG_IAVG_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_iavg_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_IAVG_L_MASK),
		(PMIC_RG_INT_EN_FG_IAVG_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_iavg_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_IAVG_L_MASK),
		(PMIC_RG_INT_EN_FG_IAVG_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_discharge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_DISCHARGE_MASK),
		(PMIC_RG_INT_EN_FG_DISCHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_DISCHARGE_MASK),
		(PMIC_RG_INT_EN_FG_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_fg_charge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_FG_CHARGE_MASK),
		(PMIC_RG_INT_EN_FG_CHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_fg_charge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_FG_CHARGE_MASK),
		(PMIC_RG_INT_EN_FG_CHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_bm_int_en_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON0),
		(val),
		(PMIC_RG_BM_INT_EN_CON0_RSV_MASK),
		(PMIC_RG_BM_INT_EN_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bm_int_en_con0_rsv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON0),
		(&val),
		(PMIC_RG_BM_INT_EN_CON0_RSV_MASK),
		(PMIC_RG_BM_INT_EN_CON0_RSV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_baton_lv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_BATON_LV_MASK),
		(PMIC_RG_INT_EN_BATON_LV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_baton_lv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_BATON_LV_MASK),
		(PMIC_RG_INT_EN_BATON_LV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_baton_bat_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_BATON_BAT_IN_MASK),
		(PMIC_RG_INT_EN_BATON_BAT_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_baton_bat_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_BATON_BAT_IN_MASK),
		(PMIC_RG_INT_EN_BATON_BAT_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_baton_bat_out(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_BATON_BAT_OUT_MASK),
		(PMIC_RG_INT_EN_BATON_BAT_OUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_baton_bat_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_BATON_BAT_OUT_MASK),
		(PMIC_RG_INT_EN_BATON_BAT_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_bif(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_BIF_MASK),
		(PMIC_RG_INT_EN_BIF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bif(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_BIF_MASK),
		(PMIC_RG_INT_EN_BIF_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_bat_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_BAT_H_MASK),
		(PMIC_RG_INT_MASK_FG_BAT_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_bat_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_BAT_L_MASK),
		(PMIC_RG_INT_MASK_FG_BAT_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_cur_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_CUR_H_MASK),
		(PMIC_RG_INT_MASK_FG_CUR_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_cur_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_CUR_L_MASK),
		(PMIC_RG_INT_MASK_FG_CUR_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_zcv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_ZCV_MASK),
		(PMIC_RG_INT_MASK_FG_ZCV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_n_charge_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_N_CHARGE_L_MASK),
		(PMIC_RG_INT_MASK_FG_N_CHARGE_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_iavg_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_IAVG_H_MASK),
		(PMIC_RG_INT_MASK_FG_IAVG_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_iavg_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_IAVG_L_MASK),
		(PMIC_RG_INT_MASK_FG_IAVG_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_discharge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_DISCHARGE_MASK),
		(PMIC_RG_INT_MASK_FG_DISCHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_fg_charge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_FG_CHARGE_MASK),
		(PMIC_RG_INT_MASK_FG_CHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bm_int_mask_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_BM_INT_MASK_CON0_RSV_MASK),
		(PMIC_RG_BM_INT_MASK_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_baton_lv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_BATON_LV_MASK),
		(PMIC_RG_INT_MASK_BATON_LV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_baton_bat_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_BATON_BAT_IN_MASK),
		(PMIC_RG_INT_MASK_BATON_BAT_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_baton_bat_out(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_BATON_BAT_OUT_MASK),
		(PMIC_RG_INT_MASK_BATON_BAT_OUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bif(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_BIF_MASK),
		(PMIC_RG_INT_MASK_BIF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_bat_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_BAT_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_BAT_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_bat_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_BAT_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_BAT_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_cur_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_CUR_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_CUR_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_cur_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_CUR_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_CUR_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_zcv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_ZCV_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_ZCV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_n_charge_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_N_CHARGE_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_N_CHARGE_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_iavg_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_IAVG_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_IAVG_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_iavg_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_IAVG_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_IAVG_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_DISCHARGE_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_fg_charge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_FG_CHARGE_MASK),
		(PMIC_RG_INT_RAW_STATUS_FG_CHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_bm_int_raw_status_rsv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_BM_INT_RAW_STATUS_RSV_MASK),
		(PMIC_RG_BM_INT_RAW_STATUS_RSV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_baton_lv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BATON_LV_MASK),
		(PMIC_RG_INT_RAW_STATUS_BATON_LV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_baton_bat_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BATON_BAT_IN_MASK),
		(PMIC_RG_INT_RAW_STATUS_BATON_BAT_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_baton_bat_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BATON_BAT_OUT_MASK),
		(PMIC_RG_INT_RAW_STATUS_BATON_BAT_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bif(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BM_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BIF_MASK),
		(PMIC_RG_INT_RAW_STATUS_BIF_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_polarity(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_INT_MISC_CON),
		(val),
		(PMIC_POLARITY_MASK),
		(PMIC_POLARITY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bm_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_DBG_CON),
		(val),
		(PMIC_RG_BM_MON_FLAG_SEL_MASK),
		(PMIC_RG_BM_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bm_mon_grp_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_DBG_CON),
		(val),
		(PMIC_RG_BM_MON_GRP_SEL_MASK),
		(PMIC_RG_BM_MON_GRP_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bm_top_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_TOP_RSV0),
		(val),
		(PMIC_RG_BM_TOP_RSV0_MASK),
		(PMIC_RG_BM_TOP_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bm_fgadc_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_WKEY0),
		(val),
		(PMIC_BM_FGADC_KEY_MASK),
		(PMIC_BM_FGADC_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bm_baton_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_WKEY1),
		(val),
		(PMIC_BM_BATON_KEY_MASK),
		(PMIC_BM_BATON_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bm_bif_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BM_WKEY2),
		(val),
		(PMIC_BM_BIF_KEY_MASK),
		(PMIC_BM_BIF_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fganalogtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_CON0),
		(val),
		(PMIC_RG_FGANALOGTEST_MASK),
		(PMIC_RG_FGANALOGTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fgintmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_CON0),
		(val),
		(PMIC_RG_FGINTMODE_MASK),
		(PMIC_RG_FGINTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_spare(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_CON0),
		(val),
		(PMIC_RG_SPARE_MASK),
		(PMIC_RG_SPARE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_chop_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_CON0),
		(val),
		(PMIC_RG_CHOP_EN_MASK),
		(PMIC_RG_CHOP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_chop_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_CON0),
		(&val),
		(PMIC_RG_CHOP_EN_MASK),
		(PMIC_RG_CHOP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_rng_bit_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_RNG_BIT_MODE_MASK),
		(PMIC_FG_RNG_BIT_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_rng_bit_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_RNG_BIT_SW_MASK),
		(PMIC_FG_RNG_BIT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_rng_en_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_RNG_EN_MODE_MASK),
		(PMIC_FG_RNG_EN_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_rng_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_RNG_EN_SW_MASK),
		(PMIC_FG_RNG_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_da_fg_rng_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(&val),
		(PMIC_DA_FG_RNG_EN_MASK),
		(PMIC_DA_FG_RNG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_fg_rng_bit(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(&val),
		(PMIC_DA_FG_RNG_BIT_MASK),
		(PMIC_DA_FG_RNG_BIT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_fgcal_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(&val),
		(PMIC_DA_FGCAL_EN_MASK),
		(PMIC_DA_FGCAL_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_fgadc_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(&val),
		(PMIC_DA_FGADC_EN_MASK),
		(PMIC_DA_FGADC_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_dwa_t0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_DWA_T0_MASK),
		(PMIC_FG_DWA_T0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_dwa_t1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_DWA_T1_MASK),
		(PMIC_FG_DWA_T1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_dwa_rst_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_DWA_RST_MODE_MASK),
		(PMIC_FG_DWA_RST_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_dwa_rst_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(val),
		(PMIC_FG_DWA_RST_SW_MASK),
		(PMIC_FG_DWA_RST_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_da_dwa_rst(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(&val),
		(PMIC_DA_DWA_RST_MASK),
		(PMIC_DA_DWA_RST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_fg_rst(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ANA_TEST_CON0),
		(&val),
		(PMIC_DA_FG_RST_MASK),
		(PMIC_DA_FG_RST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_fgadc_gainerr_cal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_ELR0),
		(val),
		(PMIC_RG_FGADC_GAINERR_CAL_MASK),
		(PMIC_RG_FGADC_GAINERR_CAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fg_offset_swap(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ANA_ELR0),
		(val),
		(PMIC_RG_FG_OFFSET_SWAP_MASK),
		(PMIC_RG_FG_OFFSET_SWAP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_ON_MASK),
		(PMIC_FG_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_cal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_CAL_MASK),
		(PMIC_FG_CAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_autocalrate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_AUTOCALRATE_MASK),
		(PMIC_FG_AUTOCALRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_slp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_SON_SLP_EN_MASK),
		(PMIC_FG_SON_SLP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_soff_slp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_SOFF_SLP_EN_MASK),
		(PMIC_FG_SOFF_SLP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_zcv_det_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_ZCV_DET_EN_MASK),
		(PMIC_FG_ZCV_DET_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_auxadc_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_AUXADC_R_MASK),
		(PMIC_FG_AUXADC_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_iavg_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON0),
		(val),
		(PMIC_FG_IAVG_MODE_MASK),
		(PMIC_FG_IAVG_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_sw_read_pre(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SW_READ_PRE_MASK),
		(PMIC_FG_SW_READ_PRE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_sw_rstclr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SW_RSTCLR_MASK),
		(PMIC_FG_SW_RSTCLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_sw_cr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SW_CR_MASK),
		(PMIC_FG_SW_CR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_sw_clear(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SW_CLEAR_MASK),
		(PMIC_FG_SW_CLEAR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_fp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SON_FP_EN_MASK),
		(PMIC_FG_SON_FP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_slp_hs(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SON_SLP_HS_MASK),
		(PMIC_FG_SON_SLP_HS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_offset_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_OFFSET_RST_MASK),
		(PMIC_FG_OFFSET_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_time_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_TIME_RST_MASK),
		(PMIC_FG_TIME_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_charge_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_CHARGE_RST_MASK),
		(PMIC_FG_CHARGE_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_n_charge_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_N_CHARGE_RST_MASK),
		(PMIC_FG_N_CHARGE_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_soff_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_SOFF_RST_MASK),
		(PMIC_FG_SOFF_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_va_err_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON1),
		(val),
		(PMIC_FG_VA_ERR_RST_MASK),
		(PMIC_FG_VA_ERR_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_latchdata_st(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON1),
		(&val),
		(PMIC_FG_LATCHDATA_ST_MASK),
		(PMIC_FG_LATCHDATA_ST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_bat_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_BAT_H_MASK),
		(PMIC_EVENT_FG_BAT_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_bat_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_BAT_L_MASK),
		(PMIC_EVENT_FG_BAT_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_cur_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_CUR_H_MASK),
		(PMIC_EVENT_FG_CUR_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_cur_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_CUR_L_MASK),
		(PMIC_EVENT_FG_CUR_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_zcv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_ZCV_MASK),
		(PMIC_EVENT_FG_ZCV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_n_charge_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_N_CHARGE_L_MASK),
		(PMIC_EVENT_FG_N_CHARGE_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_iavg_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_IAVG_H_MASK),
		(PMIC_EVENT_FG_IAVG_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_iavg_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_IAVG_L_MASK),
		(PMIC_EVENT_FG_IAVG_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_DISCHARGE_MASK),
		(PMIC_EVENT_FG_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_event_fg_charge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON2),
		(&val),
		(PMIC_EVENT_FG_CHARGE_MASK),
		(PMIC_EVENT_FG_CHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_osr1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON3),
		(val),
		(PMIC_FG_OSR1_MASK),
		(PMIC_FG_OSR1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_osr2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON3),
		(val),
		(PMIC_FG_OSR2_MASK),
		(PMIC_FG_OSR2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_fp_recal_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_FP_RECAL_EN_MASK),
		(PMIC_FG_FP_RECAL_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_cur_ov_mult(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON4),
		(&val),
		(PMIC_FG_CUR_OV_MULT_MASK),
		(PMIC_FG_CUR_OV_MULT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_adj_offset_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_ADJ_OFFSET_EN_MASK),
		(PMIC_FG_ADJ_OFFSET_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_adc_autorst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_ADC_AUTORST_MASK),
		(PMIC_FG_ADC_AUTORST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_adc_rstdetect(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON4),
		(&val),
		(PMIC_FG_ADC_RSTDETECT_MASK),
		(PMIC_FG_ADC_RSTDETECT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_va_err(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON4),
		(&val),
		(PMIC_FG_VA_ERR_MASK),
		(PMIC_FG_VA_ERR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_va_aon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_VA_AON_MASK),
		(PMIC_FG_VA_AON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_va_aoff(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_VA_AOFF_MASK),
		(PMIC_FG_VA_AOFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_SON_SW_MASK),
		(PMIC_FG_SON_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_SON_SW_MODE_MASK),
		(PMIC_FG_SON_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_pwr_fg_va_ack(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON4),
		(&val),
		(PMIC_PWR_FG_VA_ACK_MASK),
		(PMIC_PWR_FG_VA_ACK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pwr_fg_va_req(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CON4),
		(&val),
		(PMIC_PWR_FG_VA_REQ_MASK),
		(PMIC_PWR_FG_VA_REQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_va_ack_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_VA_ACK_SW_MASK),
		(PMIC_FG_VA_ACK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_va_ack_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_VA_ACK_SW_MODE_MASK),
		(PMIC_FG_VA_ACK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_va_req_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_VA_REQ_SW_MASK),
		(PMIC_FG_VA_REQ_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_va_req_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON4),
		(val),
		(PMIC_FG_VA_REQ_SW_MODE_MASK),
		(PMIC_FG_VA_REQ_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fgadc_con5_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CON5),
		(val),
		(PMIC_FGADC_CON5_RSV_MASK),
		(PMIC_FGADC_CON5_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_rstb_status(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_RST_CON0),
		(val),
		(PMIC_FG_RSTB_STATUS_MASK),
		(PMIC_FG_RSTB_STATUS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_car_15_00(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CAR_CON0),
		(&val),
		(PMIC_FG_CAR_15_00_MASK),
		(PMIC_FG_CAR_15_00_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_car_31_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CAR_CON1),
		(&val),
		(PMIC_FG_CAR_31_16_MASK),
		(PMIC_FG_CAR_31_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_bat_lth_15_00(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CARTH_CON0),
		(val),
		(PMIC_FG_BAT_LTH_15_00_MASK),
		(PMIC_FG_BAT_LTH_15_00_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_bat_lth_31_16(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CARTH_CON1),
		(val),
		(PMIC_FG_BAT_LTH_31_16_MASK),
		(PMIC_FG_BAT_LTH_31_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_bat_hth_15_00(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CARTH_CON2),
		(val),
		(PMIC_FG_BAT_HTH_15_00_MASK),
		(PMIC_FG_BAT_HTH_15_00_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_bat_hth_31_16(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CARTH_CON3),
		(val),
		(PMIC_FG_BAT_HTH_31_16_MASK),
		(PMIC_FG_BAT_HTH_31_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_ncar_15_00(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_NCAR_CON0),
		(&val),
		(PMIC_FG_NCAR_15_00_MASK),
		(PMIC_FG_NCAR_15_00_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_ncar_31_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_NCAR_CON1),
		(&val),
		(PMIC_FG_NCAR_31_16_MASK),
		(PMIC_FG_NCAR_31_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_n_charge_lth_15_00(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_NCAR_CON2),
		(val),
		(PMIC_FG_N_CHARGE_LTH_15_00_MASK),
		(PMIC_FG_N_CHARGE_LTH_15_00_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_n_charge_lth_31_16(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_NCAR_CON3),
		(val),
		(PMIC_FG_N_CHARGE_LTH_31_16_MASK),
		(PMIC_FG_N_CHARGE_LTH_31_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_iavg_15_00(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_IAVG_CON0),
		(&val),
		(PMIC_FG_IAVG_15_00_MASK),
		(PMIC_FG_IAVG_15_00_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_iavg_27_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_IAVG_CON1),
		(&val),
		(PMIC_FG_IAVG_27_16_MASK),
		(PMIC_FG_IAVG_27_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_iavg_vld(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_IAVG_CON1),
		(&val),
		(PMIC_FG_IAVG_VLD_MASK),
		(PMIC_FG_IAVG_VLD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_iavg_lth_15_00(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_IAVG_CON2),
		(val),
		(PMIC_FG_IAVG_LTH_15_00_MASK),
		(PMIC_FG_IAVG_LTH_15_00_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_iavg_lth_28_16(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_IAVG_CON3),
		(val),
		(PMIC_FG_IAVG_LTH_28_16_MASK),
		(PMIC_FG_IAVG_LTH_28_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_iavg_hth_15_00(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_IAVG_CON4),
		(val),
		(PMIC_FG_IAVG_HTH_15_00_MASK),
		(PMIC_FG_IAVG_HTH_15_00_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_iavg_hth_28_16(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_IAVG_CON5),
		(val),
		(PMIC_FG_IAVG_HTH_28_16_MASK),
		(PMIC_FG_IAVG_HTH_28_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_nter_15_00(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_NTER_CON0),
		(&val),
		(PMIC_FG_NTER_15_00_MASK),
		(PMIC_FG_NTER_15_00_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_nter_29_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_NTER_CON1),
		(&val),
		(PMIC_FG_NTER_29_16_MASK),
		(PMIC_FG_NTER_29_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_son_slp_cur_th(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_SON_CON0),
		(val),
		(PMIC_FG_SON_SLP_CUR_TH_MASK),
		(PMIC_FG_SON_SLP_CUR_TH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_slp_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_SON_CON1),
		(val),
		(PMIC_FG_SON_SLP_TIME_MASK),
		(PMIC_FG_SON_SLP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_son_det_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_SON_CON2),
		(val),
		(PMIC_FG_SON_DET_TIME_MASK),
		(PMIC_FG_SON_DET_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_soff_slp_cur_th(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_SOFF_CON0),
		(val),
		(PMIC_FG_SOFF_SLP_CUR_TH_MASK),
		(PMIC_FG_SOFF_SLP_CUR_TH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_soff_slp_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_SOFF_CON1),
		(val),
		(PMIC_FG_SOFF_SLP_TIME_MASK),
		(PMIC_FG_SOFF_SLP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_soff_det_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_SOFF_CON2),
		(val),
		(PMIC_FG_SOFF_DET_TIME_MASK),
		(PMIC_FG_SOFF_DET_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_soff_time_15_00(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_SOFF_CON3),
		(&val),
		(PMIC_FG_SOFF_TIME_15_00_MASK),
		(PMIC_FG_SOFF_TIME_15_00_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_soff_time_29_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_SOFF_CON4),
		(&val),
		(PMIC_FG_SOFF_TIME_29_16_MASK),
		(PMIC_FG_SOFF_TIME_29_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_soff(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_SOFF_CON4),
		(&val),
		(PMIC_FG_SOFF_MASK),
		(PMIC_FG_SOFF_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_zcv_det_iv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ZCV_CON0),
		(val),
		(PMIC_FG_ZCV_DET_IV_MASK),
		(PMIC_FG_ZCV_DET_IV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fgadc_zcv_con0_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ZCV_CON0),
		(val),
		(PMIC_FGADC_ZCV_CON0_RSV_MASK),
		(PMIC_FGADC_ZCV_CON0_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_zcv_curr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ZCV_CON1),
		(&val),
		(PMIC_FG_ZCV_CURR_MASK),
		(PMIC_FG_ZCV_CURR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_zcv_car_15_00(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ZCV_CON2),
		(&val),
		(PMIC_FG_ZCV_CAR_15_00_MASK),
		(PMIC_FG_ZCV_CAR_15_00_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_zcv_car_31_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_ZCV_CON3),
		(&val),
		(PMIC_FG_ZCV_CAR_31_16_MASK),
		(PMIC_FG_ZCV_CAR_31_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_zcv_car_th_15_00(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ZCVTH_CON0),
		(val),
		(PMIC_FG_ZCV_CAR_TH_15_00_MASK),
		(PMIC_FG_ZCV_CAR_TH_15_00_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_zcv_car_th_30_16(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_ZCVTH_CON1),
		(val),
		(PMIC_FG_ZCV_CAR_TH_30_16_MASK),
		(PMIC_FG_ZCV_CAR_TH_30_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_r_curr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_R_CON0),
		(&val),
		(PMIC_FG_R_CURR_MASK),
		(PMIC_FG_R_CURR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_current_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CUR_CON0),
		(&val),
		(PMIC_FG_CURRENT_OUT_MASK),
		(PMIC_FG_CURRENT_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_cur_lth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CUR_CON1),
		(val),
		(PMIC_FG_CUR_LTH_MASK),
		(PMIC_FG_CUR_LTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_cur_hth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_CUR_CON2),
		(val),
		(PMIC_FG_CUR_HTH_MASK),
		(PMIC_FG_CUR_HTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_fg_cic2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_CUR_CON3),
		(&val),
		(PMIC_FG_CIC2_MASK),
		(PMIC_FG_CIC2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fg_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_FGADC_OFFSET_CON0),
		(&val),
		(PMIC_FG_OFFSET_MASK),
		(PMIC_FG_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_fg_adjust_offset_value(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_OFFSET_CON1),
		(val),
		(PMIC_FG_ADJUST_OFFSET_VALUE_MASK),
		(PMIC_FG_ADJUST_OFFSET_VALUE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_gain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_GAIN_CON0),
		(val),
		(PMIC_FG_GAIN_MASK),
		(PMIC_FG_GAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_TEST_CON0),
		(val),
		(PMIC_FG_MODE_MASK),
		(PMIC_FG_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_rst_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_TEST_CON0),
		(val),
		(PMIC_FG_RST_SW_MASK),
		(PMIC_FG_RST_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_fgcal_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_TEST_CON0),
		(val),
		(PMIC_FG_FGCAL_EN_SW_MASK),
		(PMIC_FG_FGCAL_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_fg_fgadc_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_FGADC_TEST_CON0),
		(val),
		(PMIC_FG_FGADC_EN_SW_MASK),
		(PMIC_FG_FGADC_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_system_info_con0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SYSTEM_INFO_CON0),
		(val),
		(PMIC_RG_SYSTEM_INFO_CON0_MASK),
		(PMIC_RG_SYSTEM_INFO_CON0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_system_info_con1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SYSTEM_INFO_CON1),
		(val),
		(PMIC_RG_SYSTEM_INFO_CON1_MASK),
		(PMIC_RG_SYSTEM_INFO_CON1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_system_info_con2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SYSTEM_INFO_CON2),
		(val),
		(PMIC_RG_SYSTEM_INFO_CON2_MASK),
		(PMIC_RG_SYSTEM_INFO_CON2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_ANA_CON0),
		(val),
		(PMIC_RG_BATON_EN_MASK),
		(PMIC_RG_BATON_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_baton_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_CON0),
		(&val),
		(PMIC_RG_BATON_EN_MASK),
		(PMIC_RG_BATON_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_bif_batid_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_ANA_CON0),
		(val),
		(PMIC_RG_BIF_BATID_SW_EN_MASK),
		(PMIC_RG_BIF_BATID_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bif_batid_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_CON0),
		(&val),
		(PMIC_RG_BIF_BATID_SW_EN_MASK),
		(PMIC_RG_BIF_BATID_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_qi_baton_lt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_ANA_CON0),
		(val),
		(PMIC_RG_QI_BATON_LT_EN_MASK),
		(PMIC_RG_QI_BATON_LT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_qi_baton_lt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_CON0),
		(&val),
		(PMIC_RG_QI_BATON_LT_EN_MASK),
		(PMIC_RG_QI_BATON_LT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_baton_ht_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_ANA_CON0),
		(val),
		(PMIC_RG_BATON_HT_EN_MASK),
		(PMIC_RG_BATON_HT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_baton_ht_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_CON0),
		(&val),
		(PMIC_RG_BATON_HT_EN_MASK),
		(PMIC_RG_BATON_HT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_baton_ht_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_MON0),
		(&val),
		(PMIC_DA_BATON_HT_EN_MASK),
		(PMIC_DA_BATON_HT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_baton_undet(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_MON0),
		(&val),
		(PMIC_AD_BATON_UNDET_MASK),
		(PMIC_AD_BATON_UNDET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_baton_undet_raw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_ANA_MON0),
		(&val),
		(PMIC_AD_BATON_UNDET_RAW_MASK),
		(PMIC_AD_BATON_UNDET_RAW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_bif_tx_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_ANA_MON0),
		(&val),
		(PMIC_DA_BIF_TX_EN_MASK),
		(PMIC_DA_BIF_TX_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_bif_tx_data(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_ANA_MON0),
		(&val),
		(PMIC_DA_BIF_TX_DATA_MASK),
		(PMIC_DA_BIF_TX_DATA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_bif_rx_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_ANA_MON0),
		(&val),
		(PMIC_DA_BIF_RX_EN_MASK),
		(PMIC_DA_BIF_RX_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_bif_rx_data(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_ANA_MON0),
		(&val),
		(PMIC_AD_BIF_RX_DATA_MASK),
		(PMIC_AD_BIF_RX_DATA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_baton_debounce_wnd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON0),
		(val),
		(PMIC_RG_BATON_DEBOUNCE_WND_MASK),
		(PMIC_RG_BATON_DEBOUNCE_WND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_debounce_thd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON0),
		(val),
		(PMIC_RG_BATON_DEBOUNCE_THD_MASK),
		(PMIC_RG_BATON_DEBOUNCE_THD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_chrdet_testmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_CHRDET_TESTMODE_MASK),
		(PMIC_RG_BATON_CHRDET_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_undet_testmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_UNDET_TESTMODE_MASK),
		(PMIC_RG_BATON_UNDET_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_auxadc_testmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_AUXADC_TESTMODE_MASK),
		(PMIC_RG_BATON_AUXADC_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_fgadc_testmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_FGADC_TESTMODE_MASK),
		(PMIC_RG_BATON_FGADC_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_rtc_testmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_RTC_TESTMODE_MASK),
		(PMIC_RG_BATON_RTC_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_bif_testmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_BIF_TESTMODE_MASK),
		(PMIC_RG_BATON_BIF_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_vbif28_req_testmode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_VBIF28_REQ_TESTMODE_MASK),
		(PMIC_RG_BATON_VBIF28_REQ_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_vbif28_ack_testmode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_VBIF28_ACK_TESTMODE_MASK),
		(PMIC_RG_BATON_VBIF28_ACK_TESTMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_chrdet_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_CHRDET_SW_MASK),
		(PMIC_RG_BATON_CHRDET_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_undet_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_UNDET_SW_MASK),
		(PMIC_RG_BATON_UNDET_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_auxadc_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_AUXADC_SW_MASK),
		(PMIC_RG_BATON_AUXADC_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_fgadc_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_FGADC_SW_MASK),
		(PMIC_RG_BATON_FGADC_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_rtc_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_RTC_SW_MASK),
		(PMIC_RG_BATON_RTC_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_bif_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_BIF_SW_MASK),
		(PMIC_RG_BATON_BIF_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_vbif28_req_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_VBIF28_REQ_SW_MASK),
		(PMIC_RG_BATON_VBIF28_REQ_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baton_vbif28_ack_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BATON_CON1),
		(val),
		(PMIC_RG_BATON_VBIF28_ACK_SW_MASK),
		(PMIC_RG_BATON_VBIF28_ACK_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_baton_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_DEB_MASK),
		(PMIC_BATON_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_auxadc_set(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_AUXADC_SET_MASK),
		(PMIC_BATON_AUXADC_SET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_deb_vld(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_DEB_VLD_MASK),
		(PMIC_BATON_DEB_VLD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_bif_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_BIF_STATUS_MASK),
		(PMIC_BATON_BIF_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_rtc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_RTC_STATUS_MASK),
		(PMIC_BATON_RTC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_fgadc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_FGADC_STATUS_MASK),
		(PMIC_BATON_FGADC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_auxadc_trig(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_AUXADC_TRIG_MASK),
		(PMIC_BATON_AUXADC_TRIG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_chrdet_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_CHRDET_DEB_MASK),
		(PMIC_BATON_CHRDET_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pwr_baton_vbif28_ack(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_PWR_BATON_VBIF28_ACK_MASK),
		(PMIC_PWR_BATON_VBIF28_ACK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_pwr_baton_vbif28_req(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_PWR_BATON_VBIF28_REQ_MASK),
		(PMIC_PWR_BATON_VBIF28_REQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_baton_rsv_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BATON_CON2),
		(&val),
		(PMIC_BATON_RSV_0_MASK),
		(PMIC_BATON_RSV_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_bif_command_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON0),
		(val),
		(PMIC_BIF_COMMAND_0_MASK),
		(PMIC_BIF_COMMAND_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON1),
		(val),
		(PMIC_BIF_COMMAND_1_MASK),
		(PMIC_BIF_COMMAND_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON2),
		(val),
		(PMIC_BIF_COMMAND_2_MASK),
		(PMIC_BIF_COMMAND_2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON3),
		(val),
		(PMIC_BIF_COMMAND_3_MASK),
		(PMIC_BIF_COMMAND_3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_4(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON4),
		(val),
		(PMIC_BIF_COMMAND_4_MASK),
		(PMIC_BIF_COMMAND_4_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_5(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON5),
		(val),
		(PMIC_BIF_COMMAND_5_MASK),
		(PMIC_BIF_COMMAND_5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_6(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON6),
		(val),
		(PMIC_BIF_COMMAND_6_MASK),
		(PMIC_BIF_COMMAND_6_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_7(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON7),
		(val),
		(PMIC_BIF_COMMAND_7_MASK),
		(PMIC_BIF_COMMAND_7_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_8(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON8),
		(val),
		(PMIC_BIF_COMMAND_8_MASK),
		(PMIC_BIF_COMMAND_8_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_9(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON9),
		(val),
		(PMIC_BIF_COMMAND_9_MASK),
		(PMIC_BIF_COMMAND_9_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_10(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON10),
		(val),
		(PMIC_BIF_COMMAND_10_MASK),
		(PMIC_BIF_COMMAND_10_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_11(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON11),
		(val),
		(PMIC_BIF_COMMAND_11_MASK),
		(PMIC_BIF_COMMAND_11_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_12(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON12),
		(val),
		(PMIC_BIF_COMMAND_12_MASK),
		(PMIC_BIF_COMMAND_12_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_13(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON13),
		(val),
		(PMIC_BIF_COMMAND_13_MASK),
		(PMIC_BIF_COMMAND_13_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_14(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON14),
		(val),
		(PMIC_BIF_COMMAND_14_MASK),
		(PMIC_BIF_COMMAND_14_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON15),
		(val),
		(PMIC_BIF_RSV_MASK),
		(PMIC_BIF_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_command_type(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON15),
		(val),
		(PMIC_BIF_COMMAND_TYPE_MASK),
		(PMIC_BIF_COMMAND_TYPE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_logic_0_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON16),
		(val),
		(PMIC_BIF_LOGIC_0_SET_MASK),
		(PMIC_BIF_LOGIC_0_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_logic_1_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON16),
		(val),
		(PMIC_BIF_LOGIC_1_SET_MASK),
		(PMIC_BIF_LOGIC_1_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_stop_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON16),
		(val),
		(PMIC_BIF_STOP_SET_MASK),
		(PMIC_BIF_STOP_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_debounce_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON17),
		(val),
		(PMIC_BIF_DEBOUNCE_EN_MASK),
		(PMIC_BIF_DEBOUNCE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_read_expect_num(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON17),
		(val),
		(PMIC_BIF_READ_EXPECT_NUM_MASK),
		(PMIC_BIF_READ_EXPECT_NUM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_trasact_trigger(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON18),
		(val),
		(PMIC_BIF_TRASACT_TRIGGER_MASK),
		(PMIC_BIF_TRASACT_TRIGGER_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_bif_data_num(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON19),
		(&val),
		(PMIC_BIF_DATA_NUM_MASK),
		(PMIC_BIF_DATA_NUM_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_response(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON19),
		(&val),
		(PMIC_BIF_RESPONSE_MASK),
		(PMIC_BIF_RESPONSE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON20),
		(&val),
		(PMIC_BIF_DATA_0_MASK),
		(PMIC_BIF_DATA_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON20),
		(&val),
		(PMIC_BIF_ACK_0_MASK),
		(PMIC_BIF_ACK_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON20),
		(&val),
		(PMIC_BIF_ERR_0_MASK),
		(PMIC_BIF_ERR_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON21),
		(&val),
		(PMIC_BIF_DATA_1_MASK),
		(PMIC_BIF_DATA_1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON21),
		(&val),
		(PMIC_BIF_ACK_1_MASK),
		(PMIC_BIF_ACK_1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON21),
		(&val),
		(PMIC_BIF_ERR_1_MASK),
		(PMIC_BIF_ERR_1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON22),
		(&val),
		(PMIC_BIF_DATA_2_MASK),
		(PMIC_BIF_DATA_2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON22),
		(&val),
		(PMIC_BIF_ACK_2_MASK),
		(PMIC_BIF_ACK_2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON22),
		(&val),
		(PMIC_BIF_ERR_2_MASK),
		(PMIC_BIF_ERR_2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON23),
		(&val),
		(PMIC_BIF_DATA_3_MASK),
		(PMIC_BIF_DATA_3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON23),
		(&val),
		(PMIC_BIF_ACK_3_MASK),
		(PMIC_BIF_ACK_3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON23),
		(&val),
		(PMIC_BIF_ERR_3_MASK),
		(PMIC_BIF_ERR_3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON24),
		(&val),
		(PMIC_BIF_DATA_4_MASK),
		(PMIC_BIF_DATA_4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON24),
		(&val),
		(PMIC_BIF_ACK_4_MASK),
		(PMIC_BIF_ACK_4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON24),
		(&val),
		(PMIC_BIF_ERR_4_MASK),
		(PMIC_BIF_ERR_4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON25),
		(&val),
		(PMIC_BIF_DATA_5_MASK),
		(PMIC_BIF_DATA_5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON25),
		(&val),
		(PMIC_BIF_ACK_5_MASK),
		(PMIC_BIF_ACK_5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON25),
		(&val),
		(PMIC_BIF_ERR_5_MASK),
		(PMIC_BIF_ERR_5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_6(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON26),
		(&val),
		(PMIC_BIF_DATA_6_MASK),
		(PMIC_BIF_DATA_6_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_6(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON26),
		(&val),
		(PMIC_BIF_ACK_6_MASK),
		(PMIC_BIF_ACK_6_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_6(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON26),
		(&val),
		(PMIC_BIF_ERR_6_MASK),
		(PMIC_BIF_ERR_6_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_7(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON27),
		(&val),
		(PMIC_BIF_DATA_7_MASK),
		(PMIC_BIF_DATA_7_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_7(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON27),
		(&val),
		(PMIC_BIF_ACK_7_MASK),
		(PMIC_BIF_ACK_7_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_7(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON27),
		(&val),
		(PMIC_BIF_ERR_7_MASK),
		(PMIC_BIF_ERR_7_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_8(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON28),
		(&val),
		(PMIC_BIF_DATA_8_MASK),
		(PMIC_BIF_DATA_8_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_8(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON28),
		(&val),
		(PMIC_BIF_ACK_8_MASK),
		(PMIC_BIF_ACK_8_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_8(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON28),
		(&val),
		(PMIC_BIF_ERR_8_MASK),
		(PMIC_BIF_ERR_8_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_data_9(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON29),
		(&val),
		(PMIC_BIF_DATA_9_MASK),
		(PMIC_BIF_DATA_9_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_ack_9(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON29),
		(&val),
		(PMIC_BIF_ACK_9_MASK),
		(PMIC_BIF_ACK_9_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_err_9(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON29),
		(&val),
		(PMIC_BIF_ERR_9_MASK),
		(PMIC_BIF_ERR_9_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_bif_test_mode0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE0_MASK),
		(PMIC_BIF_TEST_MODE0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE1_MASK),
		(PMIC_BIF_TEST_MODE1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE2_MASK),
		(PMIC_BIF_TEST_MODE2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE3_MASK),
		(PMIC_BIF_TEST_MODE3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode4(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE4_MASK),
		(PMIC_BIF_TEST_MODE4_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode5(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE5_MASK),
		(PMIC_BIF_TEST_MODE5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode6(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE6_MASK),
		(PMIC_BIF_TEST_MODE6_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode7(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE7_MASK),
		(PMIC_BIF_TEST_MODE7_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_test_mode8(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TEST_MODE8_MASK),
		(PMIC_BIF_TEST_MODE8_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_bat_lost_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_BAT_LOST_SW_MASK),
		(PMIC_BIF_BAT_LOST_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_rx_data_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_RX_DATA_SW_MASK),
		(PMIC_BIF_RX_DATA_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_tx_data_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TX_DATA_SW_MASK),
		(PMIC_BIF_TX_DATA_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_rx_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_RX_EN_SW_MASK),
		(PMIC_BIF_RX_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_tx_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON30),
		(val),
		(PMIC_BIF_TX_EN_SW_MASK),
		(PMIC_BIF_TX_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_back_normal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON31),
		(val),
		(PMIC_BIF_BACK_NORMAL_MASK),
		(PMIC_BIF_BACK_NORMAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_irq_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON31),
		(val),
		(PMIC_BIF_IRQ_CLR_MASK),
		(PMIC_BIF_IRQ_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_bif_irq(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON31),
		(&val),
		(PMIC_BIF_IRQ_MASK),
		(PMIC_BIF_IRQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_timeout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON31),
		(&val),
		(PMIC_BIF_TIMEOUT_MASK),
		(PMIC_BIF_TIMEOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_bat_undet(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON31),
		(&val),
		(PMIC_BIF_BAT_UNDET_MASK),
		(PMIC_BIF_BAT_UNDET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_total_valid(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON31),
		(&val),
		(PMIC_BIF_TOTAL_VALID_MASK),
		(PMIC_BIF_TOTAL_VALID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_bus_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON31),
		(&val),
		(PMIC_BIF_BUS_STATUS_MASK),
		(PMIC_BIF_BUS_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_bif_power_up_count(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON32),
		(val),
		(PMIC_BIF_POWER_UP_COUNT_MASK),
		(PMIC_BIF_POWER_UP_COUNT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_power_up(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON32),
		(val),
		(PMIC_BIF_POWER_UP_MASK),
		(PMIC_BIF_POWER_UP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_bif_rx_err_unknown(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON33),
		(&val),
		(PMIC_BIF_RX_ERR_UNKNOWN_MASK),
		(PMIC_BIF_RX_ERR_UNKNOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_rx_err_insuff(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON33),
		(&val),
		(PMIC_BIF_RX_ERR_INSUFF_MASK),
		(PMIC_BIF_RX_ERR_INSUFF_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_rx_err_lowphase(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON33),
		(&val),
		(PMIC_BIF_RX_ERR_LOWPHASE_MASK),
		(PMIC_BIF_RX_ERR_LOWPHASE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_rx_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON33),
		(&val),
		(PMIC_BIF_RX_STATE_MASK),
		(PMIC_BIF_RX_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_flow_ctl_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON33),
		(&val),
		(PMIC_BIF_FLOW_CTL_STATE_MASK),
		(PMIC_BIF_FLOW_CTL_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_tx_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON33),
		(&val),
		(PMIC_BIF_TX_STATE_MASK),
		(PMIC_BIF_TX_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_tx_data_fianl(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON34),
		(&val),
		(PMIC_BIF_TX_DATA_FIANL_MASK),
		(PMIC_BIF_TX_DATA_FIANL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_rx_data_sampling(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON35),
		(&val),
		(PMIC_BIF_RX_DATA_SAMPLING_MASK),
		(PMIC_BIF_RX_DATA_SAMPLING_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_bif_rx_data_recovery(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON36),
		(&val),
		(PMIC_BIF_RX_DATA_RECOVERY_MASK),
		(PMIC_BIF_RX_DATA_RECOVERY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_baton_ht_en_pre(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON36),
		(val),
		(PMIC_RG_BATON_HT_EN_PRE_MASK),
		(PMIC_RG_BATON_HT_EN_PRE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_baton_ht_en_pre(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON36),
		(&val),
		(PMIC_RG_BATON_HT_EN_PRE_MASK),
		(PMIC_RG_BATON_HT_EN_PRE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_baton_ht_en_dly_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON36),
		(val),
		(PMIC_RG_BATON_HT_EN_DLY_TIME_MASK),
		(PMIC_RG_BATON_HT_EN_DLY_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_baton_ht_en_dly_time(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON36),
		(&val),
		(PMIC_RG_BATON_HT_EN_DLY_TIME_MASK),
		(PMIC_RG_BATON_HT_EN_DLY_TIME_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_bif_timeout_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON37),
		(val),
		(PMIC_BIF_TIMEOUT_SET_MASK),
		(PMIC_BIF_TIMEOUT_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_rx_deg_wnd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON38),
		(val),
		(PMIC_BIF_RX_DEG_WND_MASK),
		(PMIC_BIF_RX_DEG_WND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bif_rx_deg_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON38),
		(val),
		(PMIC_BIF_RX_DEG_EN_MASK),
		(PMIC_BIF_RX_DEG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_bif_rsv1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BIF_CON39),
		(&val),
		(PMIC_BIF_RSV1_MASK),
		(PMIC_BIF_RSV1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_bif_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BIF_CON39),
		(val),
		(PMIC_BIF_RSV0_MASK),
		(PMIC_BIF_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_hk_top_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_ID),
		(&val),
		(PMIC_HK_TOP_ANA_ID_MASK),
		(PMIC_HK_TOP_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_ID),
		(&val),
		(PMIC_HK_TOP_DIG_ID_MASK),
		(PMIC_HK_TOP_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_REV0),
		(&val),
		(PMIC_HK_TOP_ANA_MINOR_REV_MASK),
		(PMIC_HK_TOP_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_REV0),
		(&val),
		(PMIC_HK_TOP_ANA_MAJOR_REV_MASK),
		(PMIC_HK_TOP_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_REV0),
		(&val),
		(PMIC_HK_TOP_DIG_MINOR_REV_MASK),
		(PMIC_HK_TOP_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_REV0),
		(&val),
		(PMIC_HK_TOP_DIG_MAJOR_REV_MASK),
		(PMIC_HK_TOP_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_DBI),
		(&val),
		(PMIC_HK_TOP_CBS_MASK),
		(PMIC_HK_TOP_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_DBI),
		(&val),
		(PMIC_HK_TOP_BIX_MASK),
		(PMIC_HK_TOP_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_DBI),
		(&val),
		(PMIC_HK_TOP_ESP_MASK),
		(PMIC_HK_TOP_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_top_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_DXI),
		(&val),
		(PMIC_HK_TOP_FPI_MASK),
		(PMIC_HK_TOP_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_clk_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TPM0),
		(&val),
		(PMIC_HK_CLK_OFFSET_MASK),
		(PMIC_HK_CLK_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_rst_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TPM0),
		(&val),
		(PMIC_HK_RST_OFFSET_MASK),
		(PMIC_HK_RST_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_int_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TPM1),
		(&val),
		(PMIC_HK_INT_OFFSET_MASK),
		(PMIC_HK_INT_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_hk_int_len(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TPM1),
		(&val),
		(PMIC_HK_INT_LEN_MASK),
		(PMIC_HK_INT_LEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_auxadc_26m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_26M_CK_PDN_HWEN_MASK),
		(PMIC_RG_AUXADC_26M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_26m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_26M_CK_PDN_MASK),
		(PMIC_RG_AUXADC_26M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_CK_PDN_HWEN_MASK),
		(PMIC_RG_AUXADC_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_CK_PDN_MASK),
		(PMIC_RG_AUXADC_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_rng_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_RNG_CK_PDN_HWEN_MASK),
		(PMIC_RG_AUXADC_RNG_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_rng_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_RNG_CK_PDN_MASK),
		(PMIC_RG_AUXADC_RNG_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_1m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_1M_CK_PDN_MASK),
		(PMIC_RG_AUXADC_1M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_AUXADC_32K_CK_PDN_MASK),
		(PMIC_RG_AUXADC_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_intrp_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_HK_INTRP_CK_PDN_HWEN_MASK),
		(PMIC_RG_HK_INTRP_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_intrp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_HK_INTRP_CK_PDN_MASK),
		(PMIC_RG_HK_INTRP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_26m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON1),
		(val),
		(PMIC_RG_AUXADC_26M_CK_TSTSEL_MASK),
		(PMIC_RG_AUXADC_26M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON1),
		(val),
		(PMIC_RG_AUXADC_CK_TSTSEL_MASK),
		(PMIC_RG_AUXADC_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_rng_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON1),
		(val),
		(PMIC_RG_AUXADC_RNG_CK_TSTSEL_MASK),
		(PMIC_RG_AUXADC_RNG_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_1m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON1),
		(val),
		(PMIC_RG_AUXADC_1M_CK_TSTSEL_MASK),
		(PMIC_RG_AUXADC_1M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_32k_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON1),
		(val),
		(PMIC_RG_AUXADC_32K_CK_TSTSEL_MASK),
		(PMIC_RG_AUXADC_32K_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_intrp_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CLK_CON1),
		(val),
		(PMIC_RG_HK_INTRP_CK_TSTSEL_MASK),
		(PMIC_RG_HK_INTRP_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_RG_AUXADC_RST_MASK),
		(PMIC_RG_AUXADC_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_reg_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_RG_AUXADC_REG_RST_MASK),
		(PMIC_RG_AUXADC_REG_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_hk_top_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_BANK_HK_TOP_SWRST_MASK),
		(PMIC_BANK_HK_TOP_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_auxadc_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_BANK_AUXADC_SWRST_MASK),
		(PMIC_BANK_AUXADC_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_auxadc_dig_1_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_BANK_AUXADC_DIG_1_SWRST_MASK),
		(PMIC_BANK_AUXADC_DIG_1_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_auxadc_dig_2_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_BANK_AUXADC_DIG_2_SWRST_MASK),
		(PMIC_BANK_AUXADC_DIG_2_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_auxadc_dig_3_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_BANK_AUXADC_DIG_3_SWRST_MASK),
		(PMIC_BANK_AUXADC_DIG_3_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_auxadc_dig_4_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_RST_CON0),
		(val),
		(PMIC_BANK_AUXADC_DIG_4_SWRST_MASK),
		(PMIC_BANK_AUXADC_DIG_4_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_en_bat_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_BAT_H_MASK),
		(PMIC_RG_INT_EN_BAT_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bat_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_BAT_H_MASK),
		(PMIC_RG_INT_EN_BAT_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_bat_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_BAT_L_MASK),
		(PMIC_RG_INT_EN_BAT_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bat_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_BAT_L_MASK),
		(PMIC_RG_INT_EN_BAT_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_bat2_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_BAT2_H_MASK),
		(PMIC_RG_INT_EN_BAT2_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bat2_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_BAT2_H_MASK),
		(PMIC_RG_INT_EN_BAT2_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_bat2_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_BAT2_L_MASK),
		(PMIC_RG_INT_EN_BAT2_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bat2_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_BAT2_L_MASK),
		(PMIC_RG_INT_EN_BAT2_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_bat_temp_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_BAT_TEMP_H_MASK),
		(PMIC_RG_INT_EN_BAT_TEMP_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bat_temp_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_BAT_TEMP_H_MASK),
		(PMIC_RG_INT_EN_BAT_TEMP_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_bat_temp_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_BAT_TEMP_L_MASK),
		(PMIC_RG_INT_EN_BAT_TEMP_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_bat_temp_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_BAT_TEMP_L_MASK),
		(PMIC_RG_INT_EN_BAT_TEMP_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_thr_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_THR_H_MASK),
		(PMIC_RG_INT_EN_THR_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_thr_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_THR_H_MASK),
		(PMIC_RG_INT_EN_THR_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_thr_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_THR_L_MASK),
		(PMIC_RG_INT_EN_THR_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_thr_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_THR_L_MASK),
		(PMIC_RG_INT_EN_THR_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_auxadc_imp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_AUXADC_IMP_MASK),
		(PMIC_RG_INT_EN_AUXADC_IMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_auxadc_imp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_AUXADC_IMP_MASK),
		(PMIC_RG_INT_EN_AUXADC_IMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_nag_c_dltv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_NAG_C_DLTV_MASK),
		(PMIC_RG_INT_EN_NAG_C_DLTV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_nag_c_dltv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_NAG_C_DLTV_MASK),
		(PMIC_RG_INT_EN_NAG_C_DLTV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_bat_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BAT_H_MASK),
		(PMIC_RG_INT_MASK_BAT_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bat_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BAT_L_MASK),
		(PMIC_RG_INT_MASK_BAT_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bat2_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BAT2_H_MASK),
		(PMIC_RG_INT_MASK_BAT2_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bat2_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BAT2_L_MASK),
		(PMIC_RG_INT_MASK_BAT2_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bat_temp_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BAT_TEMP_H_MASK),
		(PMIC_RG_INT_MASK_BAT_TEMP_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_bat_temp_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_BAT_TEMP_L_MASK),
		(PMIC_RG_INT_MASK_BAT_TEMP_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_thr_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_THR_H_MASK),
		(PMIC_RG_INT_MASK_THR_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_thr_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_THR_L_MASK),
		(PMIC_RG_INT_MASK_THR_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_auxadc_imp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_AUXADC_IMP_MASK),
		(PMIC_RG_INT_MASK_AUXADC_IMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_nag_c_dltv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_NAG_C_DLTV_MASK),
		(PMIC_RG_INT_MASK_NAG_C_DLTV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bat_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BAT_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_BAT_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bat_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BAT_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_BAT_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bat2_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BAT2_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_BAT2_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bat2_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BAT2_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_BAT2_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bat_temp_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BAT_TEMP_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_BAT_TEMP_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_bat_temp_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_BAT_TEMP_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_BAT_TEMP_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_thr_h(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_THR_H_MASK),
		(PMIC_RG_INT_RAW_STATUS_THR_H_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_thr_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_THR_L_MASK),
		(PMIC_RG_INT_RAW_STATUS_THR_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_auxadc_imp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_AUXADC_IMP_MASK),
		(PMIC_RG_INT_RAW_STATUS_AUXADC_IMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_nag_c_dltv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_NAG_C_DLTV_MASK),
		(PMIC_RG_INT_RAW_STATUS_NAG_C_DLTV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_clk_mon_flag_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_MON_CON0),
		(val),
		(PMIC_RG_CLK_MON_FLAG_EN_MASK),
		(PMIC_RG_CLK_MON_FLAG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_clk_mon_flag_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_MON_CON0),
		(&val),
		(PMIC_RG_CLK_MON_FLAG_EN_MASK),
		(PMIC_RG_CLK_MON_FLAG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_clk_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_MON_CON0),
		(val),
		(PMIC_RG_CLK_MON_FLAG_SEL_MASK),
		(PMIC_RG_CLK_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mon_flag_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_MON_CON1),
		(val),
		(PMIC_RG_INT_MON_FLAG_EN_MASK),
		(PMIC_RG_INT_MON_FLAG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_mon_flag_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_MON_CON1),
		(&val),
		(PMIC_RG_INT_MON_FLAG_EN_MASK),
		(PMIC_RG_INT_MON_FLAG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_MON_CON1),
		(val),
		(PMIC_RG_INT_MON_FLAG_SEL_MASK),
		(PMIC_RG_INT_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_MON_CON2),
		(val),
		(PMIC_RG_HK_MON_FLAG_SEL_MASK),
		(PMIC_RG_HK_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mon_flag_sel_auxadc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_MON_CON2),
		(val),
		(PMIC_RG_MON_FLAG_SEL_AUXADC_MASK),
		(PMIC_RG_MON_FLAG_SEL_AUXADC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adcin_vsen_mux_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CHR_CON),
		(val),
		(PMIC_RG_ADCIN_VSEN_MUX_EN_MASK),
		(PMIC_RG_ADCIN_VSEN_MUX_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adcin_vsen_mux_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_CHR_CON),
		(&val),
		(PMIC_RG_ADCIN_VSEN_MUX_EN_MASK),
		(PMIC_RG_ADCIN_VSEN_MUX_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_baton_tdet_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CHR_CON),
		(val),
		(PMIC_RG_BATON_TDET_EN_MASK),
		(PMIC_RG_BATON_TDET_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_baton_tdet_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_CHR_CON),
		(&val),
		(PMIC_RG_BATON_TDET_EN_MASK),
		(PMIC_RG_BATON_TDET_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_adcin_vsen_ext_baton_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CHR_CON),
		(val),
		(PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_MASK),
		(PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adcin_vsen_ext_baton_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_CHR_CON),
		(&val),
		(PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_MASK),
		(PMIC_RG_ADCIN_VSEN_EXT_BATON_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_adcin_vbat_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CHR_CON),
		(val),
		(PMIC_RG_ADCIN_VBAT_EN_MASK),
		(PMIC_RG_ADCIN_VBAT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adcin_vbat_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_CHR_CON),
		(&val),
		(PMIC_RG_ADCIN_VBAT_EN_MASK),
		(PMIC_RG_ADCIN_VBAT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_adcin_vsen_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CHR_CON),
		(val),
		(PMIC_RG_ADCIN_VSEN_EN_MASK),
		(PMIC_RG_ADCIN_VSEN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adcin_vsen_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_CHR_CON),
		(&val),
		(PMIC_RG_ADCIN_VSEN_EN_MASK),
		(PMIC_RG_ADCIN_VSEN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_adcin_chr_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_CHR_CON),
		(val),
		(PMIC_RG_ADCIN_CHR_EN_MASK),
		(PMIC_RG_ADCIN_CHR_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adcin_chr_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_CHR_CON),
		(&val),
		(PMIC_RG_ADCIN_CHR_EN_MASK),
		(PMIC_RG_ADCIN_CHR_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_auxadc_diffbuf_swen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_ANA_CON),
		(val),
		(PMIC_RG_AUXADC_DIFFBUF_SWEN_MASK),
		(PMIC_RG_AUXADC_DIFFBUF_SWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_diffbuf_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_ANA_CON),
		(val),
		(PMIC_RG_AUXADC_DIFFBUF_EN_MASK),
		(PMIC_RG_AUXADC_DIFFBUF_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_auxadc_diffbuf_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_ANA_CON),
		(&val),
		(PMIC_RG_AUXADC_DIFFBUF_EN_MASK),
		(PMIC_RG_AUXADC_DIFFBUF_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_adcin_vbat_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_ADCIN_VBAT_EN_MASK),
		(PMIC_DA_ADCIN_VBAT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_auxadc_vbat_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_AUXADC_VBAT_EN_MASK),
		(PMIC_DA_AUXADC_VBAT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_adcin_vsen_mux_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_ADCIN_VSEN_MUX_EN_MASK),
		(PMIC_DA_ADCIN_VSEN_MUX_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_adcin_vsen_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_ADCIN_VSEN_EN_MASK),
		(PMIC_DA_ADCIN_VSEN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_adcin_chr_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_ADCIN_CHR_EN_MASK),
		(PMIC_DA_ADCIN_CHR_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_baton_tdet_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_BATON_TDET_EN_MASK),
		(PMIC_DA_BATON_TDET_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_adcin_batid_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_ADCIN_BATID_SW_EN_MASK),
		(PMIC_DA_ADCIN_BATID_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_auxadc_diffbuf_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_AUXADC_ANA),
		(&val),
		(PMIC_DA_AUXADC_DIFFBUF_EN_MASK),
		(PMIC_DA_AUXADC_DIFFBUF_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_hk_strup_auxadc_start_sw(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_STRUP),
		(val),
		(PMIC_RG_HK_STRUP_AUXADC_START_SW_MASK),
		(PMIC_RG_HK_STRUP_AUXADC_START_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_strup_auxadc_rstb_sw(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_STRUP),
		(val),
		(PMIC_RG_HK_STRUP_AUXADC_RSTB_SW_MASK),
		(PMIC_RG_HK_STRUP_AUXADC_RSTB_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_strup_auxadc_start_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_STRUP),
		(val),
		(PMIC_RG_HK_STRUP_AUXADC_START_SEL_MASK),
		(PMIC_RG_HK_STRUP_AUXADC_START_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_strup_auxadc_rstb_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_STRUP),
		(val),
		(PMIC_RG_HK_STRUP_AUXADC_RSTB_SEL_MASK),
		(PMIC_RG_HK_STRUP_AUXADC_RSTB_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hk_strup_auxadc_rpcnt_max(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_STRUP),
		(val),
		(PMIC_RG_HK_STRUP_AUXADC_RPCNT_MAX_MASK),
		(PMIC_RG_HK_STRUP_AUXADC_RPCNT_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_auxadc_stb_swen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VAUX18_AUXADC_STB_SWEN_MASK),
		(PMIC_RG_VAUX18_AUXADC_STB_SWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_auxadc_stb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VAUX18_AUXADC_STB_EN_MASK),
		(PMIC_RG_VAUX18_AUXADC_STB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_auxadc_stb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_CON),
		(&val),
		(PMIC_RG_VAUX18_AUXADC_STB_EN_MASK),
		(PMIC_RG_VAUX18_AUXADC_STB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_auxadc_ack_swen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VAUX18_AUXADC_ACK_SWEN_MASK),
		(PMIC_RG_VAUX18_AUXADC_ACK_SWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_auxadc_ack_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VAUX18_AUXADC_ACK_EN_MASK),
		(PMIC_RG_VAUX18_AUXADC_ACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_auxadc_ack_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_CON),
		(&val),
		(PMIC_RG_VAUX18_AUXADC_ACK_EN_MASK),
		(PMIC_RG_VAUX18_AUXADC_ACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_auxadc_stb_swen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VBIF28_AUXADC_STB_SWEN_MASK),
		(PMIC_RG_VBIF28_AUXADC_STB_SWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbif28_auxadc_stb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VBIF28_AUXADC_STB_EN_MASK),
		(PMIC_RG_VBIF28_AUXADC_STB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_auxadc_stb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_CON),
		(&val),
		(PMIC_RG_VBIF28_AUXADC_STB_EN_MASK),
		(PMIC_RG_VBIF28_AUXADC_STB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_auxadc_ack_swen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VBIF28_AUXADC_ACK_SWEN_MASK),
		(PMIC_RG_VBIF28_AUXADC_ACK_SWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbif28_auxadc_ack_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_LDO_CON),
		(val),
		(PMIC_RG_VBIF28_AUXADC_ACK_EN_MASK),
		(PMIC_RG_VBIF28_AUXADC_ACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_auxadc_ack_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_CON),
		(&val),
		(PMIC_RG_VBIF28_AUXADC_ACK_EN_MASK),
		(PMIC_RG_VBIF28_AUXADC_ACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_auxadc_vaux18_req(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_AUXADC_VAUX18_REQ_MASK),
		(PMIC_DD_AUXADC_VAUX18_REQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_vaux18_auxadc_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_VAUX18_AUXADC_STB_MASK),
		(PMIC_DD_VAUX18_AUXADC_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_auxadc_vaux18_pwdb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_AUXADC_VAUX18_PWDB_MASK),
		(PMIC_DD_AUXADC_VAUX18_PWDB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_vaux18_auxadc_ack(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_VAUX18_AUXADC_ACK_MASK),
		(PMIC_DD_VAUX18_AUXADC_ACK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_auxadc_vbif28_req(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_AUXADC_VBIF28_REQ_MASK),
		(PMIC_DD_AUXADC_VBIF28_REQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_vbif28_auxadc_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_VBIF28_AUXADC_STB_MASK),
		(PMIC_DD_VBIF28_AUXADC_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_auxadc_vbif28_pwdb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_AUXADC_VBIF28_PWDB_MASK),
		(PMIC_DD_AUXADC_VBIF28_PWDB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_dd_vbif28_auxadc_ack(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_HK_TOP_LDO_STATUS),
		(&val),
		(PMIC_DD_VBIF28_AUXADC_ACK_MASK),
		(PMIC_DD_VBIF28_AUXADC_ACK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_hk_auxadc_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_HK_TOP_WKEY),
		(val),
		(PMIC_HK_AUXADC_KEY_MASK),
		(PMIC_HK_AUXADC_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_ID),
		(&val),
		(PMIC_AUXADC_ANA_ID_MASK),
		(PMIC_AUXADC_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_ID_MASK),
		(PMIC_AUXADC_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_REV0),
		(&val),
		(PMIC_AUXADC_ANA_MINOR_REV_MASK),
		(PMIC_AUXADC_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_REV0),
		(&val),
		(PMIC_AUXADC_ANA_MAJOR_REV_MASK),
		(PMIC_AUXADC_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DSN_CBS_MASK),
		(PMIC_AUXADC_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DSN_BIX_MASK),
		(PMIC_AUXADC_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aux_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON0),
		(val),
		(PMIC_RG_AUX_RSV_MASK),
		(PMIC_RG_AUX_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_cali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_AUXADC_CALI_MASK),
		(PMIC_RG_AUXADC_CALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbuf_byp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_VBUF_BYP_MASK),
		(PMIC_RG_VBUF_BYP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbuf_calen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_VBUF_CALEN_MASK),
		(PMIC_RG_VBUF_CALEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbuf_exten(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_VBUF_EXTEN_MASK),
		(PMIC_RG_VBUF_EXTEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_rng_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_AUXADC_RNG_EN_MASK),
		(PMIC_RG_AUXADC_RNG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_auxadc_rng_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ANA_CON1),
		(&val),
		(PMIC_RG_AUXADC_RNG_EN_MASK),
		(PMIC_RG_AUXADC_RNG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_auxadc_noise_res(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_AUXADC_NOISE_RES_MASK),
		(PMIC_RG_AUXADC_NOISE_RES_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auxadc_pullh_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ANA_CON1),
		(val),
		(PMIC_RG_AUXADC_PULLH_EN_MASK),
		(PMIC_RG_AUXADC_PULLH_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_auxadc_pullh_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ANA_CON1),
		(&val),
		(PMIC_RG_AUXADC_PULLH_EN_MASK),
		(PMIC_RG_AUXADC_PULLH_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_efuse_auxadc_ndif_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ELR_0),
		(val),
		(PMIC_RG_EFUSE_AUXADC_NDIF_EN_MASK),
		(PMIC_RG_EFUSE_AUXADC_NDIF_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_efuse_auxadc_ndif_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ELR_0),
		(&val),
		(PMIC_RG_EFUSE_AUXADC_NDIF_EN_MASK),
		(PMIC_RG_EFUSE_AUXADC_NDIF_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_1_ANA_ID_MASK),
		(PMIC_AUXADC_DIG_1_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_1_DIG_ID_MASK),
		(PMIC_AUXADC_DIG_1_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_1_ANA_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_1_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_1_ANA_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_1_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_1_DIG_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_1_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_1_DIG_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_1_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_1_DSN_CBS_MASK),
		(PMIC_AUXADC_DIG_1_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_1_DSN_BIX_MASK),
		(PMIC_AUXADC_DIG_1_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_1_DSN_ESP_MASK),
		(PMIC_AUXADC_DIG_1_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_1_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_1_DSN_DXI),
		(&val),
		(PMIC_AUXADC_DIG_1_DSN_FPI_MASK),
		(PMIC_AUXADC_DIG_1_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC0),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH0_MASK),
		(PMIC_AUXADC_ADC_OUT_CH0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC0),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH0_MASK),
		(PMIC_AUXADC_ADC_RDY_CH0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC1),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH1_MASK),
		(PMIC_AUXADC_ADC_OUT_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC1),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH1_MASK),
		(PMIC_AUXADC_ADC_RDY_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC2),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH2_MASK),
		(PMIC_AUXADC_ADC_OUT_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC2),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH2_MASK),
		(PMIC_AUXADC_ADC_RDY_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC3),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH3_MASK),
		(PMIC_AUXADC_ADC_OUT_CH3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC3),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH3_MASK),
		(PMIC_AUXADC_ADC_RDY_CH3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC4),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH4_MASK),
		(PMIC_AUXADC_ADC_OUT_CH4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch4(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC4),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH4_MASK),
		(PMIC_AUXADC_ADC_RDY_CH4_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC5),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH5_MASK),
		(PMIC_AUXADC_ADC_OUT_CH5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch5(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC5),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH5_MASK),
		(PMIC_AUXADC_ADC_RDY_CH5_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch6(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC6),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH6_MASK),
		(PMIC_AUXADC_ADC_OUT_CH6_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch6(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC6),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH6_MASK),
		(PMIC_AUXADC_ADC_RDY_CH6_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch7(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC7),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH7_MASK),
		(PMIC_AUXADC_ADC_OUT_CH7_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch7(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC7),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH7_MASK),
		(PMIC_AUXADC_ADC_RDY_CH7_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch8(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC8),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH8_MASK),
		(PMIC_AUXADC_ADC_OUT_CH8_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch8(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC8),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH8_MASK),
		(PMIC_AUXADC_ADC_RDY_CH8_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch9(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC9),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH9_MASK),
		(PMIC_AUXADC_ADC_OUT_CH9_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch9(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC9),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH9_MASK),
		(PMIC_AUXADC_ADC_RDY_CH9_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch10(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC10),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH10_MASK),
		(PMIC_AUXADC_ADC_OUT_CH10_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch10(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC10),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH10_MASK),
		(PMIC_AUXADC_ADC_RDY_CH10_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch11(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC11),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH11_MASK),
		(PMIC_AUXADC_ADC_OUT_CH11_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch11(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC11),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH11_MASK),
		(PMIC_AUXADC_ADC_RDY_CH11_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch12_15(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC12),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH12_15_MASK),
		(PMIC_AUXADC_ADC_OUT_CH12_15_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch12_15(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC12),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH12_15_MASK),
		(PMIC_AUXADC_ADC_RDY_CH12_15_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch7_by_gps(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC15),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH7_BY_GPS_MASK),
		(PMIC_AUXADC_ADC_OUT_CH7_BY_GPS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch7_by_gps(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC15),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH7_BY_GPS_MASK),
		(PMIC_AUXADC_ADC_RDY_CH7_BY_GPS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch7_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC16),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH7_BY_MD_MASK),
		(PMIC_AUXADC_ADC_OUT_CH7_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch7_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC16),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH7_BY_MD_MASK),
		(PMIC_AUXADC_ADC_RDY_CH7_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch7_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC17),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH7_BY_AP_MASK),
		(PMIC_AUXADC_ADC_OUT_CH7_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch7_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC17),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH7_BY_AP_MASK),
		(PMIC_AUXADC_ADC_RDY_CH7_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch4_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC18),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_MD_MASK),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch4_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC18),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_MD_MASK),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_pwron_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC19),
		(&val),
		(PMIC_AUXADC_ADC_OUT_PWRON_PCHR_MASK),
		(PMIC_AUXADC_ADC_OUT_PWRON_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_pwron_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC19),
		(&val),
		(PMIC_AUXADC_ADC_RDY_PWRON_PCHR_MASK),
		(PMIC_AUXADC_ADC_RDY_PWRON_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_wakeup_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC20),
		(&val),
		(PMIC_AUXADC_ADC_OUT_WAKEUP_PCHR_MASK),
		(PMIC_AUXADC_ADC_OUT_WAKEUP_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_wakeup_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC20),
		(&val),
		(PMIC_AUXADC_ADC_RDY_WAKEUP_PCHR_MASK),
		(PMIC_AUXADC_ADC_RDY_WAKEUP_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch0_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC21),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH0_BY_MD_MASK),
		(PMIC_AUXADC_ADC_OUT_CH0_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch0_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC21),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH0_BY_MD_MASK),
		(PMIC_AUXADC_ADC_RDY_CH0_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch0_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC22),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH0_BY_AP_MASK),
		(PMIC_AUXADC_ADC_OUT_CH0_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch0_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC22),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH0_BY_AP_MASK),
		(PMIC_AUXADC_ADC_RDY_CH0_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch1_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC23),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH1_BY_MD_MASK),
		(PMIC_AUXADC_ADC_OUT_CH1_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch1_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC23),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH1_BY_MD_MASK),
		(PMIC_AUXADC_ADC_RDY_CH1_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch1_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC24),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH1_BY_AP_MASK),
		(PMIC_AUXADC_ADC_OUT_CH1_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch1_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC24),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH1_BY_AP_MASK),
		(PMIC_AUXADC_ADC_RDY_CH1_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_fgadc_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC26),
		(&val),
		(PMIC_AUXADC_ADC_OUT_FGADC_PCHR_MASK),
		(PMIC_AUXADC_ADC_OUT_FGADC_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_fgadc_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC26),
		(&val),
		(PMIC_AUXADC_ADC_RDY_FGADC_PCHR_MASK),
		(PMIC_AUXADC_ADC_RDY_FGADC_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_bat_plugin_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC27),
		(&val),
		(PMIC_AUXADC_ADC_OUT_BAT_PLUGIN_PCHR_MASK),
		(PMIC_AUXADC_ADC_OUT_BAT_PLUGIN_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_bat_plugin_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC27),
		(&val),
		(PMIC_AUXADC_ADC_RDY_BAT_PLUGIN_PCHR_MASK),
		(PMIC_AUXADC_ADC_RDY_BAT_PLUGIN_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_raw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC30),
		(&val),
		(PMIC_AUXADC_ADC_OUT_RAW_MASK),
		(PMIC_AUXADC_ADC_OUT_RAW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_dcxo_by_gps(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC32),
		(&val),
		(PMIC_AUXADC_ADC_OUT_DCXO_BY_GPS_MASK),
		(PMIC_AUXADC_ADC_OUT_DCXO_BY_GPS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_dcxo_by_gps(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC32),
		(&val),
		(PMIC_AUXADC_ADC_RDY_DCXO_BY_GPS_MASK),
		(PMIC_AUXADC_ADC_RDY_DCXO_BY_GPS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_dcxo_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC33),
		(&val),
		(PMIC_AUXADC_ADC_OUT_DCXO_BY_MD_MASK),
		(PMIC_AUXADC_ADC_OUT_DCXO_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_dcxo_by_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC33),
		(&val),
		(PMIC_AUXADC_ADC_RDY_DCXO_BY_MD_MASK),
		(PMIC_AUXADC_ADC_RDY_DCXO_BY_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_dcxo_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC34),
		(&val),
		(PMIC_AUXADC_ADC_OUT_DCXO_BY_AP_MASK),
		(PMIC_AUXADC_ADC_OUT_DCXO_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_dcxo_by_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC34),
		(&val),
		(PMIC_AUXADC_ADC_RDY_DCXO_BY_AP_MASK),
		(PMIC_AUXADC_ADC_RDY_DCXO_BY_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_batid(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC37),
		(&val),
		(PMIC_AUXADC_ADC_OUT_BATID_MASK),
		(PMIC_AUXADC_ADC_OUT_BATID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_batid(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC37),
		(&val),
		(PMIC_AUXADC_ADC_RDY_BATID_MASK),
		(PMIC_AUXADC_ADC_RDY_BATID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch4_by_thr1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC38),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_THR1_MASK),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_THR1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch4_by_thr1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC38),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_THR1_MASK),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_THR1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch4_by_thr2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC39),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_THR2_MASK),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_THR2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch4_by_thr2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC39),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_THR2_MASK),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_THR2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_ch4_by_thr3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC40),
		(&val),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_THR3_MASK),
		(PMIC_AUXADC_ADC_OUT_CH4_BY_THR3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_ch4_by_thr3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_ADC40),
		(&val),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_THR3_MASK),
		(PMIC_AUXADC_ADC_RDY_CH4_BY_THR3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA0),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_wakeup(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA0),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_WAKEUP_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_WAKEUP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_dcxo_gps_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_AP_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_dcxo_gps_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MD_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_dcxo_gps(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_GPS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_share(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_SHARE_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_SHARE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_fgadc_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_FGADC_PCHR_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_FGADC_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_gps_ap(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_GPS_AP_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_GPS_AP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_gps_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_GPS_MD_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_GPS_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_gps(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_GPS_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_GPS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_thr_md(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA1),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_THR_MD_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_THR_MD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_bat_plugin_pchr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA2),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_BAT_PLUGIN_PCHR_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_BAT_PLUGIN_PCHR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_batid(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA2),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_BATID_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_BATID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_pwron(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA2),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_PWRON_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_PWRON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_thr1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA2),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_THR1_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_THR1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_thr2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA2),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_THR2_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_THR2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_thr3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_STA2),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_THR3_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_THR3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_2_ANA_ID_MASK),
		(PMIC_AUXADC_DIG_2_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_2_DIG_ID_MASK),
		(PMIC_AUXADC_DIG_2_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_2_ANA_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_2_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_2_ANA_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_2_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_2_DIG_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_2_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_2_DIG_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_2_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_2_DSN_CBS_MASK),
		(PMIC_AUXADC_DIG_2_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_2_DSN_BIX_MASK),
		(PMIC_AUXADC_DIG_2_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_2_DSN_ESP_MASK),
		(PMIC_AUXADC_DIG_2_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_2_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_2_DSN_DXI),
		(&val),
		(PMIC_AUXADC_DIG_2_DSN_FPI_MASK),
		(PMIC_AUXADC_DIG_2_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_3_ANA_ID_MASK),
		(PMIC_AUXADC_DIG_3_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_3_DIG_ID_MASK),
		(PMIC_AUXADC_DIG_3_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_3_ANA_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_3_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_3_ANA_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_3_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_3_DIG_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_3_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_3_DIG_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_3_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_3_DSN_CBS_MASK),
		(PMIC_AUXADC_DIG_3_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_3_DSN_BIX_MASK),
		(PMIC_AUXADC_DIG_3_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_3_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_3_DSN_DXI),
		(&val),
		(PMIC_AUXADC_DIG_3_DSN_FPI_MASK),
		(PMIC_AUXADC_DIG_3_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_ck_on_extd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_CK_ON_EXTD_MASK),
		(PMIC_AUXADC_CK_ON_EXTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_srclken_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_SRCLKEN_SRC_SEL_MASK),
		(PMIC_AUXADC_SRCLKEN_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_pwdb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_ADC_PWDB_MASK),
		(PMIC_AUXADC_ADC_PWDB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_pwdb_swctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_ADC_PWDB_SWCTRL_MASK),
		(PMIC_AUXADC_ADC_PWDB_SWCTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_strup_ck_on_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_STRUP_CK_ON_ENB_MASK),
		(PMIC_AUXADC_STRUP_CK_ON_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_srclken_ck_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_SRCLKEN_CK_EN_MASK),
		(PMIC_AUXADC_SRCLKEN_CK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ck_aon_gps(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_CK_AON_GPS_MASK),
		(PMIC_AUXADC_CK_AON_GPS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ck_aon_md(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_CK_AON_MD_MASK),
		(PMIC_AUXADC_CK_AON_MD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ck_aon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON0),
		(val),
		(PMIC_AUXADC_CK_AON_MASK),
		(PMIC_AUXADC_CK_AON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_small(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON1),
		(val),
		(PMIC_AUXADC_AVG_NUM_SMALL_MASK),
		(PMIC_AUXADC_AVG_NUM_SMALL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_large(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON1),
		(val),
		(PMIC_AUXADC_AVG_NUM_LARGE_MASK),
		(PMIC_AUXADC_AVG_NUM_LARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON1),
		(val),
		(PMIC_AUXADC_SPL_NUM_MASK),
		(PMIC_AUXADC_SPL_NUM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON2),
		(val),
		(PMIC_AUXADC_AVG_NUM_SEL_MASK),
		(PMIC_AUXADC_AVG_NUM_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_sel_share(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON2),
		(val),
		(PMIC_AUXADC_AVG_NUM_SEL_SHARE_MASK),
		(PMIC_AUXADC_AVG_NUM_SEL_SHARE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_sel_lbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON2),
		(val),
		(PMIC_AUXADC_AVG_NUM_SEL_LBAT_MASK),
		(PMIC_AUXADC_AVG_NUM_SEL_LBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_sel_bat_temp(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON2),
		(val),
		(PMIC_AUXADC_AVG_NUM_SEL_BAT_TEMP_MASK),
		(PMIC_AUXADC_AVG_NUM_SEL_BAT_TEMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_sel_wakeup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON2),
		(val),
		(PMIC_AUXADC_AVG_NUM_SEL_WAKEUP_MASK),
		(PMIC_AUXADC_AVG_NUM_SEL_WAKEUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_large(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON3),
		(val),
		(PMIC_AUXADC_SPL_NUM_LARGE_MASK),
		(PMIC_AUXADC_SPL_NUM_LARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sleep(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON4),
		(val),
		(PMIC_AUXADC_SPL_NUM_SLEEP_MASK),
		(PMIC_AUXADC_SPL_NUM_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sleep_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON4),
		(val),
		(PMIC_AUXADC_SPL_NUM_SLEEP_SEL_MASK),
		(PMIC_AUXADC_SPL_NUM_SLEEP_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON5),
		(val),
		(PMIC_AUXADC_SPL_NUM_SEL_MASK),
		(PMIC_AUXADC_SPL_NUM_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sel_share(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON5),
		(val),
		(PMIC_AUXADC_SPL_NUM_SEL_SHARE_MASK),
		(PMIC_AUXADC_SPL_NUM_SEL_SHARE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sel_lbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON5),
		(val),
		(PMIC_AUXADC_SPL_NUM_SEL_LBAT_MASK),
		(PMIC_AUXADC_SPL_NUM_SEL_LBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sel_bat_temp(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON5),
		(val),
		(PMIC_AUXADC_SPL_NUM_SEL_BAT_TEMP_MASK),
		(PMIC_AUXADC_SPL_NUM_SEL_BAT_TEMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_sel_wakeup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON5),
		(val),
		(PMIC_AUXADC_SPL_NUM_SEL_WAKEUP_MASK),
		(PMIC_AUXADC_SPL_NUM_SEL_WAKEUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_ch0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON6),
		(val),
		(PMIC_AUXADC_SPL_NUM_CH0_MASK),
		(PMIC_AUXADC_SPL_NUM_CH0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_ch3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON7),
		(val),
		(PMIC_AUXADC_SPL_NUM_CH3_MASK),
		(PMIC_AUXADC_SPL_NUM_CH3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_spl_num_ch7(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON8),
		(val),
		(PMIC_AUXADC_SPL_NUM_CH7_MASK),
		(PMIC_AUXADC_SPL_NUM_CH7_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_lbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON9),
		(val),
		(PMIC_AUXADC_AVG_NUM_LBAT_MASK),
		(PMIC_AUXADC_AVG_NUM_LBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_ch7(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON9),
		(val),
		(PMIC_AUXADC_AVG_NUM_CH7_MASK),
		(PMIC_AUXADC_AVG_NUM_CH7_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_ch3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON9),
		(val),
		(PMIC_AUXADC_AVG_NUM_CH3_MASK),
		(PMIC_AUXADC_AVG_NUM_CH3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_ch0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON9),
		(val),
		(PMIC_AUXADC_AVG_NUM_CH0_MASK),
		(PMIC_AUXADC_AVG_NUM_CH0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_hpc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON10),
		(val),
		(PMIC_AUXADC_AVG_NUM_HPC_MASK),
		(PMIC_AUXADC_AVG_NUM_HPC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_dcxo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON10),
		(val),
		(PMIC_AUXADC_AVG_NUM_DCXO_MASK),
		(PMIC_AUXADC_AVG_NUM_DCXO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_ch7_wakeup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON10),
		(val),
		(PMIC_AUXADC_AVG_NUM_CH7_WAKEUP_MASK),
		(PMIC_AUXADC_AVG_NUM_CH7_WAKEUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_avg_num_btmp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON10),
		(val),
		(PMIC_AUXADC_AVG_NUM_BTMP_MASK),
		(PMIC_AUXADC_AVG_NUM_BTMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch0_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH0_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH0_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch1_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH1_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH1_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch2_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH2_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH2_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch3_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH3_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH3_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch4_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH4_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH4_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch5_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH5_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH5_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch6_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH6_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH6_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch7_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON11),
		(val),
		(PMIC_AUXADC_TRIM_CH7_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH7_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch8_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON12),
		(val),
		(PMIC_AUXADC_TRIM_CH8_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH8_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch9_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON12),
		(val),
		(PMIC_AUXADC_TRIM_CH9_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH9_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch10_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON12),
		(val),
		(PMIC_AUXADC_TRIM_CH10_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH10_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_trim_ch11_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON12),
		(val),
		(PMIC_AUXADC_TRIM_CH11_SEL_MASK),
		(PMIC_AUXADC_TRIM_CH11_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_2s_comp_enb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON12),
		(val),
		(PMIC_AUXADC_ADC_2S_COMP_ENB_MASK),
		(PMIC_AUXADC_ADC_2S_COMP_ENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_trim_comp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON12),
		(val),
		(PMIC_AUXADC_ADC_TRIM_COMP_MASK),
		(PMIC_AUXADC_ADC_TRIM_COMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_rng_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_RNG_EN_MASK),
		(PMIC_AUXADC_RNG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_test_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_TEST_MODE_MASK),
		(PMIC_AUXADC_TEST_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bit_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_BIT_SEL_MASK),
		(PMIC_AUXADC_BIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_start_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_START_SW_MASK),
		(PMIC_AUXADC_START_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_start_swctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_START_SWCTRL_MASK),
		(PMIC_AUXADC_START_SWCTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ts_vbe_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_TS_VBE_SEL_MASK),
		(PMIC_AUXADC_TS_VBE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ts_vbe_sel_swctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_TS_VBE_SEL_SWCTRL_MASK),
		(PMIC_AUXADC_TS_VBE_SEL_SWCTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_vbuf_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_VBUF_EN_MASK),
		(PMIC_AUXADC_VBUF_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_vbuf_en_swctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_VBUF_EN_SWCTRL_MASK),
		(PMIC_AUXADC_VBUF_EN_SWCTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_out_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON13),
		(val),
		(PMIC_AUXADC_OUT_SEL_MASK),
		(PMIC_AUXADC_OUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_da_dac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON14),
		(val),
		(PMIC_AUXADC_DA_DAC_MASK),
		(PMIC_AUXADC_DA_DAC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_da_dac_swctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON14),
		(val),
		(PMIC_AUXADC_DA_DAC_SWCTRL_MASK),
		(PMIC_AUXADC_DA_DAC_SWCTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_ad_auxadc_comp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_CON14),
		(&val),
		(PMIC_AD_AUXADC_COMP_MASK),
		(PMIC_AD_AUXADC_COMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_adcin_vsen_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_VSEN_EN_MASK),
		(PMIC_AUXADC_ADCIN_VSEN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adcin_vbat_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_VBAT_EN_MASK),
		(PMIC_AUXADC_ADCIN_VBAT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adcin_vsen_mux_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_VSEN_MUX_EN_MASK),
		(PMIC_AUXADC_ADCIN_VSEN_MUX_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adcin_vsen_ext_baton_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_VSEN_EXT_BATON_EN_MASK),
		(PMIC_AUXADC_ADCIN_VSEN_EXT_BATON_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adcin_chr_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_CHR_EN_MASK),
		(PMIC_AUXADC_ADCIN_CHR_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adcin_baton_tdet_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_BATON_TDET_EN_MASK),
		(PMIC_AUXADC_ADCIN_BATON_TDET_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_accdet_anaswctrl_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ACCDET_ANASWCTRL_EN_MASK),
		(PMIC_AUXADC_ACCDET_ANASWCTRL_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_xo_thadc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_XO_THADC_EN_MASK),
		(PMIC_AUXADC_XO_THADC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adcin_batid_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_ADCIN_BATID_SW_EN_MASK),
		(PMIC_AUXADC_ADCIN_BATID_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_vxo22_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_VXO22_EN_MASK),
		(PMIC_AUXADC_VXO22_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dig0_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_DIG0_RSV0_MASK),
		(PMIC_AUXADC_DIG0_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_chsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_CHSEL_MASK),
		(PMIC_AUXADC_CHSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_swctrl_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON15),
		(val),
		(PMIC_AUXADC_SWCTRL_EN_MASK),
		(PMIC_AUXADC_SWCTRL_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_source_lbat_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON16),
		(val),
		(PMIC_AUXADC_SOURCE_LBAT_SEL_MASK),
		(PMIC_AUXADC_SOURCE_LBAT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_source_lbat2_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON16),
		(val),
		(PMIC_AUXADC_SOURCE_LBAT2_SEL_MASK),
		(PMIC_AUXADC_SOURCE_LBAT2_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_start_extd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON16),
		(val),
		(PMIC_AUXADC_START_EXTD_MASK),
		(PMIC_AUXADC_START_EXTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dac_extd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON16),
		(val),
		(PMIC_AUXADC_DAC_EXTD_MASK),
		(PMIC_AUXADC_DAC_EXTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dac_extd_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON16),
		(val),
		(PMIC_AUXADC_DAC_EXTD_EN_MASK),
		(PMIC_AUXADC_DAC_EXTD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dig0_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON17),
		(val),
		(PMIC_AUXADC_DIG0_RSV1_MASK),
		(PMIC_AUXADC_DIG0_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_start_shade_num(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON18),
		(val),
		(PMIC_AUXADC_START_SHADE_NUM_MASK),
		(PMIC_AUXADC_START_SHADE_NUM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_start_shade_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON18),
		(val),
		(PMIC_AUXADC_START_SHADE_EN_MASK),
		(PMIC_AUXADC_START_SHADE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_start_shade_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON18),
		(val),
		(PMIC_AUXADC_START_SHADE_SEL_MASK),
		(PMIC_AUXADC_START_SHADE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_rdy_wakeup_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON19),
		(val),
		(PMIC_AUXADC_ADC_RDY_WAKEUP_CLR_MASK),
		(PMIC_AUXADC_ADC_RDY_WAKEUP_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_rdy_fgadc_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON19),
		(val),
		(PMIC_AUXADC_ADC_RDY_FGADC_CLR_MASK),
		(PMIC_AUXADC_ADC_RDY_FGADC_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_rdy_bat_plugin_clr(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON19),
		(val),
		(PMIC_AUXADC_ADC_RDY_BAT_PLUGIN_CLR_MASK),
		(PMIC_AUXADC_ADC_RDY_BAT_PLUGIN_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_adc_rdy_pwron_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON19),
		(val),
		(PMIC_AUXADC_ADC_RDY_PWRON_CLR_MASK),
		(PMIC_AUXADC_ADC_RDY_PWRON_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_data_reuse_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_DATA_REUSE_SEL_MASK),
		(PMIC_AUXADC_DATA_REUSE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ch0_data_reuse_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_CH0_DATA_REUSE_SEL_MASK),
		(PMIC_AUXADC_CH0_DATA_REUSE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ch1_data_reuse_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_CH1_DATA_REUSE_SEL_MASK),
		(PMIC_AUXADC_CH1_DATA_REUSE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_data_reuse_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_DCXO_DATA_REUSE_SEL_MASK),
		(PMIC_AUXADC_DCXO_DATA_REUSE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_data_reuse_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_DATA_REUSE_EN_MASK),
		(PMIC_AUXADC_DATA_REUSE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ch0_data_reuse_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_CH0_DATA_REUSE_EN_MASK),
		(PMIC_AUXADC_CH0_DATA_REUSE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_ch1_data_reuse_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_CH1_DATA_REUSE_EN_MASK),
		(PMIC_AUXADC_CH1_DATA_REUSE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_data_reuse_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_CON20),
		(val),
		(PMIC_AUXADC_DCXO_DATA_REUSE_EN_MASK),
		(PMIC_AUXADC_DCXO_DATA_REUSE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_state_cs_s(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_CON21),
		(&val),
		(PMIC_AUXADC_STATE_CS_S_MASK),
		(PMIC_AUXADC_STATE_CS_S_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_autorpt_prd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_AUTORPT0),
		(val),
		(PMIC_AUXADC_AUTORPT_PRD_MASK),
		(PMIC_AUXADC_AUTORPT_PRD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_autorpt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_AUTORPT0),
		(val),
		(PMIC_AUXADC_AUTORPT_EN_MASK),
		(PMIC_AUXADC_AUTORPT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_accdet_auto_spl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ACCDET),
		(val),
		(PMIC_AUXADC_ACCDET_AUTO_SPL_MASK),
		(PMIC_AUXADC_ACCDET_AUTO_SPL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_accdet_auto_rqst_clr(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ACCDET),
		(val),
		(PMIC_AUXADC_ACCDET_AUTO_RQST_CLR_MASK),
		(PMIC_AUXADC_ACCDET_AUTO_RQST_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_accdet_dig1_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ACCDET),
		(val),
		(PMIC_AUXADC_ACCDET_DIG1_RSV0_MASK),
		(PMIC_AUXADC_ACCDET_DIG1_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_accdet_dig0_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_ACCDET),
		(val),
		(PMIC_AUXADC_ACCDET_DIG0_RSV0_MASK),
		(PMIC_AUXADC_ACCDET_DIG0_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_fgadc_start_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_FGADC_START_SW_MASK),
		(PMIC_AUXADC_FGADC_START_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_fgadc_start_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_FGADC_START_SEL_MASK),
		(PMIC_AUXADC_FGADC_START_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_imp_fgadc_r_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_IMP_FGADC_R_SW_MASK),
		(PMIC_AUXADC_IMP_FGADC_R_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_imp_fgadc_r_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_IMP_FGADC_R_SEL_MASK),
		(PMIC_AUXADC_IMP_FGADC_R_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_plugin_start_sw(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_BAT_PLUGIN_START_SW_MASK),
		(PMIC_AUXADC_BAT_PLUGIN_START_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_plugin_start_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_BAT_PLUGIN_START_SEL_MASK),
		(PMIC_AUXADC_BAT_PLUGIN_START_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dbg_dig0_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_DBG_DIG0_RSV2_MASK),
		(PMIC_AUXADC_DBG_DIG0_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dbg_dig1_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DBG0),
		(val),
		(PMIC_AUXADC_DBG_DIG1_RSV2_MASK),
		(PMIC_AUXADC_DBG_DIG1_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_0),
		(val),
		(PMIC_AUXADC_NAG_EN_MASK),
		(PMIC_AUXADC_NAG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_0),
		(val),
		(PMIC_AUXADC_NAG_CLR_MASK),
		(PMIC_AUXADC_NAG_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_vbat1_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_0),
		(val),
		(PMIC_AUXADC_NAG_VBAT1_SEL_MASK),
		(PMIC_AUXADC_NAG_VBAT1_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_prd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_0),
		(val),
		(PMIC_AUXADC_NAG_PRD_SEL_MASK),
		(PMIC_AUXADC_NAG_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_irq_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_0),
		(val),
		(PMIC_AUXADC_NAG_IRQ_EN_MASK),
		(PMIC_AUXADC_NAG_IRQ_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_nag_c_dltv_irq(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_0),
		(&val),
		(PMIC_AUXADC_NAG_C_DLTV_IRQ_MASK),
		(PMIC_AUXADC_NAG_C_DLTV_IRQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_nag_zcv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_1),
		(val),
		(PMIC_AUXADC_NAG_ZCV_MASK),
		(PMIC_AUXADC_NAG_ZCV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_c_dltv_th_15_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_2),
		(val),
		(PMIC_AUXADC_NAG_C_DLTV_TH_15_0_MASK),
		(PMIC_AUXADC_NAG_C_DLTV_TH_15_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_c_dltv_th_26_16(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_3),
		(val),
		(PMIC_AUXADC_NAG_C_DLTV_TH_26_16_MASK),
		(PMIC_AUXADC_NAG_C_DLTV_TH_26_16_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_nag_cnt_15_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_4),
		(&val),
		(PMIC_AUXADC_NAG_CNT_15_0_MASK),
		(PMIC_AUXADC_NAG_CNT_15_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_nag_cnt_25_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_5),
		(&val),
		(PMIC_AUXADC_NAG_CNT_25_16_MASK),
		(PMIC_AUXADC_NAG_CNT_25_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_nag_dltv(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_6),
		(&val),
		(PMIC_AUXADC_NAG_DLTV_MASK),
		(PMIC_AUXADC_NAG_DLTV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_nag_c_dltv_15_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_7),
		(&val),
		(PMIC_AUXADC_NAG_C_DLTV_15_0_MASK),
		(PMIC_AUXADC_NAG_C_DLTV_15_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_nag_c_dltv_26_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_8),
		(&val),
		(PMIC_AUXADC_NAG_C_DLTV_26_16_MASK),
		(PMIC_AUXADC_NAG_C_DLTV_26_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_nag_auxadc_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_9),
		(&val),
		(PMIC_AUXADC_NAG_AUXADC_START_MASK),
		(PMIC_AUXADC_NAG_AUXADC_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_nag_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_9),
		(&val),
		(PMIC_AUXADC_NAG_STATE_MASK),
		(PMIC_AUXADC_NAG_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_nag(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_10),
		(&val),
		(PMIC_AUXADC_ADC_OUT_NAG_MASK),
		(PMIC_AUXADC_ADC_OUT_NAG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_nag(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_10),
		(&val),
		(PMIC_AUXADC_ADC_RDY_NAG_MASK),
		(PMIC_AUXADC_ADC_RDY_NAG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_nag_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_11),
		(val),
		(PMIC_AUXADC_NAG_CK_SW_EN_MASK),
		(PMIC_AUXADC_NAG_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_nag_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_NAG_11),
		(val),
		(PMIC_AUXADC_NAG_CK_SW_MODE_MASK),
		(PMIC_AUXADC_NAG_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_nag(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_NAG_11),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_NAG_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_NAG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_efuse_gain_ch7_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR0),
		(val),
		(PMIC_EFUSE_GAIN_CH7_TRIM_MASK),
		(PMIC_EFUSE_GAIN_CH7_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_efuse_offset_ch7_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR1),
		(val),
		(PMIC_EFUSE_OFFSET_CH7_TRIM_MASK),
		(PMIC_EFUSE_OFFSET_CH7_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_efuse_gain_ch4_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR2),
		(val),
		(PMIC_EFUSE_GAIN_CH4_TRIM_MASK),
		(PMIC_EFUSE_GAIN_CH4_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_efuse_offset_ch4_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR3),
		(val),
		(PMIC_EFUSE_OFFSET_CH4_TRIM_MASK),
		(PMIC_EFUSE_OFFSET_CH4_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_efuse_gain_ch0_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR4),
		(val),
		(PMIC_EFUSE_GAIN_CH0_TRIM_MASK),
		(PMIC_EFUSE_GAIN_CH0_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_efuse_offset_ch0_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR5),
		(val),
		(PMIC_EFUSE_OFFSET_CH0_TRIM_MASK),
		(PMIC_EFUSE_OFFSET_CH0_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_sw_gain_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR6),
		(val),
		(PMIC_AUXADC_SW_GAIN_TRIM_MASK),
		(PMIC_AUXADC_SW_GAIN_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_sw_offset_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR7),
		(val),
		(PMIC_AUXADC_SW_OFFSET_TRIM_MASK),
		(PMIC_AUXADC_SW_OFFSET_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_id(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR8),
		(val),
		(PMIC_AUXADC_EFUSE_ID_MASK),
		(PMIC_AUXADC_EFUSE_ID_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_o_slope(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR8),
		(val),
		(PMIC_AUXADC_EFUSE_O_SLOPE_MASK),
		(PMIC_AUXADC_EFUSE_O_SLOPE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_o_slope_sign(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR8),
		(val),
		(PMIC_AUXADC_EFUSE_O_SLOPE_SIGN_MASK),
		(PMIC_AUXADC_EFUSE_O_SLOPE_SIGN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_degc_cali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR8),
		(val),
		(PMIC_AUXADC_EFUSE_DEGC_CALI_MASK),
		(PMIC_AUXADC_EFUSE_DEGC_CALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_adc_cali_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR8),
		(val),
		(PMIC_AUXADC_EFUSE_ADC_CALI_EN_MASK),
		(PMIC_AUXADC_EFUSE_ADC_CALI_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR8),
		(val),
		(PMIC_AUXADC_EFUSE_RSV0_MASK),
		(PMIC_AUXADC_EFUSE_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_o_vts(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR9),
		(val),
		(PMIC_AUXADC_EFUSE_O_VTS_MASK),
		(PMIC_AUXADC_EFUSE_O_VTS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR9),
		(val),
		(PMIC_AUXADC_EFUSE_RSV1_MASK),
		(PMIC_AUXADC_EFUSE_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_o_vts_2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR10),
		(val),
		(PMIC_AUXADC_EFUSE_O_VTS_2_MASK),
		(PMIC_AUXADC_EFUSE_O_VTS_2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR10),
		(val),
		(PMIC_AUXADC_EFUSE_RSV2_MASK),
		(PMIC_AUXADC_EFUSE_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_o_vts_3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR11),
		(val),
		(PMIC_AUXADC_EFUSE_O_VTS_3_MASK),
		(PMIC_AUXADC_EFUSE_O_VTS_3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR11),
		(val),
		(PMIC_AUXADC_EFUSE_RSV3_MASK),
		(PMIC_AUXADC_EFUSE_RSV3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_o_vts_4(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR12),
		(val),
		(PMIC_AUXADC_EFUSE_O_VTS_4_MASK),
		(PMIC_AUXADC_EFUSE_O_VTS_4_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv4(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR12),
		(val),
		(PMIC_AUXADC_EFUSE_RSV4_MASK),
		(PMIC_AUXADC_EFUSE_RSV4_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_gain_aux(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR13),
		(val),
		(PMIC_AUXADC_EFUSE_GAIN_AUX_MASK),
		(PMIC_AUXADC_EFUSE_GAIN_AUX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv5(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR13),
		(val),
		(PMIC_AUXADC_EFUSE_RSV5_MASK),
		(PMIC_AUXADC_EFUSE_RSV5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_gain_bgrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR14),
		(val),
		(PMIC_AUXADC_EFUSE_GAIN_BGRL_MASK),
		(PMIC_AUXADC_EFUSE_GAIN_BGRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_gain_bgrh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR14),
		(val),
		(PMIC_AUXADC_EFUSE_GAIN_BGRH_MASK),
		(PMIC_AUXADC_EFUSE_GAIN_BGRH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv6(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR14),
		(val),
		(PMIC_AUXADC_EFUSE_RSV6_MASK),
		(PMIC_AUXADC_EFUSE_RSV6_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_cali_from_efuse_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_CALI_FROM_EFUSE_EN_MASK),
		(PMIC_AUXADC_EFUSE_CALI_FROM_EFUSE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_adc_bgrcali_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_ADC_BGRCALI_EN_MASK),
		(PMIC_AUXADC_EFUSE_ADC_BGRCALI_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_adc_auxcali_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_ADC_AUXCALI_EN_MASK),
		(PMIC_AUXADC_EFUSE_ADC_AUXCALI_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_trmpl_cali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_TRMPL_CALI_MASK),
		(PMIC_AUXADC_EFUSE_TRMPL_CALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_trmph_cali(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_TRMPH_CALI_MASK),
		(PMIC_AUXADC_EFUSE_TRMPH_CALI_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_sign_bgrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_SIGN_BGRL_MASK),
		(PMIC_AUXADC_EFUSE_SIGN_BGRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_sign_bgrh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_SIGN_BGRH_MASK),
		(PMIC_AUXADC_EFUSE_SIGN_BGRH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_sign_aux(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_SIGN_AUX_MASK),
		(PMIC_AUXADC_EFUSE_SIGN_AUX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_rsv7(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR15),
		(val),
		(PMIC_AUXADC_EFUSE_RSV7_MASK),
		(PMIC_AUXADC_EFUSE_RSV7_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_vbg12(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR16),
		(val),
		(PMIC_AUXADC_EFUSE_VBG12_MASK),
		(PMIC_AUXADC_EFUSE_VBG12_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_efuse_vaux18(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DIG_3_ELR16),
		(val),
		(PMIC_AUXADC_EFUSE_VAUX18_MASK),
		(PMIC_AUXADC_EFUSE_VAUX18_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_4_ANA_ID_MASK),
		(PMIC_AUXADC_DIG_4_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_ID),
		(&val),
		(PMIC_AUXADC_DIG_4_DIG_ID_MASK),
		(PMIC_AUXADC_DIG_4_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_4_ANA_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_4_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_4_ANA_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_4_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_4_DIG_MINOR_REV_MASK),
		(PMIC_AUXADC_DIG_4_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_REV0),
		(&val),
		(PMIC_AUXADC_DIG_4_DIG_MAJOR_REV_MASK),
		(PMIC_AUXADC_DIG_4_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dsn_cbs(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_4_DSN_CBS_MASK),
		(PMIC_AUXADC_DIG_4_DSN_CBS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dsn_bix(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_4_DSN_BIX_MASK),
		(PMIC_AUXADC_DIG_4_DSN_BIX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dsn_esp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_DBI),
		(&val),
		(PMIC_AUXADC_DIG_4_DSN_ESP_MASK),
		(PMIC_AUXADC_DIG_4_DSN_ESP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_dig_4_dsn_fpi(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DIG_4_DSN_DXI),
		(&val),
		(PMIC_AUXADC_DIG_4_DSN_FPI_MASK),
		(PMIC_AUXADC_DIG_4_DSN_FPI_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_imp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_IMP0),
		(val),
		(PMIC_AUXADC_IMP_EN_MASK),
		(PMIC_AUXADC_IMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_imp_prd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_IMP1),
		(val),
		(PMIC_AUXADC_IMP_PRD_SEL_MASK),
		(PMIC_AUXADC_IMP_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_imp_cnt_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_IMP1),
		(val),
		(PMIC_AUXADC_IMP_CNT_SEL_MASK),
		(PMIC_AUXADC_IMP_CNT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_impedance_chsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_IMP1),
		(val),
		(PMIC_AUXADC_IMPEDANCE_CHSEL_MASK),
		(PMIC_AUXADC_IMPEDANCE_CHSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_impedance_irq_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP1),
		(&val),
		(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS_MASK),
		(PMIC_AUXADC_IMPEDANCE_IRQ_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_imp_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP2),
		(&val),
		(PMIC_AUXADC_IMP_START_MASK),
		(PMIC_AUXADC_IMP_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_imp_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP2),
		(&val),
		(PMIC_AUXADC_IMP_STATE_MASK),
		(PMIC_AUXADC_IMP_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_imp_count(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP2),
		(&val),
		(PMIC_AUXADC_IMP_COUNT_MASK),
		(PMIC_AUXADC_IMP_COUNT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_imp_fgadc_r_s(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP2),
		(&val),
		(PMIC_AUXADC_IMP_FGADC_R_S_MASK),
		(PMIC_AUXADC_IMP_FGADC_R_S_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_fgadc_auxadc_imp_r_done_s(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP2),
		(&val),
		(PMIC_FGADC_AUXADC_IMP_R_DONE_S_MASK),
		(PMIC_FGADC_AUXADC_IMP_R_DONE_S_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_imp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP3),
		(&val),
		(PMIC_AUXADC_ADC_OUT_IMP_MASK),
		(PMIC_AUXADC_ADC_OUT_IMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_imp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP3),
		(&val),
		(PMIC_AUXADC_ADC_RDY_IMP_MASK),
		(PMIC_AUXADC_ADC_RDY_IMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_imp_avg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP4),
		(&val),
		(PMIC_AUXADC_ADC_OUT_IMP_AVG_MASK),
		(PMIC_AUXADC_ADC_OUT_IMP_AVG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_imp_avg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP4),
		(&val),
		(PMIC_AUXADC_ADC_RDY_IMP_AVG_MASK),
		(PMIC_AUXADC_ADC_RDY_IMP_AVG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_imp_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_IMP5),
		(val),
		(PMIC_AUXADC_IMP_CK_SW_EN_MASK),
		(PMIC_AUXADC_IMP_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_imp_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_IMP5),
		(val),
		(PMIC_AUXADC_IMP_CK_SW_MODE_MASK),
		(PMIC_AUXADC_IMP_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_imp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_IMP5),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_IMP_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_IMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_lbat_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT0),
		(val),
		(PMIC_AUXADC_LBAT_EN_MASK),
		(PMIC_AUXADC_LBAT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_det_prd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT1),
		(val),
		(PMIC_AUXADC_LBAT_DET_PRD_SEL_MASK),
		(PMIC_AUXADC_LBAT_DET_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_debt_max_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT1),
		(val),
		(PMIC_AUXADC_LBAT_DEBT_MAX_SEL_MASK),
		(PMIC_AUXADC_LBAT_DEBT_MAX_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_debt_min_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT1),
		(val),
		(PMIC_AUXADC_LBAT_DEBT_MIN_SEL_MASK),
		(PMIC_AUXADC_LBAT_DEBT_MIN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_volt_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2),
		(val),
		(PMIC_AUXADC_LBAT_VOLT_MAX_MASK),
		(PMIC_AUXADC_LBAT_VOLT_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_irq_en_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2),
		(val),
		(PMIC_AUXADC_LBAT_IRQ_EN_MAX_MASK),
		(PMIC_AUXADC_LBAT_IRQ_EN_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_det_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2),
		(val),
		(PMIC_AUXADC_LBAT_DET_MAX_MASK),
		(PMIC_AUXADC_LBAT_DET_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_lbat_max_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2),
		(&val),
		(PMIC_AUXADC_LBAT_MAX_IRQ_B_MASK),
		(PMIC_AUXADC_LBAT_MAX_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_lbat_volt_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT3),
		(val),
		(PMIC_AUXADC_LBAT_VOLT_MIN_MASK),
		(PMIC_AUXADC_LBAT_VOLT_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_irq_en_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT3),
		(val),
		(PMIC_AUXADC_LBAT_IRQ_EN_MIN_MASK),
		(PMIC_AUXADC_LBAT_IRQ_EN_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_det_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT3),
		(val),
		(PMIC_AUXADC_LBAT_DET_MIN_MASK),
		(PMIC_AUXADC_LBAT_DET_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_lbat_min_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT3),
		(&val),
		(PMIC_AUXADC_LBAT_MIN_IRQ_B_MASK),
		(PMIC_AUXADC_LBAT_MIN_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat_debounce_count_max(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT4),
		(&val),
		(PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX_MASK),
		(PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat_debounce_count_min(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT5),
		(&val),
		(PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN_MASK),
		(PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT6),
		(&val),
		(PMIC_AUXADC_LBAT_STATE_MASK),
		(PMIC_AUXADC_LBAT_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat_auxadc_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT6),
		(&val),
		(PMIC_AUXADC_LBAT_AUXADC_START_MASK),
		(PMIC_AUXADC_LBAT_AUXADC_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_lbat(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT7),
		(&val),
		(PMIC_AUXADC_ADC_OUT_LBAT_MASK),
		(PMIC_AUXADC_ADC_OUT_LBAT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_lbat(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT7),
		(&val),
		(PMIC_AUXADC_ADC_RDY_LBAT_MASK),
		(PMIC_AUXADC_ADC_RDY_LBAT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_lbat_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT8),
		(val),
		(PMIC_AUXADC_LBAT_CK_SW_EN_MASK),
		(PMIC_AUXADC_LBAT_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT8),
		(val),
		(PMIC_AUXADC_LBAT_CK_SW_MODE_MASK),
		(PMIC_AUXADC_LBAT_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_lbat(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT8),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_LBAT_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_LBAT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_0),
		(val),
		(PMIC_AUXADC_BAT_TEMP_EN_MASK),
		(PMIC_AUXADC_BAT_TEMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_froze_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_1),
		(val),
		(PMIC_AUXADC_BAT_TEMP_FROZE_EN_MASK),
		(PMIC_AUXADC_BAT_TEMP_FROZE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_det_prd_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_2),
		(val),
		(PMIC_AUXADC_BAT_TEMP_DET_PRD_SEL_MASK),
		(PMIC_AUXADC_BAT_TEMP_DET_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_debt_max_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_2),
		(val),
		(PMIC_AUXADC_BAT_TEMP_DEBT_MAX_SEL_MASK),
		(PMIC_AUXADC_BAT_TEMP_DEBT_MAX_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_debt_min_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_2),
		(val),
		(PMIC_AUXADC_BAT_TEMP_DEBT_MIN_SEL_MASK),
		(PMIC_AUXADC_BAT_TEMP_DEBT_MIN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_volt_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_3),
		(val),
		(PMIC_AUXADC_BAT_TEMP_VOLT_MAX_MASK),
		(PMIC_AUXADC_BAT_TEMP_VOLT_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_irq_en_max(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_3),
		(val),
		(PMIC_AUXADC_BAT_TEMP_IRQ_EN_MAX_MASK),
		(PMIC_AUXADC_BAT_TEMP_IRQ_EN_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_det_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_3),
		(val),
		(PMIC_AUXADC_BAT_TEMP_DET_MAX_MASK),
		(PMIC_AUXADC_BAT_TEMP_DET_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_bat_temp_max_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_3),
		(&val),
		(PMIC_AUXADC_BAT_TEMP_MAX_IRQ_B_MASK),
		(PMIC_AUXADC_BAT_TEMP_MAX_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_volt_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_4),
		(val),
		(PMIC_AUXADC_BAT_TEMP_VOLT_MIN_MASK),
		(PMIC_AUXADC_BAT_TEMP_VOLT_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_irq_en_min(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_4),
		(val),
		(PMIC_AUXADC_BAT_TEMP_IRQ_EN_MIN_MASK),
		(PMIC_AUXADC_BAT_TEMP_IRQ_EN_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_det_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_4),
		(val),
		(PMIC_AUXADC_BAT_TEMP_DET_MIN_MASK),
		(PMIC_AUXADC_BAT_TEMP_DET_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_bat_temp_min_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_4),
		(&val),
		(PMIC_AUXADC_BAT_TEMP_MIN_IRQ_B_MASK),
		(PMIC_AUXADC_BAT_TEMP_MIN_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_bat_temp_debounce_count_max(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_5),
		(&val),
		(PMIC_AUXADC_BAT_TEMP_DEBOUNCE_COUNT_MAX_MASK),
		(PMIC_AUXADC_BAT_TEMP_DEBOUNCE_COUNT_MAX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_bat_temp_debounce_count_min(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_6),
		(&val),
		(PMIC_AUXADC_BAT_TEMP_DEBOUNCE_COUNT_MIN_MASK),
		(PMIC_AUXADC_BAT_TEMP_DEBOUNCE_COUNT_MIN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_bat_temp_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_7),
		(&val),
		(PMIC_AUXADC_BAT_TEMP_STATE_MASK),
		(PMIC_AUXADC_BAT_TEMP_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_bat_temp_auxadc_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_7),
		(&val),
		(PMIC_AUXADC_BAT_TEMP_AUXADC_START_MASK),
		(PMIC_AUXADC_BAT_TEMP_AUXADC_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_bat_temp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_8),
		(&val),
		(PMIC_AUXADC_ADC_OUT_BAT_TEMP_MASK),
		(PMIC_AUXADC_ADC_OUT_BAT_TEMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_bat_temp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_8),
		(&val),
		(PMIC_AUXADC_ADC_RDY_BAT_TEMP_MASK),
		(PMIC_AUXADC_ADC_RDY_BAT_TEMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_9),
		(val),
		(PMIC_AUXADC_BAT_TEMP_CK_SW_EN_MASK),
		(PMIC_AUXADC_BAT_TEMP_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_bat_temp_ck_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_BAT_TEMP_9),
		(val),
		(PMIC_AUXADC_BAT_TEMP_CK_SW_MODE_MASK),
		(PMIC_AUXADC_BAT_TEMP_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_bat_temp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_BAT_TEMP_9),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_BAT_TEMP_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_BAT_TEMP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_0),
		(val),
		(PMIC_AUXADC_LBAT2_EN_MASK),
		(PMIC_AUXADC_LBAT2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_det_prd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_1),
		(val),
		(PMIC_AUXADC_LBAT2_DET_PRD_SEL_MASK),
		(PMIC_AUXADC_LBAT2_DET_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_debt_max_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_1),
		(val),
		(PMIC_AUXADC_LBAT2_DEBT_MAX_SEL_MASK),
		(PMIC_AUXADC_LBAT2_DEBT_MAX_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_debt_min_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_1),
		(val),
		(PMIC_AUXADC_LBAT2_DEBT_MIN_SEL_MASK),
		(PMIC_AUXADC_LBAT2_DEBT_MIN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_volt_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_2),
		(val),
		(PMIC_AUXADC_LBAT2_VOLT_MAX_MASK),
		(PMIC_AUXADC_LBAT2_VOLT_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_irq_en_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_2),
		(val),
		(PMIC_AUXADC_LBAT2_IRQ_EN_MAX_MASK),
		(PMIC_AUXADC_LBAT2_IRQ_EN_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_det_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_2),
		(val),
		(PMIC_AUXADC_LBAT2_DET_MAX_MASK),
		(PMIC_AUXADC_LBAT2_DET_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_lbat2_max_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_2),
		(&val),
		(PMIC_AUXADC_LBAT2_MAX_IRQ_B_MASK),
		(PMIC_AUXADC_LBAT2_MAX_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_volt_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_3),
		(val),
		(PMIC_AUXADC_LBAT2_VOLT_MIN_MASK),
		(PMIC_AUXADC_LBAT2_VOLT_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_irq_en_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_3),
		(val),
		(PMIC_AUXADC_LBAT2_IRQ_EN_MIN_MASK),
		(PMIC_AUXADC_LBAT2_IRQ_EN_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_det_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_3),
		(val),
		(PMIC_AUXADC_LBAT2_DET_MIN_MASK),
		(PMIC_AUXADC_LBAT2_DET_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_lbat2_min_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_3),
		(&val),
		(PMIC_AUXADC_LBAT2_MIN_IRQ_B_MASK),
		(PMIC_AUXADC_LBAT2_MIN_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat2_debounce_count_max(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_4),
		(&val),
		(PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MAX_MASK),
		(PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MAX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat2_debounce_count_min(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_5),
		(&val),
		(PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MIN_MASK),
		(PMIC_AUXADC_LBAT2_DEBOUNCE_COUNT_MIN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat2_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_6),
		(&val),
		(PMIC_AUXADC_LBAT2_STATE_MASK),
		(PMIC_AUXADC_LBAT2_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_lbat2_auxadc_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_6),
		(&val),
		(PMIC_AUXADC_LBAT2_AUXADC_START_MASK),
		(PMIC_AUXADC_LBAT2_AUXADC_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_lbat2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_7),
		(&val),
		(PMIC_AUXADC_ADC_OUT_LBAT2_MASK),
		(PMIC_AUXADC_ADC_OUT_LBAT2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_lbat2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_7),
		(&val),
		(PMIC_AUXADC_ADC_RDY_LBAT2_MASK),
		(PMIC_AUXADC_ADC_RDY_LBAT2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_8),
		(val),
		(PMIC_AUXADC_LBAT2_CK_SW_EN_MASK),
		(PMIC_AUXADC_LBAT2_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_lbat2_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_LBAT2_8),
		(val),
		(PMIC_AUXADC_LBAT2_CK_SW_MODE_MASK),
		(PMIC_AUXADC_LBAT2_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_lbat2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_LBAT2_8),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_LBAT2_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_LBAT2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_thr_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR0),
		(val),
		(PMIC_AUXADC_THR_EN_MASK),
		(PMIC_AUXADC_THR_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_det_prd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR1),
		(val),
		(PMIC_AUXADC_THR_DET_PRD_SEL_MASK),
		(PMIC_AUXADC_THR_DET_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_debt_max_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR1),
		(val),
		(PMIC_AUXADC_THR_DEBT_MAX_SEL_MASK),
		(PMIC_AUXADC_THR_DEBT_MAX_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_debt_min_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR1),
		(val),
		(PMIC_AUXADC_THR_DEBT_MIN_SEL_MASK),
		(PMIC_AUXADC_THR_DEBT_MIN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_volt_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR2),
		(val),
		(PMIC_AUXADC_THR_VOLT_MAX_MASK),
		(PMIC_AUXADC_THR_VOLT_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_irq_en_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR2),
		(val),
		(PMIC_AUXADC_THR_IRQ_EN_MAX_MASK),
		(PMIC_AUXADC_THR_IRQ_EN_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_det_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR2),
		(val),
		(PMIC_AUXADC_THR_DET_MAX_MASK),
		(PMIC_AUXADC_THR_DET_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_thr_max_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR2),
		(&val),
		(PMIC_AUXADC_THR_MAX_IRQ_B_MASK),
		(PMIC_AUXADC_THR_MAX_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_thr_volt_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR3),
		(val),
		(PMIC_AUXADC_THR_VOLT_MIN_MASK),
		(PMIC_AUXADC_THR_VOLT_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_irq_en_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR3),
		(val),
		(PMIC_AUXADC_THR_IRQ_EN_MIN_MASK),
		(PMIC_AUXADC_THR_IRQ_EN_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_det_min(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR3),
		(val),
		(PMIC_AUXADC_THR_DET_MIN_MASK),
		(PMIC_AUXADC_THR_DET_MIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_thr_min_irq_b(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR3),
		(&val),
		(PMIC_AUXADC_THR_MIN_IRQ_B_MASK),
		(PMIC_AUXADC_THR_MIN_IRQ_B_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_thr_debounce_count_max(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR4),
		(&val),
		(PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX_MASK),
		(PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_thr_debounce_count_min(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR5),
		(&val),
		(PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN_MASK),
		(PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_thr_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR6),
		(&val),
		(PMIC_AUXADC_THR_STATE_MASK),
		(PMIC_AUXADC_THR_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_thr_auxadc_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR6),
		(&val),
		(PMIC_AUXADC_THR_AUXADC_START_MASK),
		(PMIC_AUXADC_THR_AUXADC_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_thr_hw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR7),
		(&val),
		(PMIC_AUXADC_ADC_OUT_THR_HW_MASK),
		(PMIC_AUXADC_ADC_OUT_THR_HW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_thr_hw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR7),
		(&val),
		(PMIC_AUXADC_ADC_RDY_THR_HW_MASK),
		(PMIC_AUXADC_ADC_RDY_THR_HW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_thr_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR8),
		(val),
		(PMIC_AUXADC_THR_CK_SW_EN_MASK),
		(PMIC_AUXADC_THR_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_thr_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_THR8),
		(val),
		(PMIC_AUXADC_THR_CK_SW_MODE_MASK),
		(PMIC_AUXADC_THR_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_thr_hw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_THR8),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_THR_HW_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_THR_HW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_prd_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_0),
		(val),
		(PMIC_AUXADC_MDRT_DET_PRD_SEL_MASK),
		(PMIC_AUXADC_MDRT_DET_PRD_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_0),
		(val),
		(PMIC_AUXADC_MDRT_DET_EN_MASK),
		(PMIC_AUXADC_MDRT_DET_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_wkup_start_cnt(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_1),
		(val),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_CNT_MASK),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_CNT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_wkup_start_clr(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_1),
		(val),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_CLR_MASK),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_wkup_start(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_2),
		(val),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_MASK),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_wkup_start_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_2),
		(val),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_SEL_MASK),
		(PMIC_AUXADC_MDRT_DET_WKUP_START_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_wkup_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_2),
		(val),
		(PMIC_AUXADC_MDRT_DET_WKUP_EN_MASK),
		(PMIC_AUXADC_MDRT_DET_WKUP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_det_srclken_ind(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_2),
		(val),
		(PMIC_AUXADC_MDRT_DET_SRCLKEN_IND_MASK),
		(PMIC_AUXADC_MDRT_DET_SRCLKEN_IND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_mdrt_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_MDRT_3),
		(&val),
		(PMIC_AUXADC_MDRT_STATE_MASK),
		(PMIC_AUXADC_MDRT_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_mdrt_start(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_MDRT_3),
		(&val),
		(PMIC_AUXADC_MDRT_START_MASK),
		(PMIC_AUXADC_MDRT_START_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_mdrt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_MDRT_4),
		(&val),
		(PMIC_AUXADC_ADC_OUT_MDRT_MASK),
		(PMIC_AUXADC_ADC_OUT_MDRT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_mdrt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_MDRT_4),
		(&val),
		(PMIC_AUXADC_ADC_RDY_MDRT_MASK),
		(PMIC_AUXADC_ADC_RDY_MDRT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_5),
		(val),
		(PMIC_AUXADC_MDRT_CK_SW_EN_MASK),
		(PMIC_AUXADC_MDRT_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_mdrt_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_MDRT_5),
		(val),
		(PMIC_AUXADC_MDRT_CK_SW_MODE_MASK),
		(PMIC_AUXADC_MDRT_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_mdrt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_MDRT_5),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_MDRT_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_MDRT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_mdrt_det_wkup_start_cnt(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DCXO_MDRT_1),
		(val),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CNT_MASK),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CNT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_mdrt_det_wkup_start_clr(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DCXO_MDRT_1),
		(val),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CLR_MASK),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_mdrt_det_wkup_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DCXO_MDRT_2),
		(val),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_EN_MASK),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_mdrt_det_wkup_start_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DCXO_MDRT_2),
		(val),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SEL_MASK),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_dcxo_mdrt_det_wkup_start(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_DCXO_MDRT_2),
		(val),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_MASK),
		(PMIC_AUXADC_DCXO_MDRT_DET_WKUP_START_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_adc_out_dcxo_mdrt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DCXO_MDRT_3),
		(&val),
		(PMIC_AUXADC_ADC_OUT_DCXO_MDRT_MASK),
		(PMIC_AUXADC_ADC_OUT_DCXO_MDRT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_rdy_dcxo_mdrt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DCXO_MDRT_3),
		(&val),
		(PMIC_AUXADC_ADC_RDY_DCXO_MDRT_MASK),
		(PMIC_AUXADC_ADC_RDY_DCXO_MDRT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_adc_busy_in_dcxo_mdrt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_DCXO_MDRT_4),
		(&val),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_MDRT_MASK),
		(PMIC_AUXADC_ADC_BUSY_IN_DCXO_MDRT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_auxadc_rsv_1rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_RSV_1),
		(val),
		(PMIC_AUXADC_RSV_1RSV0_MASK),
		(PMIC_AUXADC_RSV_1RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auxadc_new_priority_list_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUXADC_PRI_NEW),
		(val),
		(PMIC_AUXADC_NEW_PRIORITY_LIST_SEL_MASK),
		(PMIC_AUXADC_NEW_PRIORITY_LIST_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auxadc_sample_list_15_0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_SPL_LIST_0),
		(&val),
		(PMIC_AUXADC_SAMPLE_LIST_15_0_MASK),
		(PMIC_AUXADC_SAMPLE_LIST_15_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_sample_list_31_16(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_SPL_LIST_1),
		(&val),
		(PMIC_AUXADC_SAMPLE_LIST_31_16_MASK),
		(PMIC_AUXADC_SAMPLE_LIST_31_16_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auxadc_sample_list_33_32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUXADC_SPL_LIST_2),
		(&val),
		(PMIC_AUXADC_SAMPLE_LIST_33_32_MASK),
		(PMIC_AUXADC_SAMPLE_LIST_33_32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_BUCK32K_CK_PDN_MASK),
		(PMIC_RG_BUCK32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck1m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_BUCK1M_CK_PDN_MASK),
		(PMIC_RG_BUCK1M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck26m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_BUCK26M_CK_PDN_MASK),
		(PMIC_RG_BUCK26M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_ana_2m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_CON0),
		(val),
		(PMIC_RG_BUCK_VPA_ANA_2M_CK_PDN_MASK),
		(PMIC_RG_BUCK_VPA_ANA_2M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck32k_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_HWEN_CON0),
		(val),
		(PMIC_RG_BUCK32K_CK_PDN_HWEN_MASK),
		(PMIC_RG_BUCK32K_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck1m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_HWEN_CON0),
		(val),
		(PMIC_RG_BUCK1M_CK_PDN_HWEN_MASK),
		(PMIC_RG_BUCK1M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck26m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_HWEN_CON0),
		(val),
		(PMIC_RG_BUCK26M_CK_PDN_HWEN_MASK),
		(PMIC_RG_BUCK26M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_sleep_ctrl_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_CLK_HWEN_CON0),
		(val),
		(PMIC_RG_BUCK_SLEEP_CTRL_MODE_MASK),
		(PMIC_RG_BUCK_SLEEP_CTRL_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_sleep_ctrl_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_CLK_HWEN_CON0),
		(&val),
		(PMIC_RG_BUCK_SLEEP_CTRL_MODE_MASK),
		(PMIC_RG_BUCK_SLEEP_CTRL_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vpu_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VPU_OC_MASK),
		(PMIC_RG_INT_EN_VPU_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vpu_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VPU_OC_MASK),
		(PMIC_RG_INT_EN_VPU_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vcore_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VCORE_OC_MASK),
		(PMIC_RG_INT_EN_VCORE_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vcore_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VCORE_OC_MASK),
		(PMIC_RG_INT_EN_VCORE_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vgpu11_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VGPU11_OC_MASK),
		(PMIC_RG_INT_EN_VGPU11_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vgpu11_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VGPU11_OC_MASK),
		(PMIC_RG_INT_EN_VGPU11_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vgpu12_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VGPU12_OC_MASK),
		(PMIC_RG_INT_EN_VGPU12_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vgpu12_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VGPU12_OC_MASK),
		(PMIC_RG_INT_EN_VGPU12_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vmodem_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VMODEM_OC_MASK),
		(PMIC_RG_INT_EN_VMODEM_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vmodem_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VMODEM_OC_MASK),
		(PMIC_RG_INT_EN_VMODEM_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vproc1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VPROC1_OC_MASK),
		(PMIC_RG_INT_EN_VPROC1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vproc1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VPROC1_OC_MASK),
		(PMIC_RG_INT_EN_VPROC1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vproc2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VPROC2_OC_MASK),
		(PMIC_RG_INT_EN_VPROC2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vproc2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VPROC2_OC_MASK),
		(PMIC_RG_INT_EN_VPROC2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vs1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VS1_OC_MASK),
		(PMIC_RG_INT_EN_VS1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vs1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VS1_OC_MASK),
		(PMIC_RG_INT_EN_VS1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vs2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VS2_OC_MASK),
		(PMIC_RG_INT_EN_VS2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vs2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VS2_OC_MASK),
		(PMIC_RG_INT_EN_VS2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vpa_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VPA_OC_MASK),
		(PMIC_RG_INT_EN_VPA_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vpa_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VPA_OC_MASK),
		(PMIC_RG_INT_EN_VPA_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_vpu_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VPU_OC_MASK),
		(PMIC_RG_INT_MASK_VPU_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vcore_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VCORE_OC_MASK),
		(PMIC_RG_INT_MASK_VCORE_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vgpu11_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VGPU11_OC_MASK),
		(PMIC_RG_INT_MASK_VGPU11_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vgpu12_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VGPU12_OC_MASK),
		(PMIC_RG_INT_MASK_VGPU12_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vmodem_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VMODEM_OC_MASK),
		(PMIC_RG_INT_MASK_VMODEM_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vproc1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VPROC1_OC_MASK),
		(PMIC_RG_INT_MASK_VPROC1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vproc2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VPROC2_OC_MASK),
		(PMIC_RG_INT_MASK_VPROC2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vs1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VS1_OC_MASK),
		(PMIC_RG_INT_MASK_VS1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vs2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VS2_OC_MASK),
		(PMIC_RG_INT_MASK_VS2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vpa_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VPA_OC_MASK),
		(PMIC_RG_INT_MASK_VPA_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vpu_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VPU_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VPU_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vcore_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VCORE_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VCORE_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vgpu11_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VGPU11_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VGPU11_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vgpu12_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VGPU12_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VGPU12_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vmodem_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VMODEM_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VMODEM_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vproc1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VPROC1_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VPROC1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vproc2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VPROC2_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VPROC2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vs1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VS1_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VS1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vs2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VS2_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VS2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vpa_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VPA_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VPA_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vow_buck_vcore_dvs_done(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_VOW_CON),
		(val),
		(PMIC_RG_VOW_BUCK_VCORE_DVS_DONE_MASK),
		(PMIC_RG_VOW_BUCK_VCORE_DVS_DONE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow_buck_vcore_dvs_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_VOW_CON),
		(val),
		(PMIC_RG_VOW_BUCK_VCORE_DVS_SW_MODE_MASK),
		(PMIC_RG_VOW_BUCK_VCORE_DVS_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vow_buck_vcore_dvs_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_VOW_CON),
		(&val),
		(PMIC_RG_VOW_BUCK_VCORE_DVS_SW_MODE_MASK),
		(PMIC_RG_VOW_BUCK_VCORE_DVS_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_stb_max(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_STB_CON),
		(val),
		(PMIC_RG_BUCK_STB_MAX_MASK),
		(PMIC_RG_BUCK_STB_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgp2_minfreq_latency_max(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_VGP2_MINFREQ_CON),
		(val),
		(PMIC_RG_BUCK_VGP2_MINFREQ_LATENCY_MAX_MASK),
		(PMIC_RG_BUCK_VGP2_MINFREQ_LATENCY_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgp2_minfreq_duration_max(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_VGP2_MINFREQ_CON),
		(val),
		(PMIC_RG_BUCK_VGP2_MINFREQ_DURATION_MAX_MASK),
		(PMIC_RG_BUCK_VGP2_MINFREQ_DURATION_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_minfreq_latency_max(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_VPA_MINFREQ_CON),
		(val),
		(PMIC_RG_BUCK_VPA_MINFREQ_LATENCY_MAX_MASK),
		(PMIC_RG_BUCK_VPA_MINFREQ_LATENCY_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_minfreq_duration_max(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_VPA_MINFREQ_CON),
		(val),
		(PMIC_RG_BUCK_VPA_MINFREQ_DURATION_MAX_MASK),
		(PMIC_RG_BUCK_VPA_MINFREQ_DURATION_MAX_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_buck_top_write_key(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_KEY_PROT),
		(val),
		(PMIC_BUCK_TOP_WRITE_KEY_MASK),
		(PMIC_BUCK_TOP_WRITE_KEY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_buck_vpu_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG0),
		(&val),
		(PMIC_BUCK_VPU_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VPU_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vcore_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG0),
		(&val),
		(PMIC_BUCK_VCORE_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VCORE_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vgpu11_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG1),
		(&val),
		(PMIC_BUCK_VGPU11_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VGPU11_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vgpu12_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG1),
		(&val),
		(PMIC_BUCK_VGPU12_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VGPU12_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vmodem_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG2),
		(&val),
		(PMIC_BUCK_VMODEM_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VMODEM_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vproc1_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG2),
		(&val),
		(PMIC_BUCK_VPROC1_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VPROC1_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vproc2_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG3),
		(&val),
		(PMIC_BUCK_VPROC2_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VPROC2_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vs1_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG3),
		(&val),
		(PMIC_BUCK_VS1_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VS1_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vs2_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG4),
		(&val),
		(PMIC_BUCK_VS2_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VS2_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_vpa_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_WDTDBG4),
		(&val),
		(PMIC_BUCK_VPA_WDTDBG_VOSEL_MASK),
		(PMIC_BUCK_VPA_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VPU_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPU_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPU_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPU_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VCORE_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VCORE_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VCORE_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VCORE_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VGPU11_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VGPU11_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VGPU12_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VGPU12_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VMODEM_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VMODEM_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VPROC1_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPROC1_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VPROC2_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VS1_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VS1_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VS1_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VS1_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VS2_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VS2_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VS2_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VS2_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_oc_sdn_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_VPA_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPA_OC_SDN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_oc_sdn_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPA_OC_SDN_EN_MASK),
		(PMIC_RG_BUCK_VPA_OC_SDN_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_dcm_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR0),
		(val),
		(PMIC_RG_BUCK_DCM_MODE_MASK),
		(PMIC_RG_BUCK_DCM_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_dcm_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR0),
		(&val),
		(PMIC_RG_BUCK_DCM_MODE_MASK),
		(PMIC_RG_BUCK_DCM_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VPU_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPU_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VPU_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPU_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VCORE_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VCORE_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VCORE_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VCORE_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VGPU11_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VGPU11_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VGPU11_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VGPU11_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VGPU12_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VGPU12_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VGPU12_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VGPU12_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VMODEM_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VMODEM_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VMODEM_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VMODEM_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VPROC1_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPROC1_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VPROC1_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPROC1_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR1),
		(val),
		(PMIC_RG_BUCK_VS1_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VS1_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR1),
		(&val),
		(PMIC_RG_BUCK_VS1_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VS1_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR2),
		(val),
		(PMIC_RG_BUCK_VS2_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VS2_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR2),
		(&val),
		(PMIC_RG_BUCK_VS2_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VS2_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_TOP_ELR2),
		(val),
		(PMIC_RG_BUCK_VPA_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_TOP_ELR2),
		(&val),
		(PMIC_RG_BUCK_VPA_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CON0),
		(val),
		(PMIC_RG_BUCK_VPU_EN_MASK),
		(PMIC_RG_BUCK_VPU_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_CON0),
		(&val),
		(PMIC_RG_BUCK_VPU_EN_MASK),
		(PMIC_RG_BUCK_VPU_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CON0),
		(val),
		(PMIC_RG_BUCK_VPU_LP_MASK),
		(PMIC_RG_BUCK_VPU_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_CON0),
		(&val),
		(PMIC_RG_BUCK_VPU_LP_MASK),
		(PMIC_RG_BUCK_VPU_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_vosel_sleep(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CON1),
		(val),
		(PMIC_RG_BUCK_VPU_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VPU_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_CON1),
		(&val),
		(PMIC_RG_BUCK_VPU_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VPU_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_selr2r_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VPU_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VPU_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_sfchg_frate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CFG0),
		(val),
		(PMIC_RG_BUCK_VPU_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VPU_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CFG0),
		(val),
		(PMIC_RG_BUCK_VPU_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VPU_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_sfchg_rrate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CFG0),
		(val),
		(PMIC_RG_BUCK_VPU_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VPU_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_CFG0),
		(val),
		(PMIC_RG_BUCK_VPU_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VPU_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPU_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPU_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VPU_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPU_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPU_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPU_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw0_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw1_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw2_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw3_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw4_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw5_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw6_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw7_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw8_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw9_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw10_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw11_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw12_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw13_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_hw14_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPU_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPU_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPU_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG0),
		(&val),
		(PMIC_DA_VPU_VOSEL_MASK),
		(PMIC_DA_VPU_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG0),
		(&val),
		(PMIC_DA_VPU_VOSEL_GRAY_MASK),
		(PMIC_DA_VPU_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_EN_MASK),
		(PMIC_DA_VPU_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_STB_MASK),
		(PMIC_DA_VPU_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_LOOP_SEL_MASK),
		(PMIC_DA_VPU_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_R2R_PDN_MASK),
		(PMIC_DA_VPU_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_DVS_EN_MASK),
		(PMIC_DA_VPU_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_DVS_DOWN_MASK),
		(PMIC_DA_VPU_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_SSH_MASK),
		(PMIC_DA_VPU_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpu_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_DA_VPU_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VPU_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_DBG1),
		(val),
		(PMIC_RG_BUCK_VPU_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPU_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPU_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPU_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_DBG1),
		(val),
		(PMIC_RG_BUCK_VPU_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPU_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPU_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPU_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpu_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPU_ELR0),
		(val),
		(PMIC_RG_BUCK_VPU_VOSEL_MASK),
		(PMIC_RG_BUCK_VPU_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpu_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPU_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPU_VOSEL_MASK),
		(PMIC_RG_BUCK_VPU_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_EN_MASK),
		(PMIC_RG_BUCK_VCORE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_EN_MASK),
		(PMIC_RG_BUCK_VCORE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_LP_MASK),
		(PMIC_RG_BUCK_VCORE_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_LP_MASK),
		(PMIC_RG_BUCK_VCORE_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_vosel_sleep(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CON1),
		(val),
		(PMIC_RG_BUCK_VCORE_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VCORE_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_CON1),
		(&val),
		(PMIC_RG_BUCK_VCORE_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VCORE_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_selr2r_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VCORE_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VCORE_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sfchg_frate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CFG0),
		(val),
		(PMIC_RG_BUCK_VCORE_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VCORE_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CFG0),
		(val),
		(PMIC_RG_BUCK_VCORE_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VCORE_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sfchg_rrate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CFG0),
		(val),
		(PMIC_RG_BUCK_VCORE_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VCORE_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_CFG0),
		(val),
		(PMIC_RG_BUCK_VCORE_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VCORE_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(val),
		(PMIC_RG_BUCK_VCORE_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VCORE_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VCORE_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VCORE_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw0_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw1_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw2_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw3_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw4_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw5_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw6_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw7_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw8_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw9_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw10_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw11_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw12_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw13_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_hw14_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VCORE_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VCORE_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG0),
		(&val),
		(PMIC_DA_VCORE_VOSEL_MASK),
		(PMIC_DA_VCORE_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG0),
		(&val),
		(PMIC_DA_VCORE_VOSEL_GRAY_MASK),
		(PMIC_DA_VCORE_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_EN_MASK),
		(PMIC_DA_VCORE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_STB_MASK),
		(PMIC_DA_VCORE_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_LOOP_SEL_MASK),
		(PMIC_DA_VCORE_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_R2R_PDN_MASK),
		(PMIC_DA_VCORE_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_DVS_EN_MASK),
		(PMIC_DA_VCORE_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_DVS_DOWN_MASK),
		(PMIC_DA_VCORE_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_SSH_MASK),
		(PMIC_DA_VCORE_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcore_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_DA_VCORE_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VCORE_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(val),
		(PMIC_RG_BUCK_VCORE_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_RG_BUCK_VCORE_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VCORE_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(val),
		(PMIC_RG_BUCK_VCORE_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VCORE_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_DBG1),
		(&val),
		(PMIC_RG_BUCK_VCORE_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VCORE_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sshub_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_SSHUB_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_SSHUB_EN_MASK),
		(PMIC_RG_BUCK_VCORE_SSHUB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_sshub_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_SSHUB_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_SSHUB_EN_MASK),
		(PMIC_RG_BUCK_VCORE_SSHUB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_sshub_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_SSHUB_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_SSHUB_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_sshub_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_SSHUB_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_SSHUB_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_SSHUB_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_spi_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_SPI_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_SPI_EN_MASK),
		(PMIC_RG_BUCK_VCORE_SPI_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_spi_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_SPI_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_SPI_EN_MASK),
		(PMIC_RG_BUCK_VCORE_SPI_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_spi_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_SPI_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_SPI_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_SPI_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_spi_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_SPI_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_SPI_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_SPI_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_bt_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_BT_LP_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_BT_LP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_BT_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_bt_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_BT_LP_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_BT_LP_EN_MASK),
		(PMIC_RG_BUCK_VCORE_BT_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_bt_lp_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_BT_LP_CON0),
		(val),
		(PMIC_RG_BUCK_VCORE_BT_LP_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_BT_LP_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_bt_lp_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_BT_LP_CON0),
		(&val),
		(PMIC_RG_BUCK_VCORE_BT_LP_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_BT_LP_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_track_stall_bypass(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_STALL_TRACK0),
		(val),
		(PMIC_RG_BUCK_VCORE_TRACK_STALL_BYPASS_MASK),
		(PMIC_RG_BUCK_VCORE_TRACK_STALL_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vcore_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VCORE_ELR0),
		(val),
		(PMIC_RG_BUCK_VCORE_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vcore_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VCORE_ELR0),
		(&val),
		(PMIC_RG_BUCK_VCORE_VOSEL_MASK),
		(PMIC_RG_BUCK_VCORE_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CON0),
		(val),
		(PMIC_RG_BUCK_VGPU11_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_CON0),
		(&val),
		(PMIC_RG_BUCK_VGPU11_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CON0),
		(val),
		(PMIC_RG_BUCK_VGPU11_LP_MASK),
		(PMIC_RG_BUCK_VGPU11_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_CON0),
		(&val),
		(PMIC_RG_BUCK_VGPU11_LP_MASK),
		(PMIC_RG_BUCK_VGPU11_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CON1),
		(val),
		(PMIC_RG_BUCK_VGPU11_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VGPU11_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_CON1),
		(&val),
		(PMIC_RG_BUCK_VGPU11_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VGPU11_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_selr2r_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VGPU11_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VGPU11_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU11_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VGPU11_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU11_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VGPU11_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU11_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VGPU11_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU11_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VGPU11_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU11_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU11_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw0_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw1_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw2_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw3_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw4_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw5_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw6_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw7_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw8_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw9_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw10_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw11_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw12_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw13_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_hw14_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG0),
		(&val),
		(PMIC_DA_VGPU11_VOSEL_MASK),
		(PMIC_DA_VGPU11_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG0),
		(&val),
		(PMIC_DA_VGPU11_VOSEL_GRAY_MASK),
		(PMIC_DA_VGPU11_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_EN_MASK),
		(PMIC_DA_VGPU11_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_STB_MASK),
		(PMIC_DA_VGPU11_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_LOOP_SEL_MASK),
		(PMIC_DA_VGPU11_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_R2R_PDN_MASK),
		(PMIC_DA_VGPU11_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_DVS_EN_MASK),
		(PMIC_DA_VGPU11_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_DVS_DOWN_MASK),
		(PMIC_DA_VGPU11_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_SSH_MASK),
		(PMIC_DA_VGPU11_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu11_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_DA_VGPU11_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VGPU11_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(val),
		(PMIC_RG_BUCK_VGPU11_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_RG_BUCK_VGPU11_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VGPU11_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(val),
		(PMIC_RG_BUCK_VGPU11_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_DBG1),
		(&val),
		(PMIC_RG_BUCK_VGPU11_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VGPU11_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu11_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU11_ELR0),
		(val),
		(PMIC_RG_BUCK_VGPU11_VOSEL_MASK),
		(PMIC_RG_BUCK_VGPU11_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu11_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU11_ELR0),
		(&val),
		(PMIC_RG_BUCK_VGPU11_VOSEL_MASK),
		(PMIC_RG_BUCK_VGPU11_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CON0),
		(val),
		(PMIC_RG_BUCK_VGPU12_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_CON0),
		(&val),
		(PMIC_RG_BUCK_VGPU12_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CON0),
		(val),
		(PMIC_RG_BUCK_VGPU12_LP_MASK),
		(PMIC_RG_BUCK_VGPU12_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_CON0),
		(&val),
		(PMIC_RG_BUCK_VGPU12_LP_MASK),
		(PMIC_RG_BUCK_VGPU12_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CON1),
		(val),
		(PMIC_RG_BUCK_VGPU12_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VGPU12_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_CON1),
		(&val),
		(PMIC_RG_BUCK_VGPU12_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VGPU12_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_selr2r_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VGPU12_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VGPU12_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU12_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VGPU12_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU12_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VGPU12_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU12_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VGPU12_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_CFG0),
		(val),
		(PMIC_RG_BUCK_VGPU12_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VGPU12_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(val),
		(PMIC_RG_BUCK_VGPU12_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VGPU12_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw0_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw1_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw2_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw3_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw4_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw5_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw6_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw7_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw8_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw9_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw10_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw11_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw12_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw13_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_hw14_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG0),
		(&val),
		(PMIC_DA_VGPU12_VOSEL_MASK),
		(PMIC_DA_VGPU12_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG0),
		(&val),
		(PMIC_DA_VGPU12_VOSEL_GRAY_MASK),
		(PMIC_DA_VGPU12_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_EN_MASK),
		(PMIC_DA_VGPU12_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_STB_MASK),
		(PMIC_DA_VGPU12_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_LOOP_SEL_MASK),
		(PMIC_DA_VGPU12_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_R2R_PDN_MASK),
		(PMIC_DA_VGPU12_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_DVS_EN_MASK),
		(PMIC_DA_VGPU12_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_DVS_DOWN_MASK),
		(PMIC_DA_VGPU12_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_SSH_MASK),
		(PMIC_DA_VGPU12_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vgpu12_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_DA_VGPU12_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VGPU12_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(val),
		(PMIC_RG_BUCK_VGPU12_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_RG_BUCK_VGPU12_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VGPU12_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(val),
		(PMIC_RG_BUCK_VGPU12_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_DBG1),
		(&val),
		(PMIC_RG_BUCK_VGPU12_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VGPU12_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vgpu12_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VGPU12_ELR0),
		(val),
		(PMIC_RG_BUCK_VGPU12_VOSEL_MASK),
		(PMIC_RG_BUCK_VGPU12_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vgpu12_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VGPU12_ELR0),
		(&val),
		(PMIC_RG_BUCK_VGPU12_VOSEL_MASK),
		(PMIC_RG_BUCK_VGPU12_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CON0),
		(val),
		(PMIC_RG_BUCK_VMODEM_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_CON0),
		(&val),
		(PMIC_RG_BUCK_VMODEM_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CON0),
		(val),
		(PMIC_RG_BUCK_VMODEM_LP_MASK),
		(PMIC_RG_BUCK_VMODEM_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_CON0),
		(&val),
		(PMIC_RG_BUCK_VMODEM_LP_MASK),
		(PMIC_RG_BUCK_VMODEM_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CON1),
		(val),
		(PMIC_RG_BUCK_VMODEM_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VMODEM_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_CON1),
		(&val),
		(PMIC_RG_BUCK_VMODEM_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VMODEM_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_selr2r_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VMODEM_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VMODEM_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CFG0),
		(val),
		(PMIC_RG_BUCK_VMODEM_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VMODEM_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CFG0),
		(val),
		(PMIC_RG_BUCK_VMODEM_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VMODEM_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CFG0),
		(val),
		(PMIC_RG_BUCK_VMODEM_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VMODEM_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_CFG0),
		(val),
		(PMIC_RG_BUCK_VMODEM_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VMODEM_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(val),
		(PMIC_RG_BUCK_VMODEM_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VMODEM_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw0_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw1_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw2_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw3_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw4_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw5_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw6_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw7_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw8_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw9_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw10_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw11_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw12_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw13_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_hw14_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG0),
		(&val),
		(PMIC_DA_VMODEM_VOSEL_MASK),
		(PMIC_DA_VMODEM_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG0),
		(&val),
		(PMIC_DA_VMODEM_VOSEL_GRAY_MASK),
		(PMIC_DA_VMODEM_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_EN_MASK),
		(PMIC_DA_VMODEM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_STB_MASK),
		(PMIC_DA_VMODEM_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_LOOP_SEL_MASK),
		(PMIC_DA_VMODEM_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_R2R_PDN_MASK),
		(PMIC_DA_VMODEM_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_DVS_EN_MASK),
		(PMIC_DA_VMODEM_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_DVS_DOWN_MASK),
		(PMIC_DA_VMODEM_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_SSH_MASK),
		(PMIC_DA_VMODEM_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vmodem_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_DA_VMODEM_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VMODEM_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(val),
		(PMIC_RG_BUCK_VMODEM_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_RG_BUCK_VMODEM_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VMODEM_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(val),
		(PMIC_RG_BUCK_VMODEM_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_DBG1),
		(&val),
		(PMIC_RG_BUCK_VMODEM_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VMODEM_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_track_stall_bypass(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_STALL_TRACK0),
		(val),
		(PMIC_RG_BUCK_VMODEM_TRACK_STALL_BYPASS_MASK),
		(PMIC_RG_BUCK_VMODEM_TRACK_STALL_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vmodem_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VMODEM_ELR0),
		(val),
		(PMIC_RG_BUCK_VMODEM_VOSEL_MASK),
		(PMIC_RG_BUCK_VMODEM_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vmodem_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VMODEM_ELR0),
		(&val),
		(PMIC_RG_BUCK_VMODEM_VOSEL_MASK),
		(PMIC_RG_BUCK_VMODEM_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CON0),
		(val),
		(PMIC_RG_BUCK_VPROC1_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_CON0),
		(&val),
		(PMIC_RG_BUCK_VPROC1_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CON0),
		(val),
		(PMIC_RG_BUCK_VPROC1_LP_MASK),
		(PMIC_RG_BUCK_VPROC1_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_CON0),
		(&val),
		(PMIC_RG_BUCK_VPROC1_LP_MASK),
		(PMIC_RG_BUCK_VPROC1_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CON1),
		(val),
		(PMIC_RG_BUCK_VPROC1_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VPROC1_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_CON1),
		(&val),
		(PMIC_RG_BUCK_VPROC1_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VPROC1_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_selr2r_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VPROC1_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VPROC1_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC1_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VPROC1_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC1_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VPROC1_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC1_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VPROC1_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC1_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VPROC1_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC1_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC1_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw0_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw1_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw2_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw3_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw4_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw5_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw6_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw7_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw8_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw9_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw10_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw11_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw12_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw13_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_hw14_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG0),
		(&val),
		(PMIC_DA_VPROC1_VOSEL_MASK),
		(PMIC_DA_VPROC1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG0),
		(&val),
		(PMIC_DA_VPROC1_VOSEL_GRAY_MASK),
		(PMIC_DA_VPROC1_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_EN_MASK),
		(PMIC_DA_VPROC1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_STB_MASK),
		(PMIC_DA_VPROC1_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_LOOP_SEL_MASK),
		(PMIC_DA_VPROC1_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_R2R_PDN_MASK),
		(PMIC_DA_VPROC1_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_DVS_EN_MASK),
		(PMIC_DA_VPROC1_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_DVS_DOWN_MASK),
		(PMIC_DA_VPROC1_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_SSH_MASK),
		(PMIC_DA_VPROC1_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc1_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_DA_VPROC1_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VPROC1_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(val),
		(PMIC_RG_BUCK_VPROC1_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPROC1_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPROC1_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(val),
		(PMIC_RG_BUCK_VPROC1_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPROC1_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPROC1_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_track_stall_bypass(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_STALL_TRACK0),
		(val),
		(PMIC_RG_BUCK_VPROC1_TRACK_STALL_BYPASS_MASK),
		(PMIC_RG_BUCK_VPROC1_TRACK_STALL_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc1_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC1_ELR0),
		(val),
		(PMIC_RG_BUCK_VPROC1_VOSEL_MASK),
		(PMIC_RG_BUCK_VPROC1_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC1_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPROC1_VOSEL_MASK),
		(PMIC_RG_BUCK_VPROC1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CON0),
		(val),
		(PMIC_RG_BUCK_VPROC2_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_CON0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CON0),
		(val),
		(PMIC_RG_BUCK_VPROC2_LP_MASK),
		(PMIC_RG_BUCK_VPROC2_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_CON0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_LP_MASK),
		(PMIC_RG_BUCK_VPROC2_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CON1),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_CON1),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_selr2r_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VPROC2_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VPROC2_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC2_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VPROC2_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC2_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VPROC2_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC2_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VPROC2_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_CFG0),
		(val),
		(PMIC_RG_BUCK_VPROC2_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VPROC2_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VPROC2_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VPROC2_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw0_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw1_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw2_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw3_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw4_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw5_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw6_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw7_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw8_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw9_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw10_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw11_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw12_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw13_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_hw14_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG0),
		(&val),
		(PMIC_DA_VPROC2_VOSEL_MASK),
		(PMIC_DA_VPROC2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG0),
		(&val),
		(PMIC_DA_VPROC2_VOSEL_GRAY_MASK),
		(PMIC_DA_VPROC2_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_EN_MASK),
		(PMIC_DA_VPROC2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_STB_MASK),
		(PMIC_DA_VPROC2_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_LOOP_SEL_MASK),
		(PMIC_DA_VPROC2_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_R2R_PDN_MASK),
		(PMIC_DA_VPROC2_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_DVS_EN_MASK),
		(PMIC_DA_VPROC2_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_DVS_DOWN_MASK),
		(PMIC_DA_VPROC2_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_SSH_MASK),
		(PMIC_DA_VPROC2_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vproc2_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_DA_VPROC2_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VPROC2_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(val),
		(PMIC_RG_BUCK_VPROC2_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPROC2_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(val),
		(PMIC_RG_BUCK_VPROC2_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPROC2_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_track_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(val),
		(PMIC_RG_BUCK_VPROC2_TRACK_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_TRACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_track_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_TRACK_EN_MASK),
		(PMIC_RG_BUCK_VPROC2_TRACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_track_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(val),
		(PMIC_RG_BUCK_VPROC2_TRACK_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_TRACK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_track_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_TRACK_MODE_MASK),
		(PMIC_RG_BUCK_VPROC2_TRACK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel_delta(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_DELTA_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_DELTA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel_delta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_DELTA_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_DELTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel_offset(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_OFFSET_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_OFFSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_TRACK0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_OFFSET_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel_lb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_TRACK1),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LB_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel_lb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_TRACK1),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LB_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_LB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel_hb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_TRACK1),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_HB_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_HB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel_hb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_TRACK1),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_HB_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_HB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_track_stall_bypass(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_STALL_TRACK0),
		(val),
		(PMIC_RG_BUCK_VPROC2_TRACK_STALL_BYPASS_MASK),
		(PMIC_RG_BUCK_VPROC2_TRACK_STALL_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vproc2_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPROC2_ELR0),
		(val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vproc2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPROC2_ELR0),
		(&val),
		(PMIC_RG_BUCK_VPROC2_VOSEL_MASK),
		(PMIC_RG_BUCK_VPROC2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CON0),
		(val),
		(PMIC_RG_BUCK_VS1_EN_MASK),
		(PMIC_RG_BUCK_VS1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_CON0),
		(&val),
		(PMIC_RG_BUCK_VS1_EN_MASK),
		(PMIC_RG_BUCK_VS1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CON0),
		(val),
		(PMIC_RG_BUCK_VS1_LP_MASK),
		(PMIC_RG_BUCK_VS1_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_CON0),
		(&val),
		(PMIC_RG_BUCK_VS1_LP_MASK),
		(PMIC_RG_BUCK_VS1_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_vosel_sleep(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CON1),
		(val),
		(PMIC_RG_BUCK_VS1_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VS1_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_CON1),
		(&val),
		(PMIC_RG_BUCK_VS1_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VS1_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_selr2r_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VS1_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VS1_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_sfchg_frate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CFG0),
		(val),
		(PMIC_RG_BUCK_VS1_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VS1_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CFG0),
		(val),
		(PMIC_RG_BUCK_VS1_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VS1_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_sfchg_rrate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CFG0),
		(val),
		(PMIC_RG_BUCK_VS1_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VS1_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_CFG0),
		(val),
		(PMIC_RG_BUCK_VS1_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VS1_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS1_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS1_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VS1_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS1_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw0_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw1_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw2_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw3_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw4_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw5_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw6_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw7_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw8_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw9_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw10_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw11_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw12_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw13_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_hw14_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS1_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS1_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS1_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG0),
		(&val),
		(PMIC_DA_VS1_VOSEL_MASK),
		(PMIC_DA_VS1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG0),
		(&val),
		(PMIC_DA_VS1_VOSEL_GRAY_MASK),
		(PMIC_DA_VS1_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_EN_MASK),
		(PMIC_DA_VS1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_STB_MASK),
		(PMIC_DA_VS1_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_LOOP_SEL_MASK),
		(PMIC_DA_VS1_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_R2R_PDN_MASK),
		(PMIC_DA_VS1_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_DVS_EN_MASK),
		(PMIC_DA_VS1_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_DVS_DOWN_MASK),
		(PMIC_DA_VS1_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_SSH_MASK),
		(PMIC_DA_VS1_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs1_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_DA_VS1_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VS1_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_DBG1),
		(val),
		(PMIC_RG_BUCK_VS1_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VS1_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_RG_BUCK_VS1_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VS1_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_DBG1),
		(val),
		(PMIC_RG_BUCK_VS1_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VS1_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_DBG1),
		(&val),
		(PMIC_RG_BUCK_VS1_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VS1_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_voter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_VOTER),
		(val),
		(PMIC_RG_BUCK_VS1_VOTER_EN_MASK),
		(PMIC_RG_BUCK_VS1_VOTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_voter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_VOTER),
		(&val),
		(PMIC_RG_BUCK_VS1_VOTER_EN_MASK),
		(PMIC_RG_BUCK_VS1_VOTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_voter_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_VOTER_CFG),
		(val),
		(PMIC_RG_BUCK_VS1_VOTER_VOSEL_MASK),
		(PMIC_RG_BUCK_VS1_VOTER_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_voter_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_VOTER_CFG),
		(&val),
		(PMIC_RG_BUCK_VS1_VOTER_VOSEL_MASK),
		(PMIC_RG_BUCK_VS1_VOTER_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs1_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS1_ELR0),
		(val),
		(PMIC_RG_BUCK_VS1_VOSEL_MASK),
		(PMIC_RG_BUCK_VS1_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS1_ELR0),
		(&val),
		(PMIC_RG_BUCK_VS1_VOSEL_MASK),
		(PMIC_RG_BUCK_VS1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CON0),
		(val),
		(PMIC_RG_BUCK_VS2_EN_MASK),
		(PMIC_RG_BUCK_VS2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_CON0),
		(&val),
		(PMIC_RG_BUCK_VS2_EN_MASK),
		(PMIC_RG_BUCK_VS2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CON0),
		(val),
		(PMIC_RG_BUCK_VS2_LP_MASK),
		(PMIC_RG_BUCK_VS2_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_CON0),
		(&val),
		(PMIC_RG_BUCK_VS2_LP_MASK),
		(PMIC_RG_BUCK_VS2_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_vosel_sleep(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CON1),
		(val),
		(PMIC_RG_BUCK_VS2_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VS2_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_CON1),
		(&val),
		(PMIC_RG_BUCK_VS2_VOSEL_SLEEP_MASK),
		(PMIC_RG_BUCK_VS2_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_selr2r_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_SLP_CON),
		(val),
		(PMIC_RG_BUCK_VS2_SELR2R_CTRL_MASK),
		(PMIC_RG_BUCK_VS2_SELR2R_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_sfchg_frate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CFG0),
		(val),
		(PMIC_RG_BUCK_VS2_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VS2_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CFG0),
		(val),
		(PMIC_RG_BUCK_VS2_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VS2_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_sfchg_rrate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CFG0),
		(val),
		(PMIC_RG_BUCK_VS2_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VS2_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_CFG0),
		(val),
		(PMIC_RG_BUCK_VS2_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VS2_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW0_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW1_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW2_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW3_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW4_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW5_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW6_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW7_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW8_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW9_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW10_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW11_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW12_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW13_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_HW14_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(val),
		(PMIC_RG_BUCK_VS2_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_EN),
		(&val),
		(PMIC_RG_BUCK_VS2_SW_OP_EN_MASK),
		(PMIC_RG_BUCK_VS2_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW0_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW1_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW2_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW3_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW4_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW5_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW6_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW7_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW8_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW9_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW10_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW11_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW12_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW13_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_HW14_OP_CFG_MASK),
		(PMIC_RG_BUCK_VS2_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw0_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW0_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw0_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW0_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW0_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw1_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW1_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw2_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW2_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw3_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW3_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw3_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW3_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW3_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw4_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW4_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw4_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW4_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW4_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw5_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW5_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw5_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW5_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW5_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw6_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW6_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw6_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW6_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW6_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw7_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW7_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw7_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW7_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW7_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw8_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW8_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw8_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW8_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW8_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw9_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW9_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw9_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW9_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW9_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw10_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW10_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw10_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW10_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW10_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw11_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW11_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw11_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW11_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW11_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw12_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW12_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw13_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW13_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_hw14_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(val),
		(PMIC_RG_BUCK_VS2_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW14_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_hw14_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_OP_MODE),
		(&val),
		(PMIC_RG_BUCK_VS2_HW14_OP_MODE_MASK),
		(PMIC_RG_BUCK_VS2_HW14_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG0),
		(&val),
		(PMIC_DA_VS2_VOSEL_MASK),
		(PMIC_DA_VS2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG0),
		(&val),
		(PMIC_DA_VS2_VOSEL_GRAY_MASK),
		(PMIC_DA_VS2_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_EN_MASK),
		(PMIC_DA_VS2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_STB_MASK),
		(PMIC_DA_VS2_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_loop_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_LOOP_SEL_MASK),
		(PMIC_DA_VS2_LOOP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_R2R_PDN_MASK),
		(PMIC_DA_VS2_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_dvs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_DVS_EN_MASK),
		(PMIC_DA_VS2_DVS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_DVS_DOWN_MASK),
		(PMIC_DA_VS2_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_ssh(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_SSH_MASK),
		(PMIC_DA_VS2_SSH_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vs2_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_DA_VS2_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VS2_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_DBG1),
		(val),
		(PMIC_RG_BUCK_VS2_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VS2_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_RG_BUCK_VS2_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VS2_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_DBG1),
		(val),
		(PMIC_RG_BUCK_VS2_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VS2_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_DBG1),
		(&val),
		(PMIC_RG_BUCK_VS2_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VS2_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_voter_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_VOTER),
		(val),
		(PMIC_RG_BUCK_VS2_VOTER_EN_MASK),
		(PMIC_RG_BUCK_VS2_VOTER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_voter_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_VOTER),
		(&val),
		(PMIC_RG_BUCK_VS2_VOTER_EN_MASK),
		(PMIC_RG_BUCK_VS2_VOTER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_voter_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_VOTER_CFG),
		(val),
		(PMIC_RG_BUCK_VS2_VOTER_VOSEL_MASK),
		(PMIC_RG_BUCK_VS2_VOTER_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_voter_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_VOTER_CFG),
		(&val),
		(PMIC_RG_BUCK_VS2_VOTER_VOSEL_MASK),
		(PMIC_RG_BUCK_VS2_VOTER_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vs2_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VS2_ELR0),
		(val),
		(PMIC_RG_BUCK_VS2_VOSEL_MASK),
		(PMIC_RG_BUCK_VS2_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vs2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VS2_ELR0),
		(&val),
		(PMIC_RG_BUCK_VS2_VOSEL_MASK),
		(PMIC_RG_BUCK_VS2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CON0),
		(val),
		(PMIC_RG_BUCK_VPA_EN_MASK),
		(PMIC_RG_BUCK_VPA_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_CON0),
		(&val),
		(PMIC_RG_BUCK_VPA_EN_MASK),
		(PMIC_RG_BUCK_VPA_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CON0),
		(val),
		(PMIC_RG_BUCK_VPA_LP_MASK),
		(PMIC_RG_BUCK_VPA_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_CON0),
		(&val),
		(PMIC_RG_BUCK_VPA_LP_MASK),
		(PMIC_RG_BUCK_VPA_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CON1),
		(val),
		(PMIC_RG_BUCK_VPA_VOSEL_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_CON1),
		(&val),
		(PMIC_RG_BUCK_VPA_VOSEL_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_sfchg_frate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CFG0),
		(val),
		(PMIC_RG_BUCK_VPA_SFCHG_FRATE_MASK),
		(PMIC_RG_BUCK_VPA_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CFG0),
		(val),
		(PMIC_RG_BUCK_VPA_SFCHG_FEN_MASK),
		(PMIC_RG_BUCK_VPA_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_sfchg_rrate(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CFG0),
		(val),
		(PMIC_RG_BUCK_VPA_SFCHG_RRATE_MASK),
		(PMIC_RG_BUCK_VPA_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CFG0),
		(val),
		(PMIC_RG_BUCK_VPA_SFCHG_REN_MASK),
		(PMIC_RG_BUCK_VPA_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_dvs_down_ctrl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_CFG1),
		(val),
		(PMIC_RG_BUCK_VPA_DVS_DOWN_CTRL_MASK),
		(PMIC_RG_BUCK_VPA_DVS_DOWN_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_da_vpa_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG0),
		(&val),
		(PMIC_DA_VPA_VOSEL_MASK),
		(PMIC_DA_VPA_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG0),
		(&val),
		(PMIC_DA_VPA_VOSEL_GRAY_MASK),
		(PMIC_DA_VPA_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_DA_VPA_EN_MASK),
		(PMIC_DA_VPA_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_DA_VPA_STB_MASK),
		(PMIC_DA_VPA_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_dvs_transt(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_DA_VPA_DVS_TRANST_MASK),
		(PMIC_DA_VPA_DVS_TRANST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_dvs_bw(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_DA_VPA_DVS_BW_MASK),
		(PMIC_DA_VPA_DVS_BW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_dvs_down(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_DA_VPA_DVS_DOWN_MASK),
		(PMIC_DA_VPA_DVS_DOWN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vpa_minfreq_discharge(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_DA_VPA_MINFREQ_DISCHARGE_MASK),
		(PMIC_DA_VPA_MINFREQ_DISCHARGE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DBG1),
		(val),
		(PMIC_RG_BUCK_VPA_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPA_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPA_CK_SW_MODE_MASK),
		(PMIC_RG_BUCK_VPA_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_ck_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DBG1),
		(val),
		(PMIC_RG_BUCK_VPA_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPA_CK_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_ck_sw_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DBG1),
		(&val),
		(PMIC_RG_BUCK_VPA_CK_SW_EN_MASK),
		(PMIC_RG_BUCK_VPA_CK_SW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_vosel_dlc011(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DLC_CON0),
		(val),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC011_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC011_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_vosel_dlc011(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DLC_CON0),
		(&val),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC011_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC011_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_vosel_dlc111(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DLC_CON0),
		(val),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC111_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC111_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_vosel_dlc111(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DLC_CON0),
		(&val),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC111_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC111_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_vosel_dlc001(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DLC_CON1),
		(val),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC001_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC001_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_vosel_dlc001(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DLC_CON1),
		(&val),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC001_MASK),
		(PMIC_RG_BUCK_VPA_VOSEL_DLC001_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_dlc_map_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DLC_CON2),
		(val),
		(PMIC_RG_BUCK_VPA_DLC_MAP_EN_MASK),
		(PMIC_RG_BUCK_VPA_DLC_MAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_dlc_map_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DLC_CON2),
		(&val),
		(PMIC_RG_BUCK_VPA_DLC_MAP_EN_MASK),
		(PMIC_RG_BUCK_VPA_DLC_MAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_dlc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_DLC_CON2),
		(val),
		(PMIC_RG_BUCK_VPA_DLC_MASK),
		(PMIC_RG_BUCK_VPA_DLC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_da_vpa_dlc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_DLC_CON2),
		(&val),
		(PMIC_DA_VPA_DLC_MASK),
		(PMIC_DA_VPA_DLC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_CON0),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_EN_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_buck_vpa_msfg_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_BUCK_VPA_MSFG_CON0),
		(&val),
		(PMIC_RG_BUCK_VPA_MSFG_EN_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_rrate0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_RRATE0),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_RRATE0_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_RRATE0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_rrate5(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_RRATE2),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_RRATE5_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_RRATE5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_rthd0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_RTHD0),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_RTHD0_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_RTHD0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_frate0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_FRATE0),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_FRATE0_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_FRATE0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_frate5(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_FRATE2),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_FRATE5_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_FRATE5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_buck_vpa_msfg_fthd0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_BUCK_VPA_MSFG_FTHD0),
		(val),
		(PMIC_RG_BUCK_VPA_MSFG_FTHD0_MASK),
		(PMIC_RG_BUCK_VPA_MSFG_FTHD0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smps_testmode_b(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ANA_CON0),
		(val),
		(PMIC_RG_SMPS_TESTMODE_B_MASK),
		(PMIC_RG_SMPS_TESTMODE_B_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_autok_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ANA_CON0),
		(val),
		(PMIC_RG_AUTOK_RST_MASK),
		(PMIC_RG_AUTOK_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_smps_disautok(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ANA_CON0),
		(val),
		(PMIC_RG_SMPS_DISAUTOK_MASK),
		(PMIC_RG_SMPS_DISAUTOK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_NDIS_EN_MASK),
		(PMIC_RG_VGPU11_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(&val),
		(PMIC_RG_VGPU11_NDIS_EN_MASK),
		(PMIC_RG_VGPU11_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VGPU11_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(&val),
		(PMIC_RG_VGPU11_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VGPU11_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_SLEEP_TIME_MASK),
		(PMIC_RG_VGPU11_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_LOOPSEL_DIS_MASK),
		(PMIC_RG_VGPU11_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_TB_DIS_MASK),
		(PMIC_RG_VGPU11_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_TB_PFM_OFF_MASK),
		(PMIC_RG_VGPU11_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VGPU11_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(&val),
		(PMIC_RG_VGPU11_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VGPU11_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_TB_VREFSEL_MASK),
		(PMIC_RG_VGPU11_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_TON_EXTEND_EN_MASK),
		(PMIC_RG_VGPU11_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(&val),
		(PMIC_RG_VGPU11_TON_EXTEND_EN_MASK),
		(PMIC_RG_VGPU11_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_URT_EN_MASK),
		(PMIC_RG_VGPU11_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(&val),
		(PMIC_RG_VGPU11_URT_EN_MASK),
		(PMIC_RG_VGPU11_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_OVP_EN_MASK),
		(PMIC_RG_VGPU11_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(&val),
		(PMIC_RG_VGPU11_OVP_EN_MASK),
		(PMIC_RG_VGPU11_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_OVP_VREFSEL_MASK),
		(PMIC_RG_VGPU11_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON0),
		(val),
		(PMIC_RG_VGPU11_RAMP_AC_MASK),
		(PMIC_RG_VGPU11_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON1),
		(val),
		(PMIC_RG_VGPU11_OCP_MASK),
		(PMIC_RG_VGPU11_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON1),
		(val),
		(PMIC_RG_VGPU11_OCN_MASK),
		(PMIC_RG_VGPU11_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON1),
		(val),
		(PMIC_RG_VGPU11_FUGON_MASK),
		(PMIC_RG_VGPU11_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON1),
		(val),
		(PMIC_RG_VGPU11_FLGON_MASK),
		(PMIC_RG_VGPU11_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON1),
		(val),
		(PMIC_RG_VGPU11_PFM_PEAK_MASK),
		(PMIC_RG_VGPU11_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VGPU11_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VGPU11_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_UG_SR_MASK),
		(PMIC_RG_VGPU11_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_LG_SR_MASK),
		(PMIC_RG_VGPU11_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_FCCM_MASK),
		(PMIC_RG_VGPU11_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_RETENTION_EN_MASK),
		(PMIC_RG_VGPU11_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(&val),
		(PMIC_RG_VGPU11_RETENTION_EN_MASK),
		(PMIC_RG_VGPU11_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(val),
		(PMIC_RG_VGPU11_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VGPU11_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON2),
		(&val),
		(PMIC_RG_VGPU11_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VGPU11_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON3),
		(val),
		(PMIC_RG_VGPU11_RSVH_MASK),
		(PMIC_RG_VGPU11_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON3),
		(val),
		(PMIC_RG_VGPU11_RSVL_MASK),
		(PMIC_RG_VGPU11_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vgpu11_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON4),
		(&val),
		(PMIC_RGS_VGPU11_OC_STATUS_MASK),
		(PMIC_RGS_VGPU11_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vgpu11_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON4),
		(&val),
		(PMIC_RGS_VGPU11_DIG_MON_MASK),
		(PMIC_RGS_VGPU11_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON4),
		(val),
		(PMIC_RG_VGPU11_DIGMON_SEL_MASK),
		(PMIC_RG_VGPU11_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VGPU11_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_VBAT_HI_DIS_MASK),
		(PMIC_RG_VGPU11_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_VOUT_HI_DIS_MASK),
		(PMIC_RG_VGPU11_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_RCB_MASK),
		(PMIC_RG_VGPU11_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_VDIFF_OFF_MASK),
		(PMIC_RG_VGPU11_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_VDIFFCAP_EN_MASK),
		(PMIC_RG_VGPU11_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(&val),
		(PMIC_RG_VGPU11_VDIFFCAP_EN_MASK),
		(PMIC_RG_VGPU11_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_dac_vref_1p1v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VGPU11_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(&val),
		(PMIC_RG_VGPU11_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VGPU11_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu11_dac_vref_1p2v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(val),
		(PMIC_RG_VGPU11_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VGPU11_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu11_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON5),
		(&val),
		(PMIC_RG_VGPU11_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VGPU11_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_NDIS_EN_MASK),
		(PMIC_RG_VGPU12_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(&val),
		(PMIC_RG_VGPU12_NDIS_EN_MASK),
		(PMIC_RG_VGPU12_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VGPU12_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(&val),
		(PMIC_RG_VGPU12_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VGPU12_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_SLEEP_TIME_MASK),
		(PMIC_RG_VGPU12_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_LOOPSEL_DIS_MASK),
		(PMIC_RG_VGPU12_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_TB_DIS_MASK),
		(PMIC_RG_VGPU12_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_TB_PFM_OFF_MASK),
		(PMIC_RG_VGPU12_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_TB_VREFSEL_MASK),
		(PMIC_RG_VGPU12_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_TON_EXTEND_EN_MASK),
		(PMIC_RG_VGPU12_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(&val),
		(PMIC_RG_VGPU12_TON_EXTEND_EN_MASK),
		(PMIC_RG_VGPU12_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_URT_EN_MASK),
		(PMIC_RG_VGPU12_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(&val),
		(PMIC_RG_VGPU12_URT_EN_MASK),
		(PMIC_RG_VGPU12_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VGPU12_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(&val),
		(PMIC_RG_VGPU12_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VGPU12_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_OVP_EN_MASK),
		(PMIC_RG_VGPU12_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(&val),
		(PMIC_RG_VGPU12_OVP_EN_MASK),
		(PMIC_RG_VGPU12_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_OVP_VREFSEL_MASK),
		(PMIC_RG_VGPU12_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON6),
		(val),
		(PMIC_RG_VGPU12_RAMP_AC_MASK),
		(PMIC_RG_VGPU12_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON7),
		(val),
		(PMIC_RG_VGPU12_OCP_MASK),
		(PMIC_RG_VGPU12_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON7),
		(val),
		(PMIC_RG_VGPU12_OCN_MASK),
		(PMIC_RG_VGPU12_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON7),
		(val),
		(PMIC_RG_VGPU12_PFM_PEAK_MASK),
		(PMIC_RG_VGPU12_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON7),
		(val),
		(PMIC_RG_VGPU12_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VGPU12_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_FLGON_MASK),
		(PMIC_RG_VGPU12_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_FUGON_MASK),
		(PMIC_RG_VGPU12_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VGPU12_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_UG_SR_MASK),
		(PMIC_RG_VGPU12_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_LG_SR_MASK),
		(PMIC_RG_VGPU12_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_FCCM_MASK),
		(PMIC_RG_VGPU12_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON8),
		(val),
		(PMIC_RG_VGPU12_RSVH_MASK),
		(PMIC_RG_VGPU12_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(val),
		(PMIC_RG_VGPU12_RSVL_MASK),
		(PMIC_RG_VGPU12_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(val),
		(PMIC_RG_VGPU12_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VGPU12_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(&val),
		(PMIC_RG_VGPU12_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VGPU12_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(val),
		(PMIC_RG_VGPU12_RETENTION_EN_MASK),
		(PMIC_RG_VGPU12_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(&val),
		(PMIC_RG_VGPU12_RETENTION_EN_MASK),
		(PMIC_RG_VGPU12_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vgpu12_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(&val),
		(PMIC_RGS_VGPU12_OC_STATUS_MASK),
		(PMIC_RGS_VGPU12_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vgpu12_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(&val),
		(PMIC_RGS_VGPU12_DIG_MON_MASK),
		(PMIC_RGS_VGPU12_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON9),
		(val),
		(PMIC_RG_VGPU12_DIGMON_SEL_MASK),
		(PMIC_RG_VGPU12_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_RCB_MASK),
		(PMIC_RG_VGPU12_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_VBAT_HI_DIS_MASK),
		(PMIC_RG_VGPU12_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VGPU12_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_VOUT_HI_DIS_MASK),
		(PMIC_RG_VGPU12_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_VDIFF_OFF_MASK),
		(PMIC_RG_VGPU12_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_VDIFFCAP_EN_MASK),
		(PMIC_RG_VGPU12_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(&val),
		(PMIC_RG_VGPU12_VDIFFCAP_EN_MASK),
		(PMIC_RG_VGPU12_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_dac_vref_1p1v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VGPU12_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(&val),
		(PMIC_RG_VGPU12_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VGPU12_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpu12_dac_vref_1p2v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(val),
		(PMIC_RG_VGPU12_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VGPU12_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpu12_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON10),
		(&val),
		(PMIC_RG_VGPU12_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VGPU12_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_TB_DIS_MASK),
		(PMIC_RG_VCORE_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_NDIS_EN_MASK),
		(PMIC_RG_VCORE_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(&val),
		(PMIC_RG_VCORE_NDIS_EN_MASK),
		(PMIC_RG_VCORE_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_LOOPSEL_DIS_MASK),
		(PMIC_RG_VCORE_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VCORE_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(&val),
		(PMIC_RG_VCORE_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VCORE_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_SLEEP_TIME_MASK),
		(PMIC_RG_VCORE_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_TB_VREFSEL_MASK),
		(PMIC_RG_VCORE_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_TB_PFM_OFF_MASK),
		(PMIC_RG_VCORE_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_TON_EXTEND_EN_MASK),
		(PMIC_RG_VCORE_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(&val),
		(PMIC_RG_VCORE_TON_EXTEND_EN_MASK),
		(PMIC_RG_VCORE_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_URT_EN_MASK),
		(PMIC_RG_VCORE_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(&val),
		(PMIC_RG_VCORE_URT_EN_MASK),
		(PMIC_RG_VCORE_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VCORE_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(&val),
		(PMIC_RG_VCORE_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VCORE_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_OVP_EN_MASK),
		(PMIC_RG_VCORE_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(&val),
		(PMIC_RG_VCORE_OVP_EN_MASK),
		(PMIC_RG_VCORE_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_OVP_VREFSEL_MASK),
		(PMIC_RG_VCORE_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON11),
		(val),
		(PMIC_RG_VCORE_RAMP_AC_MASK),
		(PMIC_RG_VCORE_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON12),
		(val),
		(PMIC_RG_VCORE_OCP_MASK),
		(PMIC_RG_VCORE_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON12),
		(val),
		(PMIC_RG_VCORE_OCN_MASK),
		(PMIC_RG_VCORE_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON12),
		(val),
		(PMIC_RG_VCORE_FUGON_MASK),
		(PMIC_RG_VCORE_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON12),
		(val),
		(PMIC_RG_VCORE_FLGON_MASK),
		(PMIC_RG_VCORE_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON12),
		(val),
		(PMIC_RG_VCORE_PFM_PEAK_MASK),
		(PMIC_RG_VCORE_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON12),
		(val),
		(PMIC_RG_VCORE_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VCORE_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_UG_SR_MASK),
		(PMIC_RG_VCORE_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_LG_SR_MASK),
		(PMIC_RG_VCORE_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VCORE_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_FCCM_MASK),
		(PMIC_RG_VCORE_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VCORE_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(&val),
		(PMIC_RG_VCORE_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VCORE_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_RETENTION_EN_MASK),
		(PMIC_RG_VCORE_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(&val),
		(PMIC_RG_VCORE_RETENTION_EN_MASK),
		(PMIC_RG_VCORE_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON13),
		(val),
		(PMIC_RG_VCORE_RSVH_MASK),
		(PMIC_RG_VCORE_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON14),
		(val),
		(PMIC_RG_VCORE_RSVL_MASK),
		(PMIC_RG_VCORE_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vcore_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON14),
		(&val),
		(PMIC_RGS_VCORE_OC_STATUS_MASK),
		(PMIC_RGS_VCORE_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcore_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON14),
		(&val),
		(PMIC_RGS_VCORE_DIG_MON_MASK),
		(PMIC_RGS_VCORE_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON14),
		(val),
		(PMIC_RG_VCORE_DIGMON_SEL_MASK),
		(PMIC_RG_VCORE_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON14),
		(val),
		(PMIC_RG_VGPUVCORE_TMDL_MASK),
		(PMIC_RG_VGPUVCORE_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_RCB_MASK),
		(PMIC_RG_VCORE_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VCORE_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_VBAT_HI_DIS_MASK),
		(PMIC_RG_VCORE_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_VOUT_HI_DIS_MASK),
		(PMIC_RG_VCORE_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_VDIFF_OFF_MASK),
		(PMIC_RG_VCORE_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_VDIFFCAP_EN_MASK),
		(PMIC_RG_VCORE_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(&val),
		(PMIC_RG_VCORE_VDIFFCAP_EN_MASK),
		(PMIC_RG_VCORE_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_dac_vref_1p1v_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VCORE_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(&val),
		(PMIC_RG_VCORE_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VCORE_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcore_dac_vref_1p2v_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VCORE_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VCORE_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcore_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(&val),
		(PMIC_RG_VCORE_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VCORE_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_diff_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON15),
		(val),
		(PMIC_RG_VGPUVCORE_DIFF_L_MASK),
		(PMIC_RG_VGPUVCORE_DIFF_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_sr_vbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(val),
		(PMIC_RG_VGPUVCORE_SR_VBAT_MASK),
		(PMIC_RG_VGPUVCORE_SR_VBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_config_lat_rsvh(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(val),
		(PMIC_RG_VGPUVCORE_CONFIG_LAT_RSVH_MASK),
		(PMIC_RG_VGPUVCORE_CONFIG_LAT_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_reconfig_rsvh(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(val),
		(PMIC_RG_VGPUVCORE_RECONFIG_RSVH_MASK),
		(PMIC_RG_VGPUVCORE_RECONFIG_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_reconfig_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(val),
		(PMIC_RG_VGPUVCORE_RECONFIG_EN_MASK),
		(PMIC_RG_VGPUVCORE_RECONFIG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vgpuvcore_reconfig_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(&val),
		(PMIC_RG_VGPUVCORE_RECONFIG_EN_MASK),
		(PMIC_RG_VGPUVCORE_RECONFIG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_3ph1_vgpu11_digcfg_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(&val),
		(PMIC_RGS_3PH1_VGPU11_DIGCFG_EN_MASK),
		(PMIC_RGS_3PH1_VGPU11_DIGCFG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_3ph2_vcore_digcfg_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(&val),
		(PMIC_RGS_3PH2_VCORE_DIGCFG_EN_MASK),
		(PMIC_RGS_3PH2_VCORE_DIGCFG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_3ph3_vgpu12_digcfg_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VGPUVCORE_ANA_CON16),
		(&val),
		(PMIC_RGS_3PH3_VGPU12_DIGCFG_EN_MASK),
		(PMIC_RGS_3PH3_VGPU12_DIGCFG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_sr_vbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_SR_VBAT_MASK),
		(PMIC_RG_VPROC1_SR_VBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_NDIS_EN_MASK),
		(PMIC_RG_VPROC1_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC1_NDIS_EN_MASK),
		(PMIC_RG_VPROC1_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VPROC1_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC1_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VPROC1_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_SLEEP_TIME_MASK),
		(PMIC_RG_VPROC1_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_LOOPSEL_DIS_MASK),
		(PMIC_RG_VPROC1_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_RAMP_AC_MASK),
		(PMIC_RG_VPROC1_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_TB_DIS_MASK),
		(PMIC_RG_VPROC1_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_TB_PFM_OFF_MASK),
		(PMIC_RG_VPROC1_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_TB_VREFSEL_MASK),
		(PMIC_RG_VPROC1_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_TON_EXTEND_EN_MASK),
		(PMIC_RG_VPROC1_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC1_TON_EXTEND_EN_MASK),
		(PMIC_RG_VPROC1_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_URT_EN_MASK),
		(PMIC_RG_VPROC1_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC1_URT_EN_MASK),
		(PMIC_RG_VPROC1_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VPROC1_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC1_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VPROC1_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_OVP_EN_MASK),
		(PMIC_RG_VPROC1_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC1_OVP_EN_MASK),
		(PMIC_RG_VPROC1_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON0),
		(val),
		(PMIC_RG_VPROC1_OVP_VREFSEL_MASK),
		(PMIC_RG_VPROC1_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON1),
		(val),
		(PMIC_RG_VPROC1_OCN_MASK),
		(PMIC_RG_VPROC1_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON1),
		(val),
		(PMIC_RG_VPROC1_OCP_MASK),
		(PMIC_RG_VPROC1_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON1),
		(val),
		(PMIC_RG_VPROC1_PFM_PEAK_MASK),
		(PMIC_RG_VPROC1_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON1),
		(val),
		(PMIC_RG_VPROC1_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VPROC1_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vproc1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON1),
		(&val),
		(PMIC_RGS_VPROC1_OC_STATUS_MASK),
		(PMIC_RGS_VPROC1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vproc1_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON2),
		(&val),
		(PMIC_RGS_VPROC1_DIG_MON_MASK),
		(PMIC_RGS_VPROC1_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON2),
		(val),
		(PMIC_RG_VPROC1_UG_SR_MASK),
		(PMIC_RG_VPROC1_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON2),
		(val),
		(PMIC_RG_VPROC1_LG_SR_MASK),
		(PMIC_RG_VPROC1_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON2),
		(val),
		(PMIC_RG_VPROC1_TMDL_MASK),
		(PMIC_RG_VPROC1_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON2),
		(val),
		(PMIC_RG_VPROC1_FUGON_MASK),
		(PMIC_RG_VPROC1_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON3),
		(val),
		(PMIC_RG_VPROC1_FLGON_MASK),
		(PMIC_RG_VPROC1_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON3),
		(val),
		(PMIC_RG_VPROC1_FCCM_MASK),
		(PMIC_RG_VPROC1_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON3),
		(val),
		(PMIC_RG_VPROC1_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPROC1_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON3),
		(&val),
		(PMIC_RG_VPROC1_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPROC1_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON3),
		(val),
		(PMIC_RG_VPROC1_RETENTION_EN_MASK),
		(PMIC_RG_VPROC1_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON3),
		(&val),
		(PMIC_RG_VPROC1_RETENTION_EN_MASK),
		(PMIC_RG_VPROC1_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON3),
		(val),
		(PMIC_RG_VPROC1_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VPROC1_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON3),
		(val),
		(PMIC_RG_VPROC1_DIGMON_SEL_MASK),
		(PMIC_RG_VPROC1_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON4),
		(val),
		(PMIC_RG_VPROC1_RSVH_MASK),
		(PMIC_RG_VPROC1_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON4),
		(val),
		(PMIC_RG_VPROC1_RSVL_MASK),
		(PMIC_RG_VPROC1_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_RCB_MASK),
		(PMIC_RG_VPROC1_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_VDIFFCAP_EN_MASK),
		(PMIC_RG_VPROC1_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON5),
		(&val),
		(PMIC_RG_VPROC1_VDIFFCAP_EN_MASK),
		(PMIC_RG_VPROC1_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_VBAT_HI_DIS_MASK),
		(PMIC_RG_VPROC1_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VPROC1_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_VOUT_HI_DIS_MASK),
		(PMIC_RG_VPROC1_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_dac_vref_1p1v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VPROC1_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON5),
		(&val),
		(PMIC_RG_VPROC1_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VPROC1_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_dac_vref_1p2v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VPROC1_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc1_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC1_ANA_CON5),
		(&val),
		(PMIC_RG_VPROC1_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VPROC1_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc1_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC1_ANA_CON5),
		(val),
		(PMIC_RG_VPROC1_VDIFF_OFF_MASK),
		(PMIC_RG_VPROC1_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_0),
		(val),
		(PMIC_RG_VGPU11_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VGPU11_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_0),
		(val),
		(PMIC_RG_VGPU11_CCOMP_MASK),
		(PMIC_RG_VGPU11_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_0),
		(val),
		(PMIC_RG_VGPU11_RCOMP_MASK),
		(PMIC_RG_VGPU11_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_0),
		(val),
		(PMIC_RG_VGPU11_RAMP_SLP_MASK),
		(PMIC_RG_VGPU11_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_0),
		(val),
		(PMIC_RG_VGPU11_NLIM_TRIM_MASK),
		(PMIC_RG_VGPU11_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_1),
		(val),
		(PMIC_RG_VGPU12_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VGPU12_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_1),
		(val),
		(PMIC_RG_VGPU12_CCOMP_MASK),
		(PMIC_RG_VGPU12_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_1),
		(val),
		(PMIC_RG_VGPU12_RCOMP_MASK),
		(PMIC_RG_VGPU12_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_1),
		(val),
		(PMIC_RG_VGPU12_RAMP_SLP_MASK),
		(PMIC_RG_VGPU12_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_1),
		(val),
		(PMIC_RG_VGPU12_NLIM_TRIM_MASK),
		(PMIC_RG_VGPU12_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_2),
		(val),
		(PMIC_RG_VCORE_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VCORE_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_2),
		(val),
		(PMIC_RG_VCORE_CCOMP_MASK),
		(PMIC_RG_VCORE_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_2),
		(val),
		(PMIC_RG_VCORE_RCOMP_MASK),
		(PMIC_RG_VCORE_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_2),
		(val),
		(PMIC_RG_VCORE_RAMP_SLP_MASK),
		(PMIC_RG_VCORE_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_2),
		(val),
		(PMIC_RG_VCORE_NLIM_TRIM_MASK),
		(PMIC_RG_VCORE_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_3),
		(val),
		(PMIC_RG_VGPU11_CSNSLP_TRIM_MASK),
		(PMIC_RG_VGPU11_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_3),
		(val),
		(PMIC_RG_VGPU11_ZC_TRIM_MASK),
		(PMIC_RG_VGPU11_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_4),
		(val),
		(PMIC_RG_VGPU12_CSNSLP_TRIM_MASK),
		(PMIC_RG_VGPU12_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_4),
		(val),
		(PMIC_RG_VGPU12_ZC_TRIM_MASK),
		(PMIC_RG_VGPU12_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_5),
		(val),
		(PMIC_RG_VCORE_CSNSLP_TRIM_MASK),
		(PMIC_RG_VCORE_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_5),
		(val),
		(PMIC_RG_VCORE_ZC_TRIM_MASK),
		(PMIC_RG_VCORE_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_6),
		(val),
		(PMIC_RG_VGPU11_CSPSLP_TRIM_MASK),
		(PMIC_RG_VGPU11_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_7),
		(val),
		(PMIC_RG_VGPU12_CSPSLP_TRIM_MASK),
		(PMIC_RG_VGPU12_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_8),
		(val),
		(PMIC_RG_VCORE_CSPSLP_TRIM_MASK),
		(PMIC_RG_VCORE_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_phin_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_9),
		(val),
		(PMIC_RG_VGPUVCORE_PHIN_TRIM_MASK),
		(PMIC_RG_VGPUVCORE_PHIN_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_10),
		(val),
		(PMIC_RG_VPROC1_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VPROC1_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_10),
		(val),
		(PMIC_RG_VPROC1_CCOMP_MASK),
		(PMIC_RG_VPROC1_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_10),
		(val),
		(PMIC_RG_VPROC1_RCOMP_MASK),
		(PMIC_RG_VPROC1_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_10),
		(val),
		(PMIC_RG_VPROC1_RAMP_SLP_MASK),
		(PMIC_RG_VPROC1_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_10),
		(val),
		(PMIC_RG_VPROC1_NLIM_TRIM_MASK),
		(PMIC_RG_VPROC1_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_11),
		(val),
		(PMIC_RG_VPROC1_CSNSLP_TRIM_MASK),
		(PMIC_RG_VPROC1_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_11),
		(val),
		(PMIC_RG_VPROC1_ZC_TRIM_MASK),
		(PMIC_RG_VPROC1_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_12),
		(val),
		(PMIC_RG_VPROC1_CSPSLP_TRIM_MASK),
		(PMIC_RG_VPROC1_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_13),
		(val),
		(PMIC_RG_VS1_TRIMH_MASK),
		(PMIC_RG_VS1_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_13),
		(val),
		(PMIC_RG_VS2_TRIMH_MASK),
		(PMIC_RG_VS2_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_13),
		(val),
		(PMIC_RG_VGPU11_TRIMH_MASK),
		(PMIC_RG_VGPU11_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_13),
		(val),
		(PMIC_RG_VGPU12_TRIMH_MASK),
		(PMIC_RG_VGPU12_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_14),
		(val),
		(PMIC_RG_VPROC2_TRIMH_MASK),
		(PMIC_RG_VPROC2_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_14),
		(val),
		(PMIC_RG_VPROC1_TRIMH_MASK),
		(PMIC_RG_VPROC1_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_14),
		(val),
		(PMIC_RG_VCORE_TRIMH_MASK),
		(PMIC_RG_VCORE_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_14),
		(val),
		(PMIC_RG_VMODEM_TRIMH_MASK),
		(PMIC_RG_VMODEM_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_15),
		(val),
		(PMIC_RG_VPA_TRIMH_MASK),
		(PMIC_RG_VPA_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_15),
		(val),
		(PMIC_RG_VPU_TRIMH_MASK),
		(PMIC_RG_VPU_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_15),
		(val),
		(PMIC_RG_VSRAM_PROC1_TRIMH_MASK),
		(PMIC_RG_VSRAM_PROC1_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_16),
		(val),
		(PMIC_RG_VSRAM_PROC2_TRIMH_MASK),
		(PMIC_RG_VSRAM_PROC2_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_md_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_16),
		(val),
		(PMIC_RG_VSRAM_MD_TRIMH_MASK),
		(PMIC_RG_VSRAM_MD_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_others_trimh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_16),
		(val),
		(PMIC_RG_VSRAM_OTHERS_TRIMH_MASK),
		(PMIC_RG_VSRAM_OTHERS_TRIMH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu11_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_17),
		(val),
		(PMIC_RG_VGPU11_TON_TRIM_MASK),
		(PMIC_RG_VGPU11_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpu12_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_17),
		(val),
		(PMIC_RG_VGPU12_TON_TRIM_MASK),
		(PMIC_RG_VGPU12_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcore_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_18),
		(val),
		(PMIC_RG_VCORE_TON_TRIM_MASK),
		(PMIC_RG_VCORE_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_ph2_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_18),
		(val),
		(PMIC_RG_VGPUVCORE_PH2_OFF_MASK),
		(PMIC_RG_VGPUVCORE_PH2_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_ph3_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_18),
		(val),
		(PMIC_RG_VGPUVCORE_PH3_OFF_MASK),
		(PMIC_RG_VGPUVCORE_PH3_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vgpuvcore_pg_fb3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_18),
		(val),
		(PMIC_RG_VGPUVCORE_PG_FB3_MASK),
		(PMIC_RG_VGPUVCORE_PG_FB3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc1_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SMPS_ELR_18),
		(val),
		(PMIC_RG_VPROC1_TON_TRIM_MASK),
		(PMIC_RG_VPROC1_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_sr_vbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_SR_VBAT_MASK),
		(PMIC_RG_VPROC2_SR_VBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_NDIS_EN_MASK),
		(PMIC_RG_VPROC2_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC2_NDIS_EN_MASK),
		(PMIC_RG_VPROC2_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VPROC2_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC2_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VPROC2_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_SLEEP_TIME_MASK),
		(PMIC_RG_VPROC2_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_LOOPSEL_DIS_MASK),
		(PMIC_RG_VPROC2_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_RAMP_AC_MASK),
		(PMIC_RG_VPROC2_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_TB_DIS_MASK),
		(PMIC_RG_VPROC2_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_TB_PFM_OFF_MASK),
		(PMIC_RG_VPROC2_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_TB_VREFSEL_MASK),
		(PMIC_RG_VPROC2_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_TON_EXTEND_EN_MASK),
		(PMIC_RG_VPROC2_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC2_TON_EXTEND_EN_MASK),
		(PMIC_RG_VPROC2_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_URT_EN_MASK),
		(PMIC_RG_VPROC2_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC2_URT_EN_MASK),
		(PMIC_RG_VPROC2_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VPROC2_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC2_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VPROC2_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_OVP_EN_MASK),
		(PMIC_RG_VPROC2_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VPROC2_OVP_EN_MASK),
		(PMIC_RG_VPROC2_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON0),
		(val),
		(PMIC_RG_VPROC2_OVP_VREFSEL_MASK),
		(PMIC_RG_VPROC2_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON1),
		(val),
		(PMIC_RG_VPROC2_OCN_MASK),
		(PMIC_RG_VPROC2_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON1),
		(val),
		(PMIC_RG_VPROC2_OCP_MASK),
		(PMIC_RG_VPROC2_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON1),
		(val),
		(PMIC_RG_VPROC2_PFM_PEAK_MASK),
		(PMIC_RG_VPROC2_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON1),
		(val),
		(PMIC_RG_VPROC2_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VPROC2_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vproc2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON1),
		(&val),
		(PMIC_RGS_VPROC2_OC_STATUS_MASK),
		(PMIC_RGS_VPROC2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vproc2_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON2),
		(&val),
		(PMIC_RGS_VPROC2_DIG_MON_MASK),
		(PMIC_RGS_VPROC2_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON2),
		(val),
		(PMIC_RG_VPROC2_UG_SR_MASK),
		(PMIC_RG_VPROC2_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON2),
		(val),
		(PMIC_RG_VPROC2_LG_SR_MASK),
		(PMIC_RG_VPROC2_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON2),
		(val),
		(PMIC_RG_VPROC2_TMDL_MASK),
		(PMIC_RG_VPROC2_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON2),
		(val),
		(PMIC_RG_VPROC2_FUGON_MASK),
		(PMIC_RG_VPROC2_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON3),
		(val),
		(PMIC_RG_VPROC2_FLGON_MASK),
		(PMIC_RG_VPROC2_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON3),
		(val),
		(PMIC_RG_VPROC2_FCCM_MASK),
		(PMIC_RG_VPROC2_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON3),
		(val),
		(PMIC_RG_VPROC2_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPROC2_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON3),
		(&val),
		(PMIC_RG_VPROC2_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPROC2_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON3),
		(val),
		(PMIC_RG_VPROC2_RETENTION_EN_MASK),
		(PMIC_RG_VPROC2_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON3),
		(&val),
		(PMIC_RG_VPROC2_RETENTION_EN_MASK),
		(PMIC_RG_VPROC2_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON3),
		(val),
		(PMIC_RG_VPROC2_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VPROC2_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON3),
		(val),
		(PMIC_RG_VPROC2_DIGMON_SEL_MASK),
		(PMIC_RG_VPROC2_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON4),
		(val),
		(PMIC_RG_VPROC2_RSVH_MASK),
		(PMIC_RG_VPROC2_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON4),
		(val),
		(PMIC_RG_VPROC2_RSVL_MASK),
		(PMIC_RG_VPROC2_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_RCB_MASK),
		(PMIC_RG_VPROC2_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_VDIFFCAP_EN_MASK),
		(PMIC_RG_VPROC2_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON5),
		(&val),
		(PMIC_RG_VPROC2_VDIFFCAP_EN_MASK),
		(PMIC_RG_VPROC2_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_VBAT_HI_DIS_MASK),
		(PMIC_RG_VPROC2_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VPROC2_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_VOUT_HI_DIS_MASK),
		(PMIC_RG_VPROC2_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_dac_vref_1p1v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VPROC2_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON5),
		(&val),
		(PMIC_RG_VPROC2_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VPROC2_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_dac_vref_1p2v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VPROC2_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vproc2_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPROC2_ANA_CON5),
		(&val),
		(PMIC_RG_VPROC2_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VPROC2_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vproc2_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ANA_CON5),
		(val),
		(PMIC_RG_VPROC2_VDIFF_OFF_MASK),
		(PMIC_RG_VPROC2_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_sr_vbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_SR_VBAT_MASK),
		(PMIC_RG_VMODEM_SR_VBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_NDIS_EN_MASK),
		(PMIC_RG_VMODEM_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON0),
		(&val),
		(PMIC_RG_VMODEM_NDIS_EN_MASK),
		(PMIC_RG_VMODEM_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VMODEM_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON0),
		(&val),
		(PMIC_RG_VMODEM_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VMODEM_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_SLEEP_TIME_MASK),
		(PMIC_RG_VMODEM_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_LOOPSEL_DIS_MASK),
		(PMIC_RG_VMODEM_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_RAMP_AC_MASK),
		(PMIC_RG_VMODEM_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_TB_DIS_MASK),
		(PMIC_RG_VMODEM_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_TB_PFM_OFF_MASK),
		(PMIC_RG_VMODEM_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_TB_VREFSEL_MASK),
		(PMIC_RG_VMODEM_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_TON_EXTEND_EN_MASK),
		(PMIC_RG_VMODEM_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON0),
		(&val),
		(PMIC_RG_VMODEM_TON_EXTEND_EN_MASK),
		(PMIC_RG_VMODEM_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_URT_EN_MASK),
		(PMIC_RG_VMODEM_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON0),
		(&val),
		(PMIC_RG_VMODEM_URT_EN_MASK),
		(PMIC_RG_VMODEM_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VMODEM_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON0),
		(&val),
		(PMIC_RG_VMODEM_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VMODEM_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_OVP_EN_MASK),
		(PMIC_RG_VMODEM_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON0),
		(&val),
		(PMIC_RG_VMODEM_OVP_EN_MASK),
		(PMIC_RG_VMODEM_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON0),
		(val),
		(PMIC_RG_VMODEM_OVP_VREFSEL_MASK),
		(PMIC_RG_VMODEM_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON1),
		(val),
		(PMIC_RG_VMODEM_OCN_MASK),
		(PMIC_RG_VMODEM_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON1),
		(val),
		(PMIC_RG_VMODEM_OCP_MASK),
		(PMIC_RG_VMODEM_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON1),
		(val),
		(PMIC_RG_VMODEM_PFM_PEAK_MASK),
		(PMIC_RG_VMODEM_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON1),
		(val),
		(PMIC_RG_VMODEM_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VMODEM_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vmodem_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON1),
		(&val),
		(PMIC_RGS_VMODEM_OC_STATUS_MASK),
		(PMIC_RGS_VMODEM_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vmodem_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON2),
		(&val),
		(PMIC_RGS_VMODEM_DIG_MON_MASK),
		(PMIC_RGS_VMODEM_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON2),
		(val),
		(PMIC_RG_VMODEM_UG_SR_MASK),
		(PMIC_RG_VMODEM_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON2),
		(val),
		(PMIC_RG_VMODEM_LG_SR_MASK),
		(PMIC_RG_VMODEM_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON2),
		(val),
		(PMIC_RG_VMODEM_TMDL_MASK),
		(PMIC_RG_VMODEM_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON2),
		(val),
		(PMIC_RG_VMODEM_FUGON_MASK),
		(PMIC_RG_VMODEM_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON3),
		(val),
		(PMIC_RG_VMODEM_FLGON_MASK),
		(PMIC_RG_VMODEM_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON3),
		(val),
		(PMIC_RG_VMODEM_FCCM_MASK),
		(PMIC_RG_VMODEM_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON3),
		(val),
		(PMIC_RG_VMODEM_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VMODEM_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON3),
		(&val),
		(PMIC_RG_VMODEM_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VMODEM_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON3),
		(val),
		(PMIC_RG_VMODEM_RETENTION_EN_MASK),
		(PMIC_RG_VMODEM_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON3),
		(&val),
		(PMIC_RG_VMODEM_RETENTION_EN_MASK),
		(PMIC_RG_VMODEM_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON3),
		(val),
		(PMIC_RG_VMODEM_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VMODEM_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON3),
		(val),
		(PMIC_RG_VMODEM_DIGMON_SEL_MASK),
		(PMIC_RG_VMODEM_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON4),
		(val),
		(PMIC_RG_VMODEM_RSVH_MASK),
		(PMIC_RG_VMODEM_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON4),
		(val),
		(PMIC_RG_VMODEM_RSVL_MASK),
		(PMIC_RG_VMODEM_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_RCB_MASK),
		(PMIC_RG_VMODEM_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_VDIFFCAP_EN_MASK),
		(PMIC_RG_VMODEM_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON5),
		(&val),
		(PMIC_RG_VMODEM_VDIFFCAP_EN_MASK),
		(PMIC_RG_VMODEM_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_VBAT_HI_DIS_MASK),
		(PMIC_RG_VMODEM_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VMODEM_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_VOUT_HI_DIS_MASK),
		(PMIC_RG_VMODEM_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_dac_vref_1p1v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VMODEM_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON5),
		(&val),
		(PMIC_RG_VMODEM_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VMODEM_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_dac_vref_1p2v_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VMODEM_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vmodem_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VMODEM_ANA_CON5),
		(&val),
		(PMIC_RG_VMODEM_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VMODEM_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vmodem_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VMODEM_ANA_CON5),
		(val),
		(PMIC_RG_VMODEM_VDIFF_OFF_MASK),
		(PMIC_RG_VMODEM_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_sr_vbat(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_SR_VBAT_MASK),
		(PMIC_RG_VPU_SR_VBAT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_NDIS_EN_MASK),
		(PMIC_RG_VPU_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON0),
		(&val),
		(PMIC_RG_VPU_NDIS_EN_MASK),
		(PMIC_RG_VPU_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_pwm_rstramp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VPU_PWM_RSTRAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_pwm_rstramp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON0),
		(&val),
		(PMIC_RG_VPU_PWM_RSTRAMP_EN_MASK),
		(PMIC_RG_VPU_PWM_RSTRAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_SLEEP_TIME_MASK),
		(PMIC_RG_VPU_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_loopsel_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_LOOPSEL_DIS_MASK),
		(PMIC_RG_VPU_LOOPSEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ramp_ac(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_RAMP_AC_MASK),
		(PMIC_RG_VPU_RAMP_AC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_TB_DIS_MASK),
		(PMIC_RG_VPU_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_tb_pfm_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_TB_PFM_OFF_MASK),
		(PMIC_RG_VPU_TB_PFM_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_tb_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_TB_VREFSEL_MASK),
		(PMIC_RG_VPU_TB_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ton_extend_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_TON_EXTEND_EN_MASK),
		(PMIC_RG_VPU_TON_EXTEND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_ton_extend_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON0),
		(&val),
		(PMIC_RG_VPU_TON_EXTEND_EN_MASK),
		(PMIC_RG_VPU_TON_EXTEND_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_urt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_URT_EN_MASK),
		(PMIC_RG_VPU_URT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_urt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON0),
		(&val),
		(PMIC_RG_VPU_URT_EN_MASK),
		(PMIC_RG_VPU_URT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_dummy_load_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VPU_DUMMY_LOAD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_dummy_load_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON0),
		(&val),
		(PMIC_RG_VPU_DUMMY_LOAD_EN_MASK),
		(PMIC_RG_VPU_DUMMY_LOAD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_ovp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_OVP_EN_MASK),
		(PMIC_RG_VPU_OVP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_ovp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON0),
		(&val),
		(PMIC_RG_VPU_OVP_EN_MASK),
		(PMIC_RG_VPU_OVP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_ovp_vrefsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON0),
		(val),
		(PMIC_RG_VPU_OVP_VREFSEL_MASK),
		(PMIC_RG_VPU_OVP_VREFSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON1),
		(val),
		(PMIC_RG_VPU_OCN_MASK),
		(PMIC_RG_VPU_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON1),
		(val),
		(PMIC_RG_VPU_OCP_MASK),
		(PMIC_RG_VPU_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON1),
		(val),
		(PMIC_RG_VPU_PFM_PEAK_MASK),
		(PMIC_RG_VPU_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_sonic_pfm_peak(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON1),
		(val),
		(PMIC_RG_VPU_SONIC_PFM_PEAK_MASK),
		(PMIC_RG_VPU_SONIC_PFM_PEAK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vpu_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON1),
		(&val),
		(PMIC_RGS_VPU_OC_STATUS_MASK),
		(PMIC_RGS_VPU_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vpu_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON2),
		(&val),
		(PMIC_RGS_VPU_DIG_MON_MASK),
		(PMIC_RGS_VPU_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON2),
		(val),
		(PMIC_RG_VPU_UG_SR_MASK),
		(PMIC_RG_VPU_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON2),
		(val),
		(PMIC_RG_VPU_LG_SR_MASK),
		(PMIC_RG_VPU_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON2),
		(val),
		(PMIC_RG_VPU_TMDL_MASK),
		(PMIC_RG_VPU_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON2),
		(val),
		(PMIC_RG_VPU_FUGON_MASK),
		(PMIC_RG_VPU_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON3),
		(val),
		(PMIC_RG_VPU_FLGON_MASK),
		(PMIC_RG_VPU_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_fccm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON3),
		(val),
		(PMIC_RG_VPU_FCCM_MASK),
		(PMIC_RG_VPU_FCCM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON3),
		(val),
		(PMIC_RG_VPU_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPU_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON3),
		(&val),
		(PMIC_RG_VPU_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPU_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON3),
		(val),
		(PMIC_RG_VPU_RETENTION_EN_MASK),
		(PMIC_RG_VPU_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON3),
		(&val),
		(PMIC_RG_VPU_RETENTION_EN_MASK),
		(PMIC_RG_VPU_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_vdiff_groundsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON3),
		(val),
		(PMIC_RG_VPU_VDIFF_GROUNDSEL_MASK),
		(PMIC_RG_VPU_VDIFF_GROUNDSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON3),
		(val),
		(PMIC_RG_VPU_DIGMON_SEL_MASK),
		(PMIC_RG_VPU_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_rsvh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON4),
		(val),
		(PMIC_RG_VPU_RSVH_MASK),
		(PMIC_RG_VPU_RSVH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_rsvl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON4),
		(val),
		(PMIC_RG_VPU_RSVL_MASK),
		(PMIC_RG_VPU_RSVL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_rcb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_RCB_MASK),
		(PMIC_RG_VPU_RCB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_vdiffcap_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_VDIFFCAP_EN_MASK),
		(PMIC_RG_VPU_VDIFFCAP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_vdiffcap_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON5),
		(&val),
		(PMIC_RG_VPU_VDIFFCAP_EN_MASK),
		(PMIC_RG_VPU_VDIFFCAP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_vbat_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_VBAT_HI_DIS_MASK),
		(PMIC_RG_VPU_VBAT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_vbat_low_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_VBAT_LOW_DIS_MASK),
		(PMIC_RG_VPU_VBAT_LOW_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_vout_hi_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_VOUT_HI_DIS_MASK),
		(PMIC_RG_VPU_VOUT_HI_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_dac_vref_1p1v_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VPU_DAC_VREF_1P1V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_dac_vref_1p1v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON5),
		(&val),
		(PMIC_RG_VPU_DAC_VREF_1P1V_EN_MASK),
		(PMIC_RG_VPU_DAC_VREF_1P1V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_dac_vref_1p2v_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VPU_DAC_VREF_1P2V_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpu_dac_vref_1p2v_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPU_ANA_CON5),
		(&val),
		(PMIC_RG_VPU_DAC_VREF_1P2V_EN_MASK),
		(PMIC_RG_VPU_DAC_VREF_1P2V_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpu_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPU_ANA_CON5),
		(val),
		(PMIC_RG_VPU_VDIFF_OFF_MASK),
		(PMIC_RG_VPU_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ton_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_TON_TRIM_EN_MASK),
		(PMIC_RG_VS1_TON_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs1_ton_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON0),
		(&val),
		(PMIC_RG_VS1_TON_TRIM_EN_MASK),
		(PMIC_RG_VS1_TON_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs1_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_TB_DIS_MASK),
		(PMIC_RG_VS1_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_fpwm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_FPWM_MASK),
		(PMIC_RG_VS1_FPWM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_pfm_ton(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_PFM_TON_MASK),
		(PMIC_RG_VS1_PFM_TON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_vref_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_VREF_TRIM_EN_MASK),
		(PMIC_RG_VS1_VREF_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs1_vref_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON0),
		(&val),
		(PMIC_RG_VS1_VREF_TRIM_EN_MASK),
		(PMIC_RG_VS1_VREF_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs1_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_SLEEP_TIME_MASK),
		(PMIC_RG_VS1_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_nlim_gating(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_NLIM_GATING_MASK),
		(PMIC_RG_VS1_NLIM_GATING_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_vrefup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_VREFUP_MASK),
		(PMIC_RG_VS1_VREFUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_tb_width(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_TB_WIDTH_MASK),
		(PMIC_RG_VS1_TB_WIDTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_vdiffpfmoff(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON0),
		(val),
		(PMIC_RG_VS1_VDIFFPFMOFF_MASK),
		(PMIC_RG_VS1_VDIFFPFMOFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_VDIFF_OFF_MASK),
		(PMIC_RG_VS1_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_UG_SR_MASK),
		(PMIC_RG_VS1_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_LG_SR_MASK),
		(PMIC_RG_VS1_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_NDIS_EN_MASK),
		(PMIC_RG_VS1_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs1_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON1),
		(&val),
		(PMIC_RG_VS1_NDIS_EN_MASK),
		(PMIC_RG_VS1_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs1_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_TMDL_MASK),
		(PMIC_RG_VS1_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_cmpv_fcot(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_CMPV_FCOT_MASK),
		(PMIC_RG_VS1_CMPV_FCOT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON1),
		(val),
		(PMIC_RG_VS1_RSV1_MASK),
		(PMIC_RG_VS1_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON2),
		(val),
		(PMIC_RG_VS1_RSV2_MASK),
		(PMIC_RG_VS1_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON2),
		(val),
		(PMIC_RG_VS1_FUGON_MASK),
		(PMIC_RG_VS1_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON2),
		(val),
		(PMIC_RG_VS1_FLGON_MASK),
		(PMIC_RG_VS1_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vs1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON2),
		(&val),
		(PMIC_RGS_VS1_OC_STATUS_MASK),
		(PMIC_RGS_VS1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vs1_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON3),
		(&val),
		(PMIC_RGS_VS1_DIG_MON_MASK),
		(PMIC_RGS_VS1_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs1_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON3),
		(val),
		(PMIC_RG_VS1_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VS1_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs1_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON3),
		(&val),
		(PMIC_RG_VS1_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VS1_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs1_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON3),
		(val),
		(PMIC_RG_VS1_OCP_MASK),
		(PMIC_RG_VS1_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON3),
		(val),
		(PMIC_RG_VS1_OCN_MASK),
		(PMIC_RG_VS1_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_sonic_pfm_ton(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON3),
		(val),
		(PMIC_RG_VS1_SONIC_PFM_TON_MASK),
		(PMIC_RG_VS1_SONIC_PFM_TON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON3),
		(val),
		(PMIC_RG_VS1_RETENTION_EN_MASK),
		(PMIC_RG_VS1_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs1_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS1_ANA_CON3),
		(&val),
		(PMIC_RG_VS1_RETENTION_EN_MASK),
		(PMIC_RG_VS1_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs1_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS1_ANA_CON3),
		(val),
		(PMIC_RG_VS1_DIGMON_SEL_MASK),
		(PMIC_RG_VS1_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ton_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_TON_TRIM_EN_MASK),
		(PMIC_RG_VS2_TON_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs2_ton_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON0),
		(&val),
		(PMIC_RG_VS2_TON_TRIM_EN_MASK),
		(PMIC_RG_VS2_TON_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs2_tb_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_TB_DIS_MASK),
		(PMIC_RG_VS2_TB_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_fpwm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_FPWM_MASK),
		(PMIC_RG_VS2_FPWM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_pfm_ton(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_PFM_TON_MASK),
		(PMIC_RG_VS2_PFM_TON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_vref_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_VREF_TRIM_EN_MASK),
		(PMIC_RG_VS2_VREF_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs2_vref_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON0),
		(&val),
		(PMIC_RG_VS2_VREF_TRIM_EN_MASK),
		(PMIC_RG_VS2_VREF_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs2_sleep_time(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_SLEEP_TIME_MASK),
		(PMIC_RG_VS2_SLEEP_TIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_nlim_gating(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_NLIM_GATING_MASK),
		(PMIC_RG_VS2_NLIM_GATING_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_vrefup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_VREFUP_MASK),
		(PMIC_RG_VS2_VREFUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_tb_width(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_TB_WIDTH_MASK),
		(PMIC_RG_VS2_TB_WIDTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_vdiffpfmoff(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON0),
		(val),
		(PMIC_RG_VS2_VDIFFPFMOFF_MASK),
		(PMIC_RG_VS2_VDIFFPFMOFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_vdiff_off(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_VDIFF_OFF_MASK),
		(PMIC_RG_VS2_VDIFF_OFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ug_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_UG_SR_MASK),
		(PMIC_RG_VS2_UG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_lg_sr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_LG_SR_MASK),
		(PMIC_RG_VS2_LG_SR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_NDIS_EN_MASK),
		(PMIC_RG_VS2_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs2_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON1),
		(&val),
		(PMIC_RG_VS2_NDIS_EN_MASK),
		(PMIC_RG_VS2_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs2_tmdl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_TMDL_MASK),
		(PMIC_RG_VS2_TMDL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_cmpv_fcot(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_CMPV_FCOT_MASK),
		(PMIC_RG_VS2_CMPV_FCOT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON1),
		(val),
		(PMIC_RG_VS2_RSV1_MASK),
		(PMIC_RG_VS2_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON2),
		(val),
		(PMIC_RG_VS2_RSV2_MASK),
		(PMIC_RG_VS2_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_fugon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON2),
		(val),
		(PMIC_RG_VS2_FUGON_MASK),
		(PMIC_RG_VS2_FUGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_flgon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON2),
		(val),
		(PMIC_RG_VS2_FLGON_MASK),
		(PMIC_RG_VS2_FLGON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vs2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON2),
		(&val),
		(PMIC_RGS_VS2_OC_STATUS_MASK),
		(PMIC_RGS_VS2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vs2_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON3),
		(&val),
		(PMIC_RGS_VS2_DIG_MON_MASK),
		(PMIC_RGS_VS2_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs2_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON3),
		(val),
		(PMIC_RG_VS2_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VS2_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs2_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON3),
		(&val),
		(PMIC_RG_VS2_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VS2_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs2_ocp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON3),
		(val),
		(PMIC_RG_VS2_OCP_MASK),
		(PMIC_RG_VS2_OCP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ocn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON3),
		(val),
		(PMIC_RG_VS2_OCN_MASK),
		(PMIC_RG_VS2_OCN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_sonic_pfm_ton(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON3),
		(val),
		(PMIC_RG_VS2_SONIC_PFM_TON_MASK),
		(PMIC_RG_VS2_SONIC_PFM_TON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_retention_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON3),
		(val),
		(PMIC_RG_VS2_RETENTION_EN_MASK),
		(PMIC_RG_VS2_RETENTION_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vs2_retention_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VS2_ANA_CON3),
		(&val),
		(PMIC_RG_VS2_RETENTION_EN_MASK),
		(PMIC_RG_VS2_RETENTION_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vs2_digmon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VS2_ANA_CON3),
		(val),
		(PMIC_RG_VS2_DIGMON_SEL_MASK),
		(PMIC_RG_VS2_DIGMON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_NDIS_EN_MASK),
		(PMIC_RG_VPA_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpa_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPA_ANA_CON0),
		(&val),
		(PMIC_RG_VPA_NDIS_EN_MASK),
		(PMIC_RG_VPA_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpa_modeset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_MODESET_MASK),
		(PMIC_RG_VPA_MODESET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpa_modeset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPA_ANA_CON0),
		(&val),
		(PMIC_RG_VPA_MODESET_MASK),
		(PMIC_RG_VPA_MODESET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpa_cc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_CC_MASK),
		(PMIC_RG_VPA_CC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_csr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_CSR_MASK),
		(PMIC_RG_VPA_CSR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_csmir(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_CSMIR_MASK),
		(PMIC_RG_VPA_CSMIR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_csl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_CSL_MASK),
		(PMIC_RG_VPA_CSL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_SLP_MASK),
		(PMIC_RG_VPA_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_zxft_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_ZXFT_L_MASK),
		(PMIC_RG_VPA_ZXFT_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_cp_fwupoff(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_CP_FWUPOFF_MASK),
		(PMIC_RG_VPA_CP_FWUPOFF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_nonaudible_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON0),
		(val),
		(PMIC_RG_VPA_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPA_NONAUDIBLE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vpa_nonaudible_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPA_ANA_CON0),
		(&val),
		(PMIC_RG_VPA_NONAUDIBLE_EN_MASK),
		(PMIC_RG_VPA_NONAUDIBLE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpa_rzsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON1),
		(val),
		(PMIC_RG_VPA_RZSEL_MASK),
		(PMIC_RG_VPA_RZSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_slew(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON1),
		(val),
		(PMIC_RG_VPA_SLEW_MASK),
		(PMIC_RG_VPA_SLEW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_slew_nmos(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON1),
		(val),
		(PMIC_RG_VPA_SLEW_NMOS_MASK),
		(PMIC_RG_VPA_SLEW_NMOS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_min_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON1),
		(val),
		(PMIC_RG_VPA_MIN_ON_MASK),
		(PMIC_RG_VPA_MIN_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_burst_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON1),
		(val),
		(PMIC_RG_VPA_BURST_SEL_MASK),
		(PMIC_RG_VPA_BURST_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_zc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON2),
		(val),
		(PMIC_RG_VPA_ZC_MASK),
		(PMIC_RG_VPA_ZC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON2),
		(val),
		(PMIC_RG_VPA_RSV1_MASK),
		(PMIC_RG_VPA_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_rsv2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON3),
		(val),
		(PMIC_RG_VPA_RSV2_MASK),
		(PMIC_RG_VPA_RSV2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_vpa_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPA_ANA_CON3),
		(&val),
		(PMIC_RGS_VPA_OC_STATUS_MASK),
		(PMIC_RGS_VPA_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vpa_azc_zx(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPA_ANA_CON3),
		(&val),
		(PMIC_RGS_VPA_AZC_ZX_MASK),
		(PMIC_RGS_VPA_AZC_ZX_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vpa_dig_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VPA_ANA_CON3),
		(&val),
		(PMIC_RGS_VPA_DIG_MON_MASK),
		(PMIC_RGS_VPA_DIG_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vpa_pfm_dlc1_vth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON3),
		(val),
		(PMIC_RG_VPA_PFM_DLC1_VTH_MASK),
		(PMIC_RG_VPA_PFM_DLC1_VTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_pfm_dlc2_vth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON3),
		(val),
		(PMIC_RG_VPA_PFM_DLC2_VTH_MASK),
		(PMIC_RG_VPA_PFM_DLC2_VTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_pfm_dlc3_vth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON4),
		(val),
		(PMIC_RG_VPA_PFM_DLC3_VTH_MASK),
		(PMIC_RG_VPA_PFM_DLC3_VTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_pfm_dlc4_vth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON4),
		(val),
		(PMIC_RG_VPA_PFM_DLC4_VTH_MASK),
		(PMIC_RG_VPA_PFM_DLC4_VTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_zxft_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON4),
		(val),
		(PMIC_RG_VPA_ZXFT_H_MASK),
		(PMIC_RG_VPA_ZXFT_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_decode_tmb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON4),
		(val),
		(PMIC_RG_VPA_DECODE_TMB_MASK),
		(PMIC_RG_VPA_DECODE_TMB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_rsv3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPA_ANA_CON4),
		(val),
		(PMIC_RG_VPA_RSV3_MASK),
		(PMIC_RG_VPA_RSV3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_0),
		(val),
		(PMIC_RG_VPROC2_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VPROC2_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_0),
		(val),
		(PMIC_RG_VPROC2_CCOMP_MASK),
		(PMIC_RG_VPROC2_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_0),
		(val),
		(PMIC_RG_VPROC2_RCOMP_MASK),
		(PMIC_RG_VPROC2_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_0),
		(val),
		(PMIC_RG_VPROC2_RAMP_SLP_MASK),
		(PMIC_RG_VPROC2_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_0),
		(val),
		(PMIC_RG_VPROC2_NLIM_TRIM_MASK),
		(PMIC_RG_VPROC2_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_1),
		(val),
		(PMIC_RG_VPROC2_CSNSLP_TRIM_MASK),
		(PMIC_RG_VPROC2_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_1),
		(val),
		(PMIC_RG_VPROC2_ZC_TRIM_MASK),
		(PMIC_RG_VPROC2_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_2),
		(val),
		(PMIC_RG_VPROC2_CSPSLP_TRIM_MASK),
		(PMIC_RG_VPROC2_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_3),
		(val),
		(PMIC_RG_VMODEM_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VMODEM_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_3),
		(val),
		(PMIC_RG_VMODEM_CCOMP_MASK),
		(PMIC_RG_VMODEM_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_3),
		(val),
		(PMIC_RG_VMODEM_RCOMP_MASK),
		(PMIC_RG_VMODEM_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_3),
		(val),
		(PMIC_RG_VMODEM_RAMP_SLP_MASK),
		(PMIC_RG_VMODEM_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_3),
		(val),
		(PMIC_RG_VMODEM_NLIM_TRIM_MASK),
		(PMIC_RG_VMODEM_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_4),
		(val),
		(PMIC_RG_VMODEM_CSNSLP_TRIM_MASK),
		(PMIC_RG_VMODEM_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_4),
		(val),
		(PMIC_RG_VMODEM_ZC_TRIM_MASK),
		(PMIC_RG_VMODEM_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_5),
		(val),
		(PMIC_RG_VMODEM_CSPSLP_TRIM_MASK),
		(PMIC_RG_VMODEM_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_driver_sr_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_6),
		(val),
		(PMIC_RG_VPU_DRIVER_SR_TRIM_MASK),
		(PMIC_RG_VPU_DRIVER_SR_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_6),
		(val),
		(PMIC_RG_VPU_CCOMP_MASK),
		(PMIC_RG_VPU_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_6),
		(val),
		(PMIC_RG_VPU_RCOMP_MASK),
		(PMIC_RG_VPU_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_6),
		(val),
		(PMIC_RG_VPU_RAMP_SLP_MASK),
		(PMIC_RG_VPU_RAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_6),
		(val),
		(PMIC_RG_VPU_NLIM_TRIM_MASK),
		(PMIC_RG_VPU_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_7),
		(val),
		(PMIC_RG_VPU_CSNSLP_TRIM_MASK),
		(PMIC_RG_VPU_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_7),
		(val),
		(PMIC_RG_VPU_ZC_TRIM_MASK),
		(PMIC_RG_VPU_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_8),
		(val),
		(PMIC_RG_VPU_CSPSLP_TRIM_MASK),
		(PMIC_RG_VPU_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_9),
		(val),
		(PMIC_RG_VS1_CSNSLP_TRIM_MASK),
		(PMIC_RG_VS1_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_9),
		(val),
		(PMIC_RG_VS1_CCOMP_MASK),
		(PMIC_RG_VS1_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_9),
		(val),
		(PMIC_RG_VS1_RCOMP_MASK),
		(PMIC_RG_VS1_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_cotramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_9),
		(val),
		(PMIC_RG_VS1_COTRAMP_SLP_MASK),
		(PMIC_RG_VS1_COTRAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_9),
		(val),
		(PMIC_RG_VS1_ZC_TRIM_MASK),
		(PMIC_RG_VS1_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ldo_sense(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_9),
		(val),
		(PMIC_RG_VS1_LDO_SENSE_MASK),
		(PMIC_RG_VS1_LDO_SENSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_10),
		(val),
		(PMIC_RG_VS1_CSPSLP_TRIM_MASK),
		(PMIC_RG_VS1_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_10),
		(val),
		(PMIC_RG_VS1_NLIM_TRIM_MASK),
		(PMIC_RG_VS1_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_csnslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_11),
		(val),
		(PMIC_RG_VS2_CSNSLP_TRIM_MASK),
		(PMIC_RG_VS2_CSNSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ccomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_11),
		(val),
		(PMIC_RG_VS2_CCOMP_MASK),
		(PMIC_RG_VS2_CCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_rcomp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_11),
		(val),
		(PMIC_RG_VS2_RCOMP_MASK),
		(PMIC_RG_VS2_RCOMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_cotramp_slp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_11),
		(val),
		(PMIC_RG_VS2_COTRAMP_SLP_MASK),
		(PMIC_RG_VS2_COTRAMP_SLP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_zc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_11),
		(val),
		(PMIC_RG_VS2_ZC_TRIM_MASK),
		(PMIC_RG_VS2_ZC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ldo_sense(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_11),
		(val),
		(PMIC_RG_VS2_LDO_SENSE_MASK),
		(PMIC_RG_VS2_LDO_SENSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_cspslp_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_12),
		(val),
		(PMIC_RG_VS2_CSPSLP_TRIM_MASK),
		(PMIC_RG_VS2_CSPSLP_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_nlim_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_12),
		(val),
		(PMIC_RG_VS2_NLIM_TRIM_MASK),
		(PMIC_RG_VS2_NLIM_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vproc2_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_13),
		(val),
		(PMIC_RG_VPROC2_TON_TRIM_MASK),
		(PMIC_RG_VPROC2_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vmodem_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_13),
		(val),
		(PMIC_RG_VMODEM_TON_TRIM_MASK),
		(PMIC_RG_VMODEM_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpu_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_14),
		(val),
		(PMIC_RG_VPU_TON_TRIM_MASK),
		(PMIC_RG_VPU_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs1_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_14),
		(val),
		(PMIC_RG_VS1_TON_TRIM_MASK),
		(PMIC_RG_VS1_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vs2_ton_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_15),
		(val),
		(PMIC_RG_VS2_TON_TRIM_MASK),
		(PMIC_RG_VS2_TON_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vpa_nlim_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VPROC2_ELR_15),
		(val),
		(PMIC_RG_VPA_NLIM_SEL_MASK),
		(PMIC_RG_VPA_NLIM_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_LDO_32K_CK_PDN_MASK),
		(PMIC_RG_LDO_32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_intrp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_LDO_INTRP_CK_PDN_MASK),
		(PMIC_RG_LDO_INTRP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_1m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_LDO_1M_CK_PDN_MASK),
		(PMIC_RG_LDO_1M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_26m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_LDO_26M_CK_PDN_MASK),
		(PMIC_RG_LDO_26M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_32k_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_LDO_32K_CK_PDN_HWEN_MASK),
		(PMIC_RG_LDO_32K_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_intrp_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_LDO_INTRP_CK_PDN_HWEN_MASK),
		(PMIC_RG_LDO_INTRP_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_1m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_LDO_1M_CK_PDN_HWEN_MASK),
		(PMIC_RG_LDO_1M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_26m_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_TOP_TOP_CKHWEN_CON0),
		(val),
		(PMIC_RG_LDO_26M_CK_PDN_HWEN_MASK),
		(PMIC_RG_LDO_26M_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_dcm_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CLK_DCM_CON0),
		(val),
		(PMIC_RG_LDO_DCM_MODE_MASK),
		(PMIC_RG_LDO_DCM_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_dcm_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_CLK_DCM_CON0),
		(&val),
		(PMIC_RG_LDO_DCM_MODE_MASK),
		(PMIC_RG_LDO_DCM_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_osc_sel_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CLK_VSRAM_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_OSC_SEL_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OSC_SEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_osc_sel_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CLK_VSRAM_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_OSC_SEL_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OSC_SEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_osc_sel_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CLK_VSRAM_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OSC_SEL_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OSC_SEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_osc_sel_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CLK_VSRAM_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_OSC_SEL_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OSC_SEL_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_en_vfe28_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VFE28_OC_MASK),
		(PMIC_RG_INT_EN_VFE28_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vfe28_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VFE28_OC_MASK),
		(PMIC_RG_INT_EN_VFE28_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vxo22_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VXO22_OC_MASK),
		(PMIC_RG_INT_EN_VXO22_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vxo22_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VXO22_OC_MASK),
		(PMIC_RG_INT_EN_VXO22_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vrf18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VRF18_OC_MASK),
		(PMIC_RG_INT_EN_VRF18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vrf18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VRF18_OC_MASK),
		(PMIC_RG_INT_EN_VRF18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vrf12_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VRF12_OC_MASK),
		(PMIC_RG_INT_EN_VRF12_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vrf12_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VRF12_OC_MASK),
		(PMIC_RG_INT_EN_VRF12_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vefuse_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VEFUSE_OC_MASK),
		(PMIC_RG_INT_EN_VEFUSE_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vefuse_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VEFUSE_OC_MASK),
		(PMIC_RG_INT_EN_VEFUSE_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vcn33_1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VCN33_1_OC_MASK),
		(PMIC_RG_INT_EN_VCN33_1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vcn33_1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VCN33_1_OC_MASK),
		(PMIC_RG_INT_EN_VCN33_1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vcn33_2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VCN33_2_OC_MASK),
		(PMIC_RG_INT_EN_VCN33_2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vcn33_2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VCN33_2_OC_MASK),
		(PMIC_RG_INT_EN_VCN33_2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vcn13_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VCN13_OC_MASK),
		(PMIC_RG_INT_EN_VCN13_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vcn13_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VCN13_OC_MASK),
		(PMIC_RG_INT_EN_VCN13_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vcn18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VCN18_OC_MASK),
		(PMIC_RG_INT_EN_VCN18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vcn18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VCN18_OC_MASK),
		(PMIC_RG_INT_EN_VCN18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_va09_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VA09_OC_MASK),
		(PMIC_RG_INT_EN_VA09_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_va09_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VA09_OC_MASK),
		(PMIC_RG_INT_EN_VA09_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vcamio_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VCAMIO_OC_MASK),
		(PMIC_RG_INT_EN_VCAMIO_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vcamio_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VCAMIO_OC_MASK),
		(PMIC_RG_INT_EN_VCAMIO_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_va12_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VA12_OC_MASK),
		(PMIC_RG_INT_EN_VA12_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_va12_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VA12_OC_MASK),
		(PMIC_RG_INT_EN_VA12_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vaux18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VAUX18_OC_MASK),
		(PMIC_RG_INT_EN_VAUX18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vaux18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VAUX18_OC_MASK),
		(PMIC_RG_INT_EN_VAUX18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vaud18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VAUD18_OC_MASK),
		(PMIC_RG_INT_EN_VAUD18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vaud18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VAUD18_OC_MASK),
		(PMIC_RG_INT_EN_VAUD18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vio18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VIO18_OC_MASK),
		(PMIC_RG_INT_EN_VIO18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vio18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VIO18_OC_MASK),
		(PMIC_RG_INT_EN_VIO18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vsram_proc1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_VSRAM_PROC1_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_PROC1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vsram_proc1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_VSRAM_PROC1_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_PROC1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vsram_proc2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VSRAM_PROC2_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_PROC2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vsram_proc2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VSRAM_PROC2_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_PROC2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vsram_others_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VSRAM_OTHERS_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_OTHERS_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vsram_others_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VSRAM_OTHERS_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_OTHERS_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vsram_md_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VSRAM_MD_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_MD_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vsram_md_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VSRAM_MD_OC_MASK),
		(PMIC_RG_INT_EN_VSRAM_MD_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vemc_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VEMC_OC_MASK),
		(PMIC_RG_INT_EN_VEMC_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vemc_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VEMC_OC_MASK),
		(PMIC_RG_INT_EN_VEMC_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vsim1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VSIM1_OC_MASK),
		(PMIC_RG_INT_EN_VSIM1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vsim1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VSIM1_OC_MASK),
		(PMIC_RG_INT_EN_VSIM1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vsim2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VSIM2_OC_MASK),
		(PMIC_RG_INT_EN_VSIM2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vsim2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VSIM2_OC_MASK),
		(PMIC_RG_INT_EN_VSIM2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vusb_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VUSB_OC_MASK),
		(PMIC_RG_INT_EN_VUSB_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vusb_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VUSB_OC_MASK),
		(PMIC_RG_INT_EN_VUSB_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vrfck_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VRFCK_OC_MASK),
		(PMIC_RG_INT_EN_VRFCK_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vrfck_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VRFCK_OC_MASK),
		(PMIC_RG_INT_EN_VRFCK_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vbbck_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VBBCK_OC_MASK),
		(PMIC_RG_INT_EN_VBBCK_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vbbck_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VBBCK_OC_MASK),
		(PMIC_RG_INT_EN_VBBCK_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vbif28_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VBIF28_OC_MASK),
		(PMIC_RG_INT_EN_VBIF28_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vbif28_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VBIF28_OC_MASK),
		(PMIC_RG_INT_EN_VBIF28_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vibr_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VIBR_OC_MASK),
		(PMIC_RG_INT_EN_VIBR_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vibr_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VIBR_OC_MASK),
		(PMIC_RG_INT_EN_VIBR_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vio28_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VIO28_OC_MASK),
		(PMIC_RG_INT_EN_VIO28_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vio28_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VIO28_OC_MASK),
		(PMIC_RG_INT_EN_VIO28_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vm18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VM18_OC_MASK),
		(PMIC_RG_INT_EN_VM18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vm18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VM18_OC_MASK),
		(PMIC_RG_INT_EN_VM18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_vufs_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(val),
		(PMIC_RG_INT_EN_VUFS_OC_MASK),
		(PMIC_RG_INT_EN_VUFS_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_vufs_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_CON1),
		(&val),
		(PMIC_RG_INT_EN_VUFS_OC_MASK),
		(PMIC_RG_INT_EN_VUFS_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_vfe28_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VFE28_OC_MASK),
		(PMIC_RG_INT_MASK_VFE28_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vxo22_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VXO22_OC_MASK),
		(PMIC_RG_INT_MASK_VXO22_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vrf18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VRF18_OC_MASK),
		(PMIC_RG_INT_MASK_VRF18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vrf12_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VRF12_OC_MASK),
		(PMIC_RG_INT_MASK_VRF12_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vefuse_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VEFUSE_OC_MASK),
		(PMIC_RG_INT_MASK_VEFUSE_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vcn33_1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VCN33_1_OC_MASK),
		(PMIC_RG_INT_MASK_VCN33_1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vcn33_2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VCN33_2_OC_MASK),
		(PMIC_RG_INT_MASK_VCN33_2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vcn13_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VCN13_OC_MASK),
		(PMIC_RG_INT_MASK_VCN13_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vcn18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VCN18_OC_MASK),
		(PMIC_RG_INT_MASK_VCN18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_va09_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VA09_OC_MASK),
		(PMIC_RG_INT_MASK_VA09_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vcamio_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VCAMIO_OC_MASK),
		(PMIC_RG_INT_MASK_VCAMIO_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_va12_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VA12_OC_MASK),
		(PMIC_RG_INT_MASK_VA12_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vaux18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VAUX18_OC_MASK),
		(PMIC_RG_INT_MASK_VAUX18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vaud18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VAUD18_OC_MASK),
		(PMIC_RG_INT_MASK_VAUD18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vio18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VIO18_OC_MASK),
		(PMIC_RG_INT_MASK_VIO18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vsram_proc1_oc(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_VSRAM_PROC1_OC_MASK),
		(PMIC_RG_INT_MASK_VSRAM_PROC1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vsram_proc2_oc(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VSRAM_PROC2_OC_MASK),
		(PMIC_RG_INT_MASK_VSRAM_PROC2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vsram_others_oc(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VSRAM_OTHERS_OC_MASK),
		(PMIC_RG_INT_MASK_VSRAM_OTHERS_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vsram_md_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VSRAM_MD_OC_MASK),
		(PMIC_RG_INT_MASK_VSRAM_MD_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vemc_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VEMC_OC_MASK),
		(PMIC_RG_INT_MASK_VEMC_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vsim1_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VSIM1_OC_MASK),
		(PMIC_RG_INT_MASK_VSIM1_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vsim2_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VSIM2_OC_MASK),
		(PMIC_RG_INT_MASK_VSIM2_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vusb_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VUSB_OC_MASK),
		(PMIC_RG_INT_MASK_VUSB_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vrfck_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VRFCK_OC_MASK),
		(PMIC_RG_INT_MASK_VRFCK_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vbbck_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VBBCK_OC_MASK),
		(PMIC_RG_INT_MASK_VBBCK_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vbif28_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VBIF28_OC_MASK),
		(PMIC_RG_INT_MASK_VBIF28_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vibr_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VIBR_OC_MASK),
		(PMIC_RG_INT_MASK_VIBR_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vio28_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VIO28_OC_MASK),
		(PMIC_RG_INT_MASK_VIO28_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vm18_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VM18_OC_MASK),
		(PMIC_RG_INT_MASK_VM18_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_vufs_oc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_INT_MASK_CON1),
		(val),
		(PMIC_RG_INT_MASK_VUFS_OC_MASK),
		(PMIC_RG_INT_MASK_VUFS_OC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vfe28_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VFE28_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VFE28_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vxo22_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VXO22_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VXO22_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vrf18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VRF18_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VRF18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vrf12_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VRF12_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VRF12_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vefuse_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VEFUSE_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VEFUSE_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vcn33_1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VCN33_1_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VCN33_1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vcn33_2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VCN33_2_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VCN33_2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vcn13_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VCN13_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VCN13_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vcn18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VCN18_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VCN18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_va09_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VA09_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VA09_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vcamio_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VCAMIO_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VCAMIO_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_va12_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VA12_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VA12_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vaux18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VAUX18_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VAUX18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vaud18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VAUD18_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VAUD18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vio18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VIO18_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VIO18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vsram_proc1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_PROC1_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_PROC1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vsram_proc2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_PROC2_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_PROC2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vsram_others_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_OTHERS_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_OTHERS_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vsram_md_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_MD_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VSRAM_MD_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vemc_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VEMC_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VEMC_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vsim1_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VSIM1_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VSIM1_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vsim2_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VSIM2_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VSIM2_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vusb_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VUSB_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VUSB_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vrfck_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VRFCK_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VRFCK_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vbbck_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VBBCK_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VBBCK_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vbif28_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VBIF28_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VBIF28_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vibr_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VIBR_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VIBR_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vio28_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VIO28_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VIO28_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vm18_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VM18_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VM18_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_vufs_oc(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_INT_RAW_STATUS1),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_VUFS_OC_MASK),
		(PMIC_RG_INT_RAW_STATUS_VUFS_OC_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TEST_CON0),
		(val),
		(PMIC_RG_LDO_MON_FLAG_SEL_MASK),
		(PMIC_RG_LDO_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_int_flag_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TEST_CON0),
		(val),
		(PMIC_RG_LDO_INT_FLAG_EN_MASK),
		(PMIC_RG_LDO_INT_FLAG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_int_flag_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TEST_CON0),
		(&val),
		(PMIC_RG_LDO_INT_FLAG_EN_MASK),
		(PMIC_RG_LDO_INT_FLAG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_mon_grp_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TEST_CON0),
		(val),
		(PMIC_RG_LDO_MON_GRP_SEL_MASK),
		(PMIC_RG_LDO_MON_GRP_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_wdt_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CON),
		(val),
		(PMIC_RG_LDO_WDT_MODE_MASK),
		(PMIC_RG_LDO_WDT_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_wdt_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_CON),
		(&val),
		(PMIC_RG_LDO_WDT_MODE_MASK),
		(PMIC_RG_LDO_WDT_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_dummy_load_gated_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CON),
		(val),
		(PMIC_RG_LDO_DUMMY_LOAD_GATED_DIS_MASK),
		(PMIC_RG_LDO_DUMMY_LOAD_GATED_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_lp_prot_disable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CON),
		(val),
		(PMIC_RG_LDO_LP_PROT_DISABLE_MASK),
		(PMIC_RG_LDO_LP_PROT_DISABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_lp_prot_disable(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_CON),
		(&val),
		(PMIC_RG_LDO_LP_PROT_DISABLE_MASK),
		(PMIC_RG_LDO_LP_PROT_DISABLE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_sleep_ctrl_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CON),
		(val),
		(PMIC_RG_LDO_SLEEP_CTRL_MODE_MASK),
		(PMIC_RG_LDO_SLEEP_CTRL_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_sleep_ctrl_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_TOP_CON),
		(&val),
		(PMIC_RG_LDO_SLEEP_CTRL_MODE_MASK),
		(PMIC_RG_LDO_SLEEP_CTRL_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_top_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CON),
		(val),
		(PMIC_RG_LDO_TOP_RSV1_MASK),
		(PMIC_RG_LDO_TOP_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_top_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_TOP_CON),
		(val),
		(PMIC_RG_LDO_TOP_RSV0_MASK),
		(PMIC_RG_LDO_TOP_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrtc28_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRTC28_CON),
		(val),
		(PMIC_RG_VRTC28_EN_MASK),
		(PMIC_RG_VRTC28_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrtc28_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRTC28_CON),
		(&val),
		(PMIC_RG_VRTC28_EN_MASK),
		(PMIC_RG_VRTC28_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrtc28_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRTC28_CON),
		(&val),
		(PMIC_DA_VRTC28_EN_MASK),
		(PMIC_DA_VRTC28_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_off_acktime_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ACK),
		(val),
		(PMIC_RG_VAUX18_OFF_ACKTIME_SEL_MASK),
		(PMIC_RG_VAUX18_OFF_ACKTIME_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_lp_acktime_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ACK),
		(val),
		(PMIC_RG_VAUX18_LP_ACKTIME_SEL_MASK),
		(PMIC_RG_VAUX18_LP_ACKTIME_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_lp_acktime_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ACK),
		(&val),
		(PMIC_RG_VAUX18_LP_ACKTIME_SEL_MASK),
		(PMIC_RG_VAUX18_LP_ACKTIME_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_off_acktime_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ACK),
		(val),
		(PMIC_RG_VBIF28_OFF_ACKTIME_SEL_MASK),
		(PMIC_RG_VBIF28_OFF_ACKTIME_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbif28_lp_acktime_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ACK),
		(val),
		(PMIC_RG_VBIF28_LP_ACKTIME_SEL_MASK),
		(PMIC_RG_VBIF28_LP_ACKTIME_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_lp_acktime_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ACK),
		(&val),
		(PMIC_RG_VBIF28_LP_ACKTIME_SEL_MASK),
		(PMIC_RG_VBIF28_LP_ACKTIME_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vow_ldo_vsram_core_dvs_done(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VOW_DVS_CON),
		(val),
		(PMIC_RG_VOW_LDO_VSRAM_CORE_DVS_DONE_MASK),
		(PMIC_RG_VOW_LDO_VSRAM_CORE_DVS_DONE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow_ldo_vsram_core_dvs_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VOW_DVS_CON),
		(val),
		(PMIC_RG_VOW_LDO_VSRAM_CORE_DVS_SW_MODE_MASK),
		(PMIC_RG_VOW_LDO_VSRAM_CORE_DVS_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vow_ldo_vsram_core_dvs_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VOW_DVS_CON),
		(&val),
		(PMIC_RG_VOW_LDO_VSRAM_CORE_DVS_SW_MODE_MASK),
		(PMIC_RG_VOW_LDO_VSRAM_CORE_DVS_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_en_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_CON),
		(val),
		(PMIC_RG_LDO_VXO22_EN_SW_MODE_MASK),
		(PMIC_RG_LDO_VXO22_EN_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_en_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_CON),
		(&val),
		(PMIC_RG_LDO_VXO22_EN_SW_MODE_MASK),
		(PMIC_RG_LDO_VXO22_EN_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_en_test(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_CON),
		(val),
		(PMIC_RG_LDO_VXO22_EN_TEST_MASK),
		(PMIC_RG_LDO_VXO22_EN_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_en_test(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_CON),
		(&val),
		(PMIC_RG_LDO_VXO22_EN_TEST_MASK),
		(PMIC_RG_LDO_VXO22_EN_TEST_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel_limit_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_ELR),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LIMIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel_limit_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_ELR),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LIMIT_SEL_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LIMIT_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_ana_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_ELR),
		(val),
		(PMIC_RG_LDO_VRFCK_ANA_SEL_MASK),
		(PMIC_RG_LDO_VRFCK_ANA_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_EN_MASK),
		(PMIC_RG_LDO_VFE28_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_CON0),
		(&val),
		(PMIC_RG_LDO_VFE28_EN_MASK),
		(PMIC_RG_LDO_VFE28_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_LP_MASK),
		(PMIC_RG_LDO_VFE28_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_CON0),
		(&val),
		(PMIC_RG_LDO_VFE28_LP_MASK),
		(PMIC_RG_LDO_VFE28_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_STBTD_MASK),
		(PMIC_RG_LDO_VFE28_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_ULP_MASK),
		(PMIC_RG_LDO_VFE28_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_OCFB_EN_MASK),
		(PMIC_RG_LDO_VFE28_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_CON0),
		(&val),
		(PMIC_RG_LDO_VFE28_OCFB_EN_MASK),
		(PMIC_RG_LDO_VFE28_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_OC_MODE_MASK),
		(PMIC_RG_LDO_VFE28_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_CON0),
		(&val),
		(PMIC_RG_LDO_VFE28_OC_MODE_MASK),
		(PMIC_RG_LDO_VFE28_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_OC_TSEL_MASK),
		(PMIC_RG_LDO_VFE28_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VFE28_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_OP_MODE_MASK),
		(PMIC_RG_LDO_VFE28_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_CON0),
		(&val),
		(PMIC_RG_LDO_VFE28_OP_MODE_MASK),
		(PMIC_RG_LDO_VFE28_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_CON0),
		(val),
		(PMIC_RG_LDO_VFE28_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VFE28_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_CON0),
		(&val),
		(PMIC_RG_LDO_VFE28_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VFE28_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_B_EN_MASK),
		(PMIC_DA_VFE28_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_B_STB_MASK),
		(PMIC_DA_VFE28_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_B_LP_MASK),
		(PMIC_DA_VFE28_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_L_EN_MASK),
		(PMIC_DA_VFE28_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_L_STB_MASK),
		(PMIC_DA_VFE28_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_OCFB_EN_MASK),
		(PMIC_DA_VFE28_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vfe28_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_MON),
		(&val),
		(PMIC_DA_VFE28_DUMMY_LOAD_MASK),
		(PMIC_DA_VFE28_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(val),
		(PMIC_RG_LDO_VFE28_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VFE28_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VFE28_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vfe28_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VFE28_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vfe28_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VFE28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VFE28_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VFE28_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_EN_MASK),
		(PMIC_RG_LDO_VXO22_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_CON0),
		(&val),
		(PMIC_RG_LDO_VXO22_EN_MASK),
		(PMIC_RG_LDO_VXO22_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_LP_MASK),
		(PMIC_RG_LDO_VXO22_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_CON0),
		(&val),
		(PMIC_RG_LDO_VXO22_LP_MASK),
		(PMIC_RG_LDO_VXO22_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_STBTD_MASK),
		(PMIC_RG_LDO_VXO22_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_ULP_MASK),
		(PMIC_RG_LDO_VXO22_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_OCFB_EN_MASK),
		(PMIC_RG_LDO_VXO22_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_CON0),
		(&val),
		(PMIC_RG_LDO_VXO22_OCFB_EN_MASK),
		(PMIC_RG_LDO_VXO22_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_OC_MODE_MASK),
		(PMIC_RG_LDO_VXO22_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_CON0),
		(&val),
		(PMIC_RG_LDO_VXO22_OC_MODE_MASK),
		(PMIC_RG_LDO_VXO22_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_OC_TSEL_MASK),
		(PMIC_RG_LDO_VXO22_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VXO22_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_OP_MODE_MASK),
		(PMIC_RG_LDO_VXO22_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_CON0),
		(&val),
		(PMIC_RG_LDO_VXO22_OP_MODE_MASK),
		(PMIC_RG_LDO_VXO22_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_CON0),
		(val),
		(PMIC_RG_LDO_VXO22_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VXO22_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_CON0),
		(&val),
		(PMIC_RG_LDO_VXO22_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VXO22_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_B_EN_MASK),
		(PMIC_DA_VXO22_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_B_STB_MASK),
		(PMIC_DA_VXO22_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_B_LP_MASK),
		(PMIC_DA_VXO22_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_L_EN_MASK),
		(PMIC_DA_VXO22_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_L_STB_MASK),
		(PMIC_DA_VXO22_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_OCFB_EN_MASK),
		(PMIC_DA_VXO22_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vxo22_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_MON),
		(&val),
		(PMIC_DA_VXO22_DUMMY_LOAD_MASK),
		(PMIC_DA_VXO22_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(val),
		(PMIC_RG_LDO_VXO22_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_EN),
		(&val),
		(PMIC_RG_LDO_VXO22_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VXO22_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vxo22_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(val),
		(PMIC_RG_LDO_VXO22_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vxo22_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VXO22_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VXO22_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VXO22_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_EN_MASK),
		(PMIC_RG_LDO_VRF18_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_CON0),
		(&val),
		(PMIC_RG_LDO_VRF18_EN_MASK),
		(PMIC_RG_LDO_VRF18_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_LP_MASK),
		(PMIC_RG_LDO_VRF18_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_CON0),
		(&val),
		(PMIC_RG_LDO_VRF18_LP_MASK),
		(PMIC_RG_LDO_VRF18_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_STBTD_MASK),
		(PMIC_RG_LDO_VRF18_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_ULP_MASK),
		(PMIC_RG_LDO_VRF18_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VRF18_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_CON0),
		(&val),
		(PMIC_RG_LDO_VRF18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VRF18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_OC_MODE_MASK),
		(PMIC_RG_LDO_VRF18_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_CON0),
		(&val),
		(PMIC_RG_LDO_VRF18_OC_MODE_MASK),
		(PMIC_RG_LDO_VRF18_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_OC_TSEL_MASK),
		(PMIC_RG_LDO_VRF18_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VRF18_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_OP_MODE_MASK),
		(PMIC_RG_LDO_VRF18_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_CON0),
		(&val),
		(PMIC_RG_LDO_VRF18_OP_MODE_MASK),
		(PMIC_RG_LDO_VRF18_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_CON0),
		(val),
		(PMIC_RG_LDO_VRF18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VRF18_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_CON0),
		(&val),
		(PMIC_RG_LDO_VRF18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VRF18_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_B_EN_MASK),
		(PMIC_DA_VRF18_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_B_STB_MASK),
		(PMIC_DA_VRF18_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_B_LP_MASK),
		(PMIC_DA_VRF18_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_L_EN_MASK),
		(PMIC_DA_VRF18_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_L_STB_MASK),
		(PMIC_DA_VRF18_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_OCFB_EN_MASK),
		(PMIC_DA_VRF18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf18_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_MON),
		(&val),
		(PMIC_DA_VRF18_DUMMY_LOAD_MASK),
		(PMIC_DA_VRF18_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VRF18_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf18_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf18_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF18_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_EN_MASK),
		(PMIC_RG_LDO_VRF12_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_CON0),
		(&val),
		(PMIC_RG_LDO_VRF12_EN_MASK),
		(PMIC_RG_LDO_VRF12_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_LP_MASK),
		(PMIC_RG_LDO_VRF12_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_CON0),
		(&val),
		(PMIC_RG_LDO_VRF12_LP_MASK),
		(PMIC_RG_LDO_VRF12_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_STBTD_MASK),
		(PMIC_RG_LDO_VRF12_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_ULP_MASK),
		(PMIC_RG_LDO_VRF12_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_OCFB_EN_MASK),
		(PMIC_RG_LDO_VRF12_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_CON0),
		(&val),
		(PMIC_RG_LDO_VRF12_OCFB_EN_MASK),
		(PMIC_RG_LDO_VRF12_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_OC_MODE_MASK),
		(PMIC_RG_LDO_VRF12_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_CON0),
		(&val),
		(PMIC_RG_LDO_VRF12_OC_MODE_MASK),
		(PMIC_RG_LDO_VRF12_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_OC_TSEL_MASK),
		(PMIC_RG_LDO_VRF12_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VRF12_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_OP_MODE_MASK),
		(PMIC_RG_LDO_VRF12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_CON0),
		(&val),
		(PMIC_RG_LDO_VRF12_OP_MODE_MASK),
		(PMIC_RG_LDO_VRF12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_CON0),
		(val),
		(PMIC_RG_LDO_VRF12_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VRF12_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_CON0),
		(&val),
		(PMIC_RG_LDO_VRF12_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VRF12_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_B_EN_MASK),
		(PMIC_DA_VRF12_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_B_STB_MASK),
		(PMIC_DA_VRF12_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_B_LP_MASK),
		(PMIC_DA_VRF12_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_L_EN_MASK),
		(PMIC_DA_VRF12_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_L_STB_MASK),
		(PMIC_DA_VRF12_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_OCFB_EN_MASK),
		(PMIC_DA_VRF12_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrf12_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_MON),
		(&val),
		(PMIC_DA_VRF12_DUMMY_LOAD_MASK),
		(PMIC_DA_VRF12_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(val),
		(PMIC_RG_LDO_VRF12_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRF12_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VRF12_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrf12_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRF12_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrf12_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRF12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRF12_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VRF12_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(&val),
		(PMIC_RG_LDO_VEFUSE_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_LP_MASK),
		(PMIC_RG_LDO_VEFUSE_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(&val),
		(PMIC_RG_LDO_VEFUSE_LP_MASK),
		(PMIC_RG_LDO_VEFUSE_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_STBTD_MASK),
		(PMIC_RG_LDO_VEFUSE_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_ULP_MASK),
		(PMIC_RG_LDO_VEFUSE_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_OCFB_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(&val),
		(PMIC_RG_LDO_VEFUSE_OCFB_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_OC_MODE_MASK),
		(PMIC_RG_LDO_VEFUSE_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(&val),
		(PMIC_RG_LDO_VEFUSE_OC_MODE_MASK),
		(PMIC_RG_LDO_VEFUSE_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_OC_TSEL_MASK),
		(PMIC_RG_LDO_VEFUSE_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VEFUSE_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_OP_MODE_MASK),
		(PMIC_RG_LDO_VEFUSE_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(&val),
		(PMIC_RG_LDO_VEFUSE_OP_MODE_MASK),
		(PMIC_RG_LDO_VEFUSE_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(val),
		(PMIC_RG_LDO_VEFUSE_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VEFUSE_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_CON0),
		(&val),
		(PMIC_RG_LDO_VEFUSE_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VEFUSE_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_B_EN_MASK),
		(PMIC_DA_VEFUSE_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_B_STB_MASK),
		(PMIC_DA_VEFUSE_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_B_LP_MASK),
		(PMIC_DA_VEFUSE_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_L_EN_MASK),
		(PMIC_DA_VEFUSE_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_L_STB_MASK),
		(PMIC_DA_VEFUSE_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_OCFB_EN_MASK),
		(PMIC_DA_VEFUSE_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vefuse_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_MON),
		(&val),
		(PMIC_DA_VEFUSE_DUMMY_LOAD_MASK),
		(PMIC_DA_VEFUSE_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(val),
		(PMIC_RG_LDO_VEFUSE_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEFUSE_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VEFUSE_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vefuse_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEFUSE_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vefuse_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEFUSE_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEFUSE_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VEFUSE_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_EN_0_MASK),
		(PMIC_RG_LDO_VCN33_1_EN_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_1_EN_0_MASK),
		(PMIC_RG_LDO_VCN33_1_EN_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_LP_MASK),
		(PMIC_RG_LDO_VCN33_1_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_1_LP_MASK),
		(PMIC_RG_LDO_VCN33_1_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_STBTD_MASK),
		(PMIC_RG_LDO_VCN33_1_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_ULP_MASK),
		(PMIC_RG_LDO_VCN33_1_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_1_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN33_1_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_1_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN33_1_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_OC_TSEL_MASK),
		(PMIC_RG_LDO_VCN33_1_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VCN33_1_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN33_1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_1_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN33_1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_1_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN33_1_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_1_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN33_1_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_B_EN_MASK),
		(PMIC_DA_VCN33_1_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_B_STB_MASK),
		(PMIC_DA_VCN33_1_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_B_LP_MASK),
		(PMIC_DA_VCN33_1_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_L_EN_MASK),
		(PMIC_DA_VCN33_1_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_L_STB_MASK),
		(PMIC_DA_VCN33_1_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_OCFB_EN_MASK),
		(PMIC_DA_VCN33_1_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_1_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MON),
		(&val),
		(PMIC_DA_VCN33_1_DUMMY_LOAD_MASK),
		(PMIC_DA_VCN33_1_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_1_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_1_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_1_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_1_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_1_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_1_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_1_MULTI_SW),
		(val),
		(PMIC_RG_LDO_VCN33_1_EN_1_MASK),
		(PMIC_RG_LDO_VCN33_1_EN_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_1_MULTI_SW),
		(&val),
		(PMIC_RG_LDO_VCN33_1_EN_1_MASK),
		(PMIC_RG_LDO_VCN33_1_EN_1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_EN_0_MASK),
		(PMIC_RG_LDO_VCN33_2_EN_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_2_EN_0_MASK),
		(PMIC_RG_LDO_VCN33_2_EN_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_LP_MASK),
		(PMIC_RG_LDO_VCN33_2_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_2_LP_MASK),
		(PMIC_RG_LDO_VCN33_2_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_STBTD_MASK),
		(PMIC_RG_LDO_VCN33_2_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_ULP_MASK),
		(PMIC_RG_LDO_VCN33_2_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_2_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN33_2_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_2_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN33_2_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_OC_TSEL_MASK),
		(PMIC_RG_LDO_VCN33_2_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VCN33_2_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN33_2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_2_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN33_2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(val),
		(PMIC_RG_LDO_VCN33_2_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN33_2_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_CON0),
		(&val),
		(PMIC_RG_LDO_VCN33_2_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN33_2_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_B_EN_MASK),
		(PMIC_DA_VCN33_2_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_B_STB_MASK),
		(PMIC_DA_VCN33_2_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_B_LP_MASK),
		(PMIC_DA_VCN33_2_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_L_EN_MASK),
		(PMIC_DA_VCN33_2_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_L_STB_MASK),
		(PMIC_DA_VCN33_2_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_OCFB_EN_MASK),
		(PMIC_DA_VCN33_2_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn33_2_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MON),
		(&val),
		(PMIC_DA_VCN33_2_DUMMY_LOAD_MASK),
		(PMIC_DA_VCN33_2_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN33_2_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN33_2_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN33_2_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN33_2_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN33_2_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN33_2_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN33_2_MULTI_SW),
		(val),
		(PMIC_RG_LDO_VCN33_2_EN_1_MASK),
		(PMIC_RG_LDO_VCN33_2_EN_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN33_2_MULTI_SW),
		(&val),
		(PMIC_RG_LDO_VCN33_2_EN_1_MASK),
		(PMIC_RG_LDO_VCN33_2_EN_1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_EN_MASK),
		(PMIC_RG_LDO_VCN13_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_CON0),
		(&val),
		(PMIC_RG_LDO_VCN13_EN_MASK),
		(PMIC_RG_LDO_VCN13_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_LP_MASK),
		(PMIC_RG_LDO_VCN13_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_CON0),
		(&val),
		(PMIC_RG_LDO_VCN13_LP_MASK),
		(PMIC_RG_LDO_VCN13_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_STBTD_MASK),
		(PMIC_RG_LDO_VCN13_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_ULP_MASK),
		(PMIC_RG_LDO_VCN13_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN13_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_CON0),
		(&val),
		(PMIC_RG_LDO_VCN13_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN13_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN13_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_CON0),
		(&val),
		(PMIC_RG_LDO_VCN13_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN13_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_OC_TSEL_MASK),
		(PMIC_RG_LDO_VCN13_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VCN13_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN13_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_CON0),
		(&val),
		(PMIC_RG_LDO_VCN13_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN13_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_CON0),
		(val),
		(PMIC_RG_LDO_VCN13_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN13_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_CON0),
		(&val),
		(PMIC_RG_LDO_VCN13_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN13_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_B_EN_MASK),
		(PMIC_DA_VCN13_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_B_STB_MASK),
		(PMIC_DA_VCN13_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_B_LP_MASK),
		(PMIC_DA_VCN13_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_L_EN_MASK),
		(PMIC_DA_VCN13_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_L_STB_MASK),
		(PMIC_DA_VCN13_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_OCFB_EN_MASK),
		(PMIC_DA_VCN13_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn13_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_MON),
		(&val),
		(PMIC_DA_VCN13_DUMMY_LOAD_MASK),
		(PMIC_DA_VCN13_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN13_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN13_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN13_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn13_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN13_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn13_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN13_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN13_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN13_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_EN_MASK),
		(PMIC_RG_LDO_VCN18_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_CON0),
		(&val),
		(PMIC_RG_LDO_VCN18_EN_MASK),
		(PMIC_RG_LDO_VCN18_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_LP_MASK),
		(PMIC_RG_LDO_VCN18_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_CON0),
		(&val),
		(PMIC_RG_LDO_VCN18_LP_MASK),
		(PMIC_RG_LDO_VCN18_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_STBTD_MASK),
		(PMIC_RG_LDO_VCN18_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_ULP_MASK),
		(PMIC_RG_LDO_VCN18_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN18_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_CON0),
		(&val),
		(PMIC_RG_LDO_VCN18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCN18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN18_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_CON0),
		(&val),
		(PMIC_RG_LDO_VCN18_OC_MODE_MASK),
		(PMIC_RG_LDO_VCN18_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_OC_TSEL_MASK),
		(PMIC_RG_LDO_VCN18_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VCN18_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN18_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_CON0),
		(&val),
		(PMIC_RG_LDO_VCN18_OP_MODE_MASK),
		(PMIC_RG_LDO_VCN18_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_CON0),
		(val),
		(PMIC_RG_LDO_VCN18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN18_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_CON0),
		(&val),
		(PMIC_RG_LDO_VCN18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCN18_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_B_EN_MASK),
		(PMIC_DA_VCN18_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_B_STB_MASK),
		(PMIC_DA_VCN18_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_B_LP_MASK),
		(PMIC_DA_VCN18_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_L_EN_MASK),
		(PMIC_DA_VCN18_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_L_STB_MASK),
		(PMIC_DA_VCN18_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_OCFB_EN_MASK),
		(PMIC_DA_VCN18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcn18_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_MON),
		(&val),
		(PMIC_DA_VCN18_DUMMY_LOAD_MASK),
		(PMIC_DA_VCN18_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(val),
		(PMIC_RG_LDO_VCN18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCN18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCN18_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcn18_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCN18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcn18_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCN18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCN18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCN18_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_EN_MASK),
		(PMIC_RG_LDO_VA09_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_CON0),
		(&val),
		(PMIC_RG_LDO_VA09_EN_MASK),
		(PMIC_RG_LDO_VA09_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_LP_MASK),
		(PMIC_RG_LDO_VA09_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_CON0),
		(&val),
		(PMIC_RG_LDO_VA09_LP_MASK),
		(PMIC_RG_LDO_VA09_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_STBTD_MASK),
		(PMIC_RG_LDO_VA09_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_ULP_MASK),
		(PMIC_RG_LDO_VA09_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_OCFB_EN_MASK),
		(PMIC_RG_LDO_VA09_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_CON0),
		(&val),
		(PMIC_RG_LDO_VA09_OCFB_EN_MASK),
		(PMIC_RG_LDO_VA09_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_OC_MODE_MASK),
		(PMIC_RG_LDO_VA09_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_CON0),
		(&val),
		(PMIC_RG_LDO_VA09_OC_MODE_MASK),
		(PMIC_RG_LDO_VA09_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_OC_TSEL_MASK),
		(PMIC_RG_LDO_VA09_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VA09_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_OP_MODE_MASK),
		(PMIC_RG_LDO_VA09_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_CON0),
		(&val),
		(PMIC_RG_LDO_VA09_OP_MODE_MASK),
		(PMIC_RG_LDO_VA09_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_CON0),
		(val),
		(PMIC_RG_LDO_VA09_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VA09_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_CON0),
		(&val),
		(PMIC_RG_LDO_VA09_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VA09_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_B_EN_MASK),
		(PMIC_DA_VA09_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_B_STB_MASK),
		(PMIC_DA_VA09_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_B_LP_MASK),
		(PMIC_DA_VA09_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_L_EN_MASK),
		(PMIC_DA_VA09_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_L_STB_MASK),
		(PMIC_DA_VA09_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_OCFB_EN_MASK),
		(PMIC_DA_VA09_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va09_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_MON),
		(&val),
		(PMIC_DA_VA09_DUMMY_LOAD_MASK),
		(PMIC_DA_VA09_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_EN),
		(val),
		(PMIC_RG_LDO_VA09_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA09_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VA09_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va09_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA09_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va09_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA09_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA09_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VA09_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(&val),
		(PMIC_RG_LDO_VCAMIO_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_LP_MASK),
		(PMIC_RG_LDO_VCAMIO_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(&val),
		(PMIC_RG_LDO_VCAMIO_LP_MASK),
		(PMIC_RG_LDO_VCAMIO_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_STBTD_MASK),
		(PMIC_RG_LDO_VCAMIO_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_ULP_MASK),
		(PMIC_RG_LDO_VCAMIO_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(&val),
		(PMIC_RG_LDO_VCAMIO_OCFB_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_OC_MODE_MASK),
		(PMIC_RG_LDO_VCAMIO_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(&val),
		(PMIC_RG_LDO_VCAMIO_OC_MODE_MASK),
		(PMIC_RG_LDO_VCAMIO_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_OC_TSEL_MASK),
		(PMIC_RG_LDO_VCAMIO_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VCAMIO_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_OP_MODE_MASK),
		(PMIC_RG_LDO_VCAMIO_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(&val),
		(PMIC_RG_LDO_VCAMIO_OP_MODE_MASK),
		(PMIC_RG_LDO_VCAMIO_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(val),
		(PMIC_RG_LDO_VCAMIO_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCAMIO_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_CON0),
		(&val),
		(PMIC_RG_LDO_VCAMIO_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VCAMIO_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_B_EN_MASK),
		(PMIC_DA_VCAMIO_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_B_STB_MASK),
		(PMIC_DA_VCAMIO_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_B_LP_MASK),
		(PMIC_DA_VCAMIO_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_L_EN_MASK),
		(PMIC_DA_VCAMIO_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_L_STB_MASK),
		(PMIC_DA_VCAMIO_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_OCFB_EN_MASK),
		(PMIC_DA_VCAMIO_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vcamio_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_MON),
		(&val),
		(PMIC_DA_VCAMIO_DUMMY_LOAD_MASK),
		(PMIC_DA_VCAMIO_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(val),
		(PMIC_RG_LDO_VCAMIO_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_EN),
		(&val),
		(PMIC_RG_LDO_VCAMIO_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VCAMIO_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vcamio_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(val),
		(PMIC_RG_LDO_VCAMIO_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vcamio_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VCAMIO_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VCAMIO_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VCAMIO_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_EN_MASK),
		(PMIC_RG_LDO_VA12_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_CON0),
		(&val),
		(PMIC_RG_LDO_VA12_EN_MASK),
		(PMIC_RG_LDO_VA12_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_LP_MASK),
		(PMIC_RG_LDO_VA12_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_CON0),
		(&val),
		(PMIC_RG_LDO_VA12_LP_MASK),
		(PMIC_RG_LDO_VA12_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_STBTD_MASK),
		(PMIC_RG_LDO_VA12_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_ULP_MASK),
		(PMIC_RG_LDO_VA12_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_OCFB_EN_MASK),
		(PMIC_RG_LDO_VA12_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_CON0),
		(&val),
		(PMIC_RG_LDO_VA12_OCFB_EN_MASK),
		(PMIC_RG_LDO_VA12_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_OC_MODE_MASK),
		(PMIC_RG_LDO_VA12_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_CON0),
		(&val),
		(PMIC_RG_LDO_VA12_OC_MODE_MASK),
		(PMIC_RG_LDO_VA12_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_OC_TSEL_MASK),
		(PMIC_RG_LDO_VA12_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VA12_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_OP_MODE_MASK),
		(PMIC_RG_LDO_VA12_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_CON0),
		(&val),
		(PMIC_RG_LDO_VA12_OP_MODE_MASK),
		(PMIC_RG_LDO_VA12_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_CON0),
		(val),
		(PMIC_RG_LDO_VA12_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VA12_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_CON0),
		(&val),
		(PMIC_RG_LDO_VA12_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VA12_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_B_EN_MASK),
		(PMIC_DA_VA12_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_B_STB_MASK),
		(PMIC_DA_VA12_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_B_LP_MASK),
		(PMIC_DA_VA12_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_L_EN_MASK),
		(PMIC_DA_VA12_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_L_STB_MASK),
		(PMIC_DA_VA12_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_OCFB_EN_MASK),
		(PMIC_DA_VA12_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_va12_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_MON),
		(&val),
		(PMIC_DA_VA12_DUMMY_LOAD_MASK),
		(PMIC_DA_VA12_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_EN),
		(val),
		(PMIC_RG_LDO_VA12_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_EN),
		(&val),
		(PMIC_RG_LDO_VA12_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VA12_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_va12_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(val),
		(PMIC_RG_LDO_VA12_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_va12_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VA12_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VA12_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VA12_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_EN_MASK),
		(PMIC_RG_LDO_VAUX18_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUX18_EN_MASK),
		(PMIC_RG_LDO_VAUX18_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_LP_MASK),
		(PMIC_RG_LDO_VAUX18_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUX18_LP_MASK),
		(PMIC_RG_LDO_VAUX18_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_STBTD_MASK),
		(PMIC_RG_LDO_VAUX18_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_ULP_MASK),
		(PMIC_RG_LDO_VAUX18_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VAUX18_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUX18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VAUX18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_OC_MODE_MASK),
		(PMIC_RG_LDO_VAUX18_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUX18_OC_MODE_MASK),
		(PMIC_RG_LDO_VAUX18_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_OC_TSEL_MASK),
		(PMIC_RG_LDO_VAUX18_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VAUX18_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_OP_MODE_MASK),
		(PMIC_RG_LDO_VAUX18_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUX18_OP_MODE_MASK),
		(PMIC_RG_LDO_VAUX18_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_CON0),
		(val),
		(PMIC_RG_LDO_VAUX18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VAUX18_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUX18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VAUX18_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_B_EN_MASK),
		(PMIC_DA_VAUX18_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_B_STB_MASK),
		(PMIC_DA_VAUX18_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_B_LP_MASK),
		(PMIC_DA_VAUX18_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_L_EN_MASK),
		(PMIC_DA_VAUX18_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_L_STB_MASK),
		(PMIC_DA_VAUX18_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_OCFB_EN_MASK),
		(PMIC_DA_VAUX18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaux18_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_MON),
		(&val),
		(PMIC_DA_VAUX18_DUMMY_LOAD_MASK),
		(PMIC_DA_VAUX18_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUX18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUX18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VAUX18_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaux18_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUX18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaux18_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUX18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUX18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUX18_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_EN_MASK),
		(PMIC_RG_LDO_VAUD18_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUD18_EN_MASK),
		(PMIC_RG_LDO_VAUD18_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_LP_MASK),
		(PMIC_RG_LDO_VAUD18_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUD18_LP_MASK),
		(PMIC_RG_LDO_VAUD18_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_STBTD_MASK),
		(PMIC_RG_LDO_VAUD18_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_ULP_MASK),
		(PMIC_RG_LDO_VAUD18_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VAUD18_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUD18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VAUD18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_OC_MODE_MASK),
		(PMIC_RG_LDO_VAUD18_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUD18_OC_MODE_MASK),
		(PMIC_RG_LDO_VAUD18_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_OC_TSEL_MASK),
		(PMIC_RG_LDO_VAUD18_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VAUD18_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_OP_MODE_MASK),
		(PMIC_RG_LDO_VAUD18_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUD18_OP_MODE_MASK),
		(PMIC_RG_LDO_VAUD18_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_CON0),
		(val),
		(PMIC_RG_LDO_VAUD18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VAUD18_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_CON0),
		(&val),
		(PMIC_RG_LDO_VAUD18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VAUD18_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_B_EN_MASK),
		(PMIC_DA_VAUD18_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_B_STB_MASK),
		(PMIC_DA_VAUD18_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_B_LP_MASK),
		(PMIC_DA_VAUD18_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_L_EN_MASK),
		(PMIC_DA_VAUD18_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_L_STB_MASK),
		(PMIC_DA_VAUD18_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_OCFB_EN_MASK),
		(PMIC_DA_VAUD18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vaud18_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_MON),
		(&val),
		(PMIC_DA_VAUD18_DUMMY_LOAD_MASK),
		(PMIC_DA_VAUD18_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(val),
		(PMIC_RG_LDO_VAUD18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VAUD18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VAUD18_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vaud18_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VAUD18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vaud18_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VAUD18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VAUD18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VAUD18_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_EN_MASK),
		(PMIC_RG_LDO_VIO18_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_CON0),
		(&val),
		(PMIC_RG_LDO_VIO18_EN_MASK),
		(PMIC_RG_LDO_VIO18_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_LP_MASK),
		(PMIC_RG_LDO_VIO18_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_CON0),
		(&val),
		(PMIC_RG_LDO_VIO18_LP_MASK),
		(PMIC_RG_LDO_VIO18_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_STBTD_MASK),
		(PMIC_RG_LDO_VIO18_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_ULP_MASK),
		(PMIC_RG_LDO_VIO18_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VIO18_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_CON0),
		(&val),
		(PMIC_RG_LDO_VIO18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VIO18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_OC_MODE_MASK),
		(PMIC_RG_LDO_VIO18_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_CON0),
		(&val),
		(PMIC_RG_LDO_VIO18_OC_MODE_MASK),
		(PMIC_RG_LDO_VIO18_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_OC_TSEL_MASK),
		(PMIC_RG_LDO_VIO18_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VIO18_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_OP_MODE_MASK),
		(PMIC_RG_LDO_VIO18_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_CON0),
		(&val),
		(PMIC_RG_LDO_VIO18_OP_MODE_MASK),
		(PMIC_RG_LDO_VIO18_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_CON0),
		(val),
		(PMIC_RG_LDO_VIO18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VIO18_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_CON0),
		(&val),
		(PMIC_RG_LDO_VIO18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VIO18_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_B_EN_MASK),
		(PMIC_DA_VIO18_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_B_STB_MASK),
		(PMIC_DA_VIO18_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_B_LP_MASK),
		(PMIC_DA_VIO18_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_L_EN_MASK),
		(PMIC_DA_VIO18_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_L_STB_MASK),
		(PMIC_DA_VIO18_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_OCFB_EN_MASK),
		(PMIC_DA_VIO18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio18_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_MON),
		(&val),
		(PMIC_DA_VIO18_DUMMY_LOAD_MASK),
		(PMIC_DA_VIO18_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VIO18_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio18_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio18_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO18_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_EN_MASK),
		(PMIC_RG_LDO_VEMC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_CON0),
		(&val),
		(PMIC_RG_LDO_VEMC_EN_MASK),
		(PMIC_RG_LDO_VEMC_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_LP_MASK),
		(PMIC_RG_LDO_VEMC_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_CON0),
		(&val),
		(PMIC_RG_LDO_VEMC_LP_MASK),
		(PMIC_RG_LDO_VEMC_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_STBTD_MASK),
		(PMIC_RG_LDO_VEMC_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_ULP_MASK),
		(PMIC_RG_LDO_VEMC_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_OCFB_EN_MASK),
		(PMIC_RG_LDO_VEMC_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_CON0),
		(&val),
		(PMIC_RG_LDO_VEMC_OCFB_EN_MASK),
		(PMIC_RG_LDO_VEMC_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_OC_MODE_MASK),
		(PMIC_RG_LDO_VEMC_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_CON0),
		(&val),
		(PMIC_RG_LDO_VEMC_OC_MODE_MASK),
		(PMIC_RG_LDO_VEMC_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_OC_TSEL_MASK),
		(PMIC_RG_LDO_VEMC_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VEMC_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_OP_MODE_MASK),
		(PMIC_RG_LDO_VEMC_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_CON0),
		(&val),
		(PMIC_RG_LDO_VEMC_OP_MODE_MASK),
		(PMIC_RG_LDO_VEMC_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_CON0),
		(val),
		(PMIC_RG_LDO_VEMC_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VEMC_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_CON0),
		(&val),
		(PMIC_RG_LDO_VEMC_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VEMC_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_B_EN_MASK),
		(PMIC_DA_VEMC_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_B_STB_MASK),
		(PMIC_DA_VEMC_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_B_LP_MASK),
		(PMIC_DA_VEMC_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_L_EN_MASK),
		(PMIC_DA_VEMC_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_L_STB_MASK),
		(PMIC_DA_VEMC_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_OCFB_EN_MASK),
		(PMIC_DA_VEMC_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vemc_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_MON),
		(&val),
		(PMIC_DA_VEMC_DUMMY_LOAD_MASK),
		(PMIC_DA_VEMC_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(val),
		(PMIC_RG_LDO_VEMC_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_EN),
		(&val),
		(PMIC_RG_LDO_VEMC_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VEMC_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vemc_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(val),
		(PMIC_RG_LDO_VEMC_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vemc_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VEMC_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VEMC_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VEMC_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_EN_MASK),
		(PMIC_RG_LDO_VSIM1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM1_EN_MASK),
		(PMIC_RG_LDO_VSIM1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_LP_MASK),
		(PMIC_RG_LDO_VSIM1_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM1_LP_MASK),
		(PMIC_RG_LDO_VSIM1_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_STBTD_MASK),
		(PMIC_RG_LDO_VSIM1_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_ULP_MASK),
		(PMIC_RG_LDO_VSIM1_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSIM1_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM1_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSIM1_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_OC_MODE_MASK),
		(PMIC_RG_LDO_VSIM1_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM1_OC_MODE_MASK),
		(PMIC_RG_LDO_VSIM1_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_OC_TSEL_MASK),
		(PMIC_RG_LDO_VSIM1_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VSIM1_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_OP_MODE_MASK),
		(PMIC_RG_LDO_VSIM1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM1_OP_MODE_MASK),
		(PMIC_RG_LDO_VSIM1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_CON0),
		(val),
		(PMIC_RG_LDO_VSIM1_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSIM1_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM1_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSIM1_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_B_EN_MASK),
		(PMIC_DA_VSIM1_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_B_STB_MASK),
		(PMIC_DA_VSIM1_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_B_LP_MASK),
		(PMIC_DA_VSIM1_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_L_EN_MASK),
		(PMIC_DA_VSIM1_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_L_STB_MASK),
		(PMIC_DA_VSIM1_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_OCFB_EN_MASK),
		(PMIC_DA_VSIM1_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim1_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_MON),
		(&val),
		(PMIC_DA_VSIM1_DUMMY_LOAD_MASK),
		(PMIC_DA_VSIM1_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM1_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM1_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM1_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim1_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM1_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim1_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM1_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM1_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_EN_MASK),
		(PMIC_RG_LDO_VSIM2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM2_EN_MASK),
		(PMIC_RG_LDO_VSIM2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_LP_MASK),
		(PMIC_RG_LDO_VSIM2_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM2_LP_MASK),
		(PMIC_RG_LDO_VSIM2_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_STBTD_MASK),
		(PMIC_RG_LDO_VSIM2_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_ULP_MASK),
		(PMIC_RG_LDO_VSIM2_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSIM2_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM2_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSIM2_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_OC_MODE_MASK),
		(PMIC_RG_LDO_VSIM2_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM2_OC_MODE_MASK),
		(PMIC_RG_LDO_VSIM2_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_OC_TSEL_MASK),
		(PMIC_RG_LDO_VSIM2_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VSIM2_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_OP_MODE_MASK),
		(PMIC_RG_LDO_VSIM2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM2_OP_MODE_MASK),
		(PMIC_RG_LDO_VSIM2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_CON0),
		(val),
		(PMIC_RG_LDO_VSIM2_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSIM2_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_CON0),
		(&val),
		(PMIC_RG_LDO_VSIM2_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSIM2_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_B_EN_MASK),
		(PMIC_DA_VSIM2_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_B_STB_MASK),
		(PMIC_DA_VSIM2_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_B_LP_MASK),
		(PMIC_DA_VSIM2_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_L_EN_MASK),
		(PMIC_DA_VSIM2_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_L_STB_MASK),
		(PMIC_DA_VSIM2_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_OCFB_EN_MASK),
		(PMIC_DA_VSIM2_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsim2_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_MON),
		(&val),
		(PMIC_DA_VSIM2_DUMMY_LOAD_MASK),
		(PMIC_DA_VSIM2_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSIM2_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSIM2_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSIM2_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsim2_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSIM2_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsim2_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSIM2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSIM2_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSIM2_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_EN_0_MASK),
		(PMIC_RG_LDO_VUSB_EN_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_CON0),
		(&val),
		(PMIC_RG_LDO_VUSB_EN_0_MASK),
		(PMIC_RG_LDO_VUSB_EN_0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_LP_MASK),
		(PMIC_RG_LDO_VUSB_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_CON0),
		(&val),
		(PMIC_RG_LDO_VUSB_LP_MASK),
		(PMIC_RG_LDO_VUSB_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_STBTD_MASK),
		(PMIC_RG_LDO_VUSB_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_ULP_MASK),
		(PMIC_RG_LDO_VUSB_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_OCFB_EN_MASK),
		(PMIC_RG_LDO_VUSB_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_CON0),
		(&val),
		(PMIC_RG_LDO_VUSB_OCFB_EN_MASK),
		(PMIC_RG_LDO_VUSB_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_OC_MODE_MASK),
		(PMIC_RG_LDO_VUSB_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_CON0),
		(&val),
		(PMIC_RG_LDO_VUSB_OC_MODE_MASK),
		(PMIC_RG_LDO_VUSB_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_OC_TSEL_MASK),
		(PMIC_RG_LDO_VUSB_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VUSB_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_OP_MODE_MASK),
		(PMIC_RG_LDO_VUSB_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_CON0),
		(&val),
		(PMIC_RG_LDO_VUSB_OP_MODE_MASK),
		(PMIC_RG_LDO_VUSB_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_CON0),
		(val),
		(PMIC_RG_LDO_VUSB_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VUSB_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_CON0),
		(&val),
		(PMIC_RG_LDO_VUSB_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VUSB_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_B_EN_MASK),
		(PMIC_DA_VUSB_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_B_STB_MASK),
		(PMIC_DA_VUSB_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_B_LP_MASK),
		(PMIC_DA_VUSB_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_L_EN_MASK),
		(PMIC_DA_VUSB_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_L_STB_MASK),
		(PMIC_DA_VUSB_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_OCFB_EN_MASK),
		(PMIC_DA_VUSB_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vusb_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MON),
		(&val),
		(PMIC_DA_VUSB_DUMMY_LOAD_MASK),
		(PMIC_DA_VUSB_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(val),
		(PMIC_RG_LDO_VUSB_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUSB_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VUSB_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUSB_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUSB_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VUSB_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vusb_1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUSB_MULTI_SW),
		(val),
		(PMIC_RG_LDO_VUSB_EN_1_MASK),
		(PMIC_RG_LDO_VUSB_EN_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vusb_1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUSB_MULTI_SW),
		(&val),
		(PMIC_RG_LDO_VUSB_EN_1_MASK),
		(PMIC_RG_LDO_VUSB_EN_1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_EN_MASK),
		(PMIC_RG_LDO_VRFCK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_CON0),
		(&val),
		(PMIC_RG_LDO_VRFCK_EN_MASK),
		(PMIC_RG_LDO_VRFCK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_LP_MASK),
		(PMIC_RG_LDO_VRFCK_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_CON0),
		(&val),
		(PMIC_RG_LDO_VRFCK_LP_MASK),
		(PMIC_RG_LDO_VRFCK_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_STBTD_MASK),
		(PMIC_RG_LDO_VRFCK_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_ULP_MASK),
		(PMIC_RG_LDO_VRFCK_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_OCFB_EN_MASK),
		(PMIC_RG_LDO_VRFCK_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_CON0),
		(&val),
		(PMIC_RG_LDO_VRFCK_OCFB_EN_MASK),
		(PMIC_RG_LDO_VRFCK_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_OC_MODE_MASK),
		(PMIC_RG_LDO_VRFCK_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_CON0),
		(&val),
		(PMIC_RG_LDO_VRFCK_OC_MODE_MASK),
		(PMIC_RG_LDO_VRFCK_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_OC_TSEL_MASK),
		(PMIC_RG_LDO_VRFCK_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VRFCK_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_OP_MODE_MASK),
		(PMIC_RG_LDO_VRFCK_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_CON0),
		(&val),
		(PMIC_RG_LDO_VRFCK_OP_MODE_MASK),
		(PMIC_RG_LDO_VRFCK_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_CON0),
		(val),
		(PMIC_RG_LDO_VRFCK_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VRFCK_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_CON0),
		(&val),
		(PMIC_RG_LDO_VRFCK_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VRFCK_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_B_EN_MASK),
		(PMIC_DA_VRFCK_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_B_STB_MASK),
		(PMIC_DA_VRFCK_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_B_LP_MASK),
		(PMIC_DA_VRFCK_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_L_EN_MASK),
		(PMIC_DA_VRFCK_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_L_STB_MASK),
		(PMIC_DA_VRFCK_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_OCFB_EN_MASK),
		(PMIC_DA_VRFCK_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vrfck_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_MON),
		(&val),
		(PMIC_DA_VRFCK_DUMMY_LOAD_MASK),
		(PMIC_DA_VRFCK_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VRFCK_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VRFCK_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VRFCK_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vrfck_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VRFCK_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vrfck_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VRFCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VRFCK_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VRFCK_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_EN_MASK),
		(PMIC_RG_LDO_VBBCK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_CON0),
		(&val),
		(PMIC_RG_LDO_VBBCK_EN_MASK),
		(PMIC_RG_LDO_VBBCK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_LP_MASK),
		(PMIC_RG_LDO_VBBCK_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_CON0),
		(&val),
		(PMIC_RG_LDO_VBBCK_LP_MASK),
		(PMIC_RG_LDO_VBBCK_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_STBTD_MASK),
		(PMIC_RG_LDO_VBBCK_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_ULP_MASK),
		(PMIC_RG_LDO_VBBCK_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_OCFB_EN_MASK),
		(PMIC_RG_LDO_VBBCK_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_CON0),
		(&val),
		(PMIC_RG_LDO_VBBCK_OCFB_EN_MASK),
		(PMIC_RG_LDO_VBBCK_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_OC_MODE_MASK),
		(PMIC_RG_LDO_VBBCK_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_CON0),
		(&val),
		(PMIC_RG_LDO_VBBCK_OC_MODE_MASK),
		(PMIC_RG_LDO_VBBCK_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_OC_TSEL_MASK),
		(PMIC_RG_LDO_VBBCK_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VBBCK_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_OP_MODE_MASK),
		(PMIC_RG_LDO_VBBCK_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_CON0),
		(&val),
		(PMIC_RG_LDO_VBBCK_OP_MODE_MASK),
		(PMIC_RG_LDO_VBBCK_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_CON0),
		(val),
		(PMIC_RG_LDO_VBBCK_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VBBCK_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_CON0),
		(&val),
		(PMIC_RG_LDO_VBBCK_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VBBCK_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_B_EN_MASK),
		(PMIC_DA_VBBCK_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_B_STB_MASK),
		(PMIC_DA_VBBCK_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_B_LP_MASK),
		(PMIC_DA_VBBCK_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_L_EN_MASK),
		(PMIC_DA_VBBCK_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_L_STB_MASK),
		(PMIC_DA_VBBCK_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_OCFB_EN_MASK),
		(PMIC_DA_VBBCK_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbbck_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_MON),
		(&val),
		(PMIC_DA_VBBCK_DUMMY_LOAD_MASK),
		(PMIC_DA_VBBCK_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(val),
		(PMIC_RG_LDO_VBBCK_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBBCK_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VBBCK_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbbck_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBBCK_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbbck_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBBCK_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBBCK_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VBBCK_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_EN_MASK),
		(PMIC_RG_LDO_VBIF28_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_CON0),
		(&val),
		(PMIC_RG_LDO_VBIF28_EN_MASK),
		(PMIC_RG_LDO_VBIF28_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_LP_MASK),
		(PMIC_RG_LDO_VBIF28_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_CON0),
		(&val),
		(PMIC_RG_LDO_VBIF28_LP_MASK),
		(PMIC_RG_LDO_VBIF28_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_STBTD_MASK),
		(PMIC_RG_LDO_VBIF28_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_ULP_MASK),
		(PMIC_RG_LDO_VBIF28_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_OCFB_EN_MASK),
		(PMIC_RG_LDO_VBIF28_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_CON0),
		(&val),
		(PMIC_RG_LDO_VBIF28_OCFB_EN_MASK),
		(PMIC_RG_LDO_VBIF28_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_OC_MODE_MASK),
		(PMIC_RG_LDO_VBIF28_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_CON0),
		(&val),
		(PMIC_RG_LDO_VBIF28_OC_MODE_MASK),
		(PMIC_RG_LDO_VBIF28_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_OC_TSEL_MASK),
		(PMIC_RG_LDO_VBIF28_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VBIF28_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_OP_MODE_MASK),
		(PMIC_RG_LDO_VBIF28_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_CON0),
		(&val),
		(PMIC_RG_LDO_VBIF28_OP_MODE_MASK),
		(PMIC_RG_LDO_VBIF28_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_CON0),
		(val),
		(PMIC_RG_LDO_VBIF28_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VBIF28_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_CON0),
		(&val),
		(PMIC_RG_LDO_VBIF28_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VBIF28_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_B_EN_MASK),
		(PMIC_DA_VBIF28_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_B_STB_MASK),
		(PMIC_DA_VBIF28_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_B_LP_MASK),
		(PMIC_DA_VBIF28_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_L_EN_MASK),
		(PMIC_DA_VBIF28_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_L_STB_MASK),
		(PMIC_DA_VBIF28_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_OCFB_EN_MASK),
		(PMIC_DA_VBIF28_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vbif28_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_MON),
		(&val),
		(PMIC_DA_VBIF28_DUMMY_LOAD_MASK),
		(PMIC_DA_VBIF28_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(val),
		(PMIC_RG_LDO_VBIF28_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VBIF28_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VBIF28_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vbif28_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VBIF28_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vbif28_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VBIF28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VBIF28_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VBIF28_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_EN_MASK),
		(PMIC_RG_LDO_VIBR_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_CON0),
		(&val),
		(PMIC_RG_LDO_VIBR_EN_MASK),
		(PMIC_RG_LDO_VIBR_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_LP_MASK),
		(PMIC_RG_LDO_VIBR_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_CON0),
		(&val),
		(PMIC_RG_LDO_VIBR_LP_MASK),
		(PMIC_RG_LDO_VIBR_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_STBTD_MASK),
		(PMIC_RG_LDO_VIBR_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_ULP_MASK),
		(PMIC_RG_LDO_VIBR_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_OCFB_EN_MASK),
		(PMIC_RG_LDO_VIBR_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_CON0),
		(&val),
		(PMIC_RG_LDO_VIBR_OCFB_EN_MASK),
		(PMIC_RG_LDO_VIBR_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_OC_MODE_MASK),
		(PMIC_RG_LDO_VIBR_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_CON0),
		(&val),
		(PMIC_RG_LDO_VIBR_OC_MODE_MASK),
		(PMIC_RG_LDO_VIBR_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_OC_TSEL_MASK),
		(PMIC_RG_LDO_VIBR_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VIBR_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_OP_MODE_MASK),
		(PMIC_RG_LDO_VIBR_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_CON0),
		(&val),
		(PMIC_RG_LDO_VIBR_OP_MODE_MASK),
		(PMIC_RG_LDO_VIBR_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_CON0),
		(val),
		(PMIC_RG_LDO_VIBR_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VIBR_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_CON0),
		(&val),
		(PMIC_RG_LDO_VIBR_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VIBR_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_B_EN_MASK),
		(PMIC_DA_VIBR_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_B_STB_MASK),
		(PMIC_DA_VIBR_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_B_LP_MASK),
		(PMIC_DA_VIBR_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_L_EN_MASK),
		(PMIC_DA_VIBR_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_L_STB_MASK),
		(PMIC_DA_VIBR_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_OCFB_EN_MASK),
		(PMIC_DA_VIBR_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vibr_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_MON),
		(&val),
		(PMIC_DA_VIBR_DUMMY_LOAD_MASK),
		(PMIC_DA_VIBR_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(val),
		(PMIC_RG_LDO_VIBR_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIBR_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VIBR_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vibr_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIBR_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vibr_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIBR_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIBR_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VIBR_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_EN_MASK),
		(PMIC_RG_LDO_VIO28_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_CON0),
		(&val),
		(PMIC_RG_LDO_VIO28_EN_MASK),
		(PMIC_RG_LDO_VIO28_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_LP_MASK),
		(PMIC_RG_LDO_VIO28_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_CON0),
		(&val),
		(PMIC_RG_LDO_VIO28_LP_MASK),
		(PMIC_RG_LDO_VIO28_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_STBTD_MASK),
		(PMIC_RG_LDO_VIO28_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_ULP_MASK),
		(PMIC_RG_LDO_VIO28_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_OCFB_EN_MASK),
		(PMIC_RG_LDO_VIO28_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_CON0),
		(&val),
		(PMIC_RG_LDO_VIO28_OCFB_EN_MASK),
		(PMIC_RG_LDO_VIO28_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_OC_MODE_MASK),
		(PMIC_RG_LDO_VIO28_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_CON0),
		(&val),
		(PMIC_RG_LDO_VIO28_OC_MODE_MASK),
		(PMIC_RG_LDO_VIO28_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_OC_TSEL_MASK),
		(PMIC_RG_LDO_VIO28_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VIO28_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_OP_MODE_MASK),
		(PMIC_RG_LDO_VIO28_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_CON0),
		(&val),
		(PMIC_RG_LDO_VIO28_OP_MODE_MASK),
		(PMIC_RG_LDO_VIO28_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_CON0),
		(val),
		(PMIC_RG_LDO_VIO28_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VIO28_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_CON0),
		(&val),
		(PMIC_RG_LDO_VIO28_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VIO28_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_B_EN_MASK),
		(PMIC_DA_VIO28_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_B_STB_MASK),
		(PMIC_DA_VIO28_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_B_LP_MASK),
		(PMIC_DA_VIO28_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_L_EN_MASK),
		(PMIC_DA_VIO28_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_L_STB_MASK),
		(PMIC_DA_VIO28_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_OCFB_EN_MASK),
		(PMIC_DA_VIO28_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vio28_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_MON),
		(&val),
		(PMIC_DA_VIO28_DUMMY_LOAD_MASK),
		(PMIC_DA_VIO28_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(val),
		(PMIC_RG_LDO_VIO28_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_EN),
		(&val),
		(PMIC_RG_LDO_VIO28_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VIO28_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vio28_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(val),
		(PMIC_RG_LDO_VIO28_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vio28_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VIO28_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VIO28_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VIO28_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_EN_MASK),
		(PMIC_RG_LDO_VM18_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_CON0),
		(&val),
		(PMIC_RG_LDO_VM18_EN_MASK),
		(PMIC_RG_LDO_VM18_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_LP_MASK),
		(PMIC_RG_LDO_VM18_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_CON0),
		(&val),
		(PMIC_RG_LDO_VM18_LP_MASK),
		(PMIC_RG_LDO_VM18_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_STBTD_MASK),
		(PMIC_RG_LDO_VM18_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_ULP_MASK),
		(PMIC_RG_LDO_VM18_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VM18_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_CON0),
		(&val),
		(PMIC_RG_LDO_VM18_OCFB_EN_MASK),
		(PMIC_RG_LDO_VM18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_OC_MODE_MASK),
		(PMIC_RG_LDO_VM18_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_CON0),
		(&val),
		(PMIC_RG_LDO_VM18_OC_MODE_MASK),
		(PMIC_RG_LDO_VM18_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_OC_TSEL_MASK),
		(PMIC_RG_LDO_VM18_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VM18_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_OP_MODE_MASK),
		(PMIC_RG_LDO_VM18_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_CON0),
		(&val),
		(PMIC_RG_LDO_VM18_OP_MODE_MASK),
		(PMIC_RG_LDO_VM18_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_CON0),
		(val),
		(PMIC_RG_LDO_VM18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VM18_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_CON0),
		(&val),
		(PMIC_RG_LDO_VM18_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VM18_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_B_EN_MASK),
		(PMIC_DA_VM18_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_B_STB_MASK),
		(PMIC_DA_VM18_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_B_LP_MASK),
		(PMIC_DA_VM18_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_L_EN_MASK),
		(PMIC_DA_VM18_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_L_STB_MASK),
		(PMIC_DA_VM18_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_OCFB_EN_MASK),
		(PMIC_DA_VM18_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vm18_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_MON),
		(&val),
		(PMIC_DA_VM18_DUMMY_LOAD_MASK),
		(PMIC_DA_VM18_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_EN),
		(val),
		(PMIC_RG_LDO_VM18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_EN),
		(&val),
		(PMIC_RG_LDO_VM18_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VM18_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vm18_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(val),
		(PMIC_RG_LDO_VM18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vm18_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VM18_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VM18_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VM18_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_EN_MASK),
		(PMIC_RG_LDO_VUFS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_CON0),
		(&val),
		(PMIC_RG_LDO_VUFS_EN_MASK),
		(PMIC_RG_LDO_VUFS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_LP_MASK),
		(PMIC_RG_LDO_VUFS_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_CON0),
		(&val),
		(PMIC_RG_LDO_VUFS_LP_MASK),
		(PMIC_RG_LDO_VUFS_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_STBTD_MASK),
		(PMIC_RG_LDO_VUFS_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_ULP_MASK),
		(PMIC_RG_LDO_VUFS_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_OCFB_EN_MASK),
		(PMIC_RG_LDO_VUFS_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_CON0),
		(&val),
		(PMIC_RG_LDO_VUFS_OCFB_EN_MASK),
		(PMIC_RG_LDO_VUFS_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_OC_MODE_MASK),
		(PMIC_RG_LDO_VUFS_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_CON0),
		(&val),
		(PMIC_RG_LDO_VUFS_OC_MODE_MASK),
		(PMIC_RG_LDO_VUFS_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_OC_TSEL_MASK),
		(PMIC_RG_LDO_VUFS_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_dummy_load(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VUFS_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_OP_MODE_MASK),
		(PMIC_RG_LDO_VUFS_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_CON0),
		(&val),
		(PMIC_RG_LDO_VUFS_OP_MODE_MASK),
		(PMIC_RG_LDO_VUFS_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_ck_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_CON0),
		(val),
		(PMIC_RG_LDO_VUFS_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VUFS_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_CON0),
		(&val),
		(PMIC_RG_LDO_VUFS_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VUFS_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_B_EN_MASK),
		(PMIC_DA_VUFS_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_B_STB_MASK),
		(PMIC_DA_VUFS_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_B_LP_MASK),
		(PMIC_DA_VUFS_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_L_EN_MASK),
		(PMIC_DA_VUFS_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_L_STB_MASK),
		(PMIC_DA_VUFS_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_OCFB_EN_MASK),
		(PMIC_DA_VUFS_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vufs_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_MON),
		(&val),
		(PMIC_DA_VUFS_DUMMY_LOAD_MASK),
		(PMIC_DA_VUFS_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw10_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw11_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw12_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw13_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw14_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(val),
		(PMIC_RG_LDO_VUFS_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VUFS_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VUFS_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw0_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw1_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw2_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw3_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw4_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw5_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw6_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw7_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw8_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw9_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw10_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw11_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw12_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw13_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_hw14_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vufs_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VUFS_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vufs_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VUFS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VUFS_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VUFS_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_LP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_LP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_STBTD_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_ULP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_ocfb_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_oc_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_oc_tsel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_OC_TSEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_dummy_load(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_r2r_pdn_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_R2R_PDN_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_R2R_PDN_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_ck_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_B_EN_MASK),
		(PMIC_DA_VSRAM_PROC1_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_B_STB_MASK),
		(PMIC_DA_VSRAM_PROC1_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_B_LP_MASK),
		(PMIC_DA_VSRAM_PROC1_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_L_EN_MASK),
		(PMIC_DA_VSRAM_PROC1_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_L_STB_MASK),
		(PMIC_DA_VSRAM_PROC1_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_OCFB_EN_MASK),
		(PMIC_DA_VSRAM_PROC1_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_DUMMY_LOAD_MASK),
		(PMIC_DA_VSRAM_PROC1_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_vsleep_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_VSLEEP_SEL_MASK),
		(PMIC_DA_VSRAM_PROC1_VSLEEP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_R2R_PDN_MASK),
		(PMIC_DA_VSRAM_PROC1_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_track_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC1_TRACK_NDIS_EN_MASK),
		(PMIC_DA_VSRAM_PROC1_TRACK_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_VOSEL0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_VOSEL0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ldo_vsram_proc1_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_VOSEL0),
		(&val),
		(PMIC_LDO_VSRAM_PROC1_WDTDBG_VOSEL_MASK),
		(PMIC_LDO_VSRAM_PROC1_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_PROC1_VOSEL_GRAY_MASK),
		(PMIC_DA_VSRAM_PROC1_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_PROC1_VOSEL_MASK),
		(PMIC_DA_VSRAM_PROC1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_FRATE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_sfchg_fen(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_FEN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_RRATE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_sfchg_ren(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_REN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_dvs_trans_td(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_DVS_TRANS_TD_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_DVS_TRANS_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_dvs_trans_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_DVS_TRANS_CTRL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_DVS_TRANS_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_dvs_trans_once(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_DVS_TRANS_ONCE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_DVS_TRANS_ONCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw0_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw1_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw2_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw3_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw4_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw5_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw6_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw7_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw8_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw9_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw10_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw11_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw12_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw13_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw14_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_sw_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw0_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw1_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw2_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw3_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw4_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw5_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw6_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw7_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw8_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw9_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_sw_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_track_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_track_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_track_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_track_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_TRACK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel_delta(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_DELTA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel_delta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_DELTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel_offset(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_OFFSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel_lb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel_lb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_LB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc1_vosel_hb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_HB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc1_vosel_hb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC1_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC1_VOSEL_HB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_LP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_LP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_STBTD_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_ULP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_ocfb_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_oc_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_oc_tsel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_OC_TSEL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_dummy_load(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_r2r_pdn_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_R2R_PDN_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_R2R_PDN_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_ck_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_B_EN_MASK),
		(PMIC_DA_VSRAM_PROC2_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_B_STB_MASK),
		(PMIC_DA_VSRAM_PROC2_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_B_LP_MASK),
		(PMIC_DA_VSRAM_PROC2_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_L_EN_MASK),
		(PMIC_DA_VSRAM_PROC2_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_L_STB_MASK),
		(PMIC_DA_VSRAM_PROC2_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_OCFB_EN_MASK),
		(PMIC_DA_VSRAM_PROC2_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_DUMMY_LOAD_MASK),
		(PMIC_DA_VSRAM_PROC2_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_vsleep_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_VSLEEP_SEL_MASK),
		(PMIC_DA_VSRAM_PROC2_VSLEEP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_R2R_PDN_MASK),
		(PMIC_DA_VSRAM_PROC2_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_track_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_MON),
		(&val),
		(PMIC_DA_VSRAM_PROC2_TRACK_NDIS_EN_MASK),
		(PMIC_DA_VSRAM_PROC2_TRACK_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_VOSEL0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_VOSEL0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ldo_vsram_proc2_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_VOSEL0),
		(&val),
		(PMIC_LDO_VSRAM_PROC2_WDTDBG_VOSEL_MASK),
		(PMIC_LDO_VSRAM_PROC2_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_PROC2_VOSEL_GRAY_MASK),
		(PMIC_DA_VSRAM_PROC2_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_proc2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_PROC2_VOSEL_MASK),
		(PMIC_DA_VSRAM_PROC2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_FRATE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_sfchg_fen(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_FEN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_RRATE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_sfchg_ren(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_REN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_dvs_trans_td(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_DVS_TRANS_TD_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_DVS_TRANS_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_dvs_trans_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_DVS_TRANS_CTRL_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_DVS_TRANS_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_dvs_trans_once(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_DVS_TRANS_ONCE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_DVS_TRANS_ONCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw0_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw1_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw2_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw3_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw4_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw5_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw6_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw7_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw8_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw9_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw10_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw11_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw12_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw13_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw14_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_sw_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw0_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw1_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw2_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw3_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw4_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw5_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw6_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw7_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw8_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw9_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_sw_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_track_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_track_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_track_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_track_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_TRACK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel_delta(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_DELTA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel_delta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_DELTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel_offset(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_OFFSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel_lb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel_lb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_LB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_proc2_vosel_hb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_HB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_proc2_vosel_hb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_PROC2_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_PROC2_VOSEL_HB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_LP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_LP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_STBTD_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_ULP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_ocfb_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_oc_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_oc_tsel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OC_TSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_dummy_load(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_op_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_r2r_pdn_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_R2R_PDN_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_R2R_PDN_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_ck_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_B_EN_MASK),
		(PMIC_DA_VSRAM_OTHERS_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_B_STB_MASK),
		(PMIC_DA_VSRAM_OTHERS_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_B_LP_MASK),
		(PMIC_DA_VSRAM_OTHERS_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_L_EN_MASK),
		(PMIC_DA_VSRAM_OTHERS_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_L_STB_MASK),
		(PMIC_DA_VSRAM_OTHERS_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_OCFB_EN_MASK),
		(PMIC_DA_VSRAM_OTHERS_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_DUMMY_LOAD_MASK),
		(PMIC_DA_VSRAM_OTHERS_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_vsleep_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_VSLEEP_SEL_MASK),
		(PMIC_DA_VSRAM_OTHERS_VSLEEP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_R2R_PDN_MASK),
		(PMIC_DA_VSRAM_OTHERS_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_track_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_MON),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_TRACK_NDIS_EN_MASK),
		(PMIC_DA_VSRAM_OTHERS_TRACK_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_VOSEL0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_VOSEL0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ldo_vsram_others_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_VOSEL0),
		(&val),
		(PMIC_LDO_VSRAM_OTHERS_WDTDBG_VOSEL_MASK),
		(PMIC_LDO_VSRAM_OTHERS_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_VOSEL_GRAY_MASK),
		(PMIC_DA_VSRAM_OTHERS_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_others_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_OTHERS_VOSEL_MASK),
		(PMIC_DA_VSRAM_OTHERS_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_FRATE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sfchg_fen(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_FEN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_RRATE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sfchg_ren(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_REN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_dvs_trans_td(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_DVS_TRANS_TD_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_DVS_TRANS_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_dvs_trans_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_DVS_TRANS_CTRL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_DVS_TRANS_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_dvs_trans_once(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_DVS_TRANS_ONCE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_DVS_TRANS_ONCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw0_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw1_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw2_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw3_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw4_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw5_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw6_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw7_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw8_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw9_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw10_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw11_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw12_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw13_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw14_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sw_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw0_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw1_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw2_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw3_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw4_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw5_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw6_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw7_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw8_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw9_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sw_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_track_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_track_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_track_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_track_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_TRACK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel_delta(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_DELTA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel_delta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_DELTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel_offset(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_OFFSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel_lb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel_lb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_LB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_vosel_hb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_HB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_vosel_hb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_VOSEL_HB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sshub_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_sshub_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sshub_vosel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_sshub_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sshub_sleep_vosel_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_SLEEP_VOSEL_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_SLEEP_VOSEL_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_sshub_sleep_vosel_en(
	void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_SLEEP_VOSEL_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_SLEEP_VOSEL_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_sshub_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_sshub_vosel_sleep(
	void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_SSHUB),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_bt_lp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_BT),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_bt_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_BT),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_bt_lp_vosel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_BT),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_bt_lp_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_BT),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_BT_LP_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_spi_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SPI),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_spi_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_SPI),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_EN_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_others_spi_vosel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_OTHERS_SPI),
		(val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_others_spi_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_OTHERS_SPI),
		(&val),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_VOSEL_MASK),
		(PMIC_RG_LDO_VSRAM_OTHERS_SPI_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_lp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_LP_MASK),
		(PMIC_RG_LDO_VSRAM_MD_LP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_LP_MASK),
		(PMIC_RG_LDO_VSRAM_MD_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_stbtd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_STBTD_MASK),
		(PMIC_RG_LDO_VSRAM_MD_STBTD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_ulp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_ULP_MASK),
		(PMIC_RG_LDO_VSRAM_MD_ULP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_ocfb_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OCFB_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_OCFB_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_oc_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_oc_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_OC_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_oc_tsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_OC_TSEL_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OC_TSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_dummy_load(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_DUMMY_LOAD_MASK),
		(PMIC_RG_LDO_VSRAM_MD_DUMMY_LOAD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_op_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OP_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_op_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_OP_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_OP_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_r2r_pdn_dis(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_R2R_PDN_DIS_MASK),
		(PMIC_RG_LDO_VSRAM_MD_R2R_PDN_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_ck_sw_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_CK_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_ck_sw_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_CON0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_CK_SW_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_CK_SW_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_b_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_B_EN_MASK),
		(PMIC_DA_VSRAM_MD_B_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_b_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_B_STB_MASK),
		(PMIC_DA_VSRAM_MD_B_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_b_lp(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_B_LP_MASK),
		(PMIC_DA_VSRAM_MD_B_LP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_l_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_L_EN_MASK),
		(PMIC_DA_VSRAM_MD_L_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_l_stb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_L_STB_MASK),
		(PMIC_DA_VSRAM_MD_L_STB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_ocfb_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_OCFB_EN_MASK),
		(PMIC_DA_VSRAM_MD_OCFB_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_dummy_load(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_DUMMY_LOAD_MASK),
		(PMIC_DA_VSRAM_MD_DUMMY_LOAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_vsleep_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_VSLEEP_SEL_MASK),
		(PMIC_DA_VSRAM_MD_VSLEEP_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_r2r_pdn(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_R2R_PDN_MASK),
		(PMIC_DA_VSRAM_MD_R2R_PDN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_track_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_MON),
		(&val),
		(PMIC_DA_VSRAM_MD_TRACK_NDIS_EN_MASK),
		(PMIC_DA_VSRAM_MD_TRACK_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel_sleep(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_VOSEL0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_SLEEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel_sleep(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_VOSEL0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_SLEEP_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_SLEEP_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ldo_vsram_md_wdtdbg_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_VOSEL0),
		(&val),
		(PMIC_LDO_VSRAM_MD_WDTDBG_VOSEL_MASK),
		(PMIC_LDO_VSRAM_MD_WDTDBG_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_vosel_gray(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_MD_VOSEL_GRAY_MASK),
		(PMIC_DA_VSRAM_MD_VOSEL_GRAY_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_vsram_md_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_VOSEL1),
		(&val),
		(PMIC_DA_VSRAM_MD_VOSEL_MASK),
		(PMIC_DA_VSRAM_MD_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_sfchg_frate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_FRATE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_FRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_sfchg_fen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_FEN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_FEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_sfchg_rrate(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_RRATE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_RRATE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_sfchg_ren(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_SFCHG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_REN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SFCHG_REN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_dvs_trans_td(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_DVS_TRANS_TD_MASK),
		(PMIC_RG_LDO_VSRAM_MD_DVS_TRANS_TD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_dvs_trans_ctrl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_DVS_TRANS_CTRL_MASK),
		(PMIC_RG_LDO_VSRAM_MD_DVS_TRANS_CTRL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_dvs_trans_once(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_DVS),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_DVS_TRANS_ONCE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_DVS_TRANS_ONCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw0_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw0_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw1_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw1_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw2_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw2_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw3_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw3_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw4_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw4_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw5_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw5_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw6_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw6_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw7_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw7_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw8_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw8_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw9_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw9_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw10_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw10_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw11_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw11_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw12_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw12_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw13_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw13_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw14_op_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw14_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_sw_op_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_sw_op_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_EN),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw0_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw0_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW0_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw1_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw1_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW1_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw2_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw2_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW2_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw3_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw3_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW3_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw4_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw4_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW4_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw5_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw5_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW5_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw6_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw6_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW6_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw7_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw7_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW7_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw8_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw8_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW8_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw9_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw9_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW9_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw10_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw10_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW10_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw11_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw11_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW11_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw12_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw12_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW12_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw13_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw13_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW13_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_hw14_op_cfg(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_hw14_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_HW14_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_sw_op_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_sw_op_cfg(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_OP_CFG),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_CFG_MASK),
		(PMIC_RG_LDO_VSRAM_MD_SW_OP_CFG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_track_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_track_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_EN_MASK),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_track_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_TRACK0),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_track_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_TRACK0),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_MODE_MASK),
		(PMIC_RG_LDO_VSRAM_MD_TRACK_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel_delta(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_DELTA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel_delta(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_DELTA_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_DELTA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel_offset(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_TRACK1),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_OFFSET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_TRACK1),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_OFFSET_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel_lb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel_lb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LB_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_LB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ldo_vsram_md_vosel_hb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_LDO_VSRAM_MD_TRACK2),
		(val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_HB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ldo_vsram_md_vosel_hb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_LDO_VSRAM_MD_TRACK2),
		(&val),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_HB_MASK),
		(PMIC_RG_LDO_VSRAM_MD_VOSEL_HB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vfe28_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON0),
		(val),
		(PMIC_RG_VFE28_VOCAL_MASK),
		(PMIC_RG_VFE28_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vfe28_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON0),
		(val),
		(PMIC_RG_VFE28_VOSEL_MASK),
		(PMIC_RG_VFE28_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vfe28_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON0),
		(&val),
		(PMIC_RG_VFE28_VOSEL_MASK),
		(PMIC_RG_VFE28_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vfe28_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON1),
		(val),
		(PMIC_RG_VFE28_NDIS_EN_MASK),
		(PMIC_RG_VFE28_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vfe28_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON1),
		(&val),
		(PMIC_RG_VFE28_NDIS_EN_MASK),
		(PMIC_RG_VFE28_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vfe28_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON1),
		(val),
		(PMIC_RG_VFE28_RSV_1_MASK),
		(PMIC_RG_VFE28_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vfe28_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON1),
		(val),
		(PMIC_RG_VFE28_OC_LP_EN_MASK),
		(PMIC_RG_VFE28_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vfe28_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON1),
		(&val),
		(PMIC_RG_VFE28_OC_LP_EN_MASK),
		(PMIC_RG_VFE28_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vfe28_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON1),
		(val),
		(PMIC_RG_VFE28_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VFE28_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vfe28_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON1),
		(&val),
		(PMIC_RG_VFE28_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VFE28_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vfe28_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON1),
		(val),
		(PMIC_RG_VFE28_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VFE28_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vfe28_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON1),
		(&val),
		(PMIC_RG_VFE28_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VFE28_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vfe28_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ANA_CON1),
		(val),
		(PMIC_RG_VFE28_MEASURE_FT_EN_MASK),
		(PMIC_RG_VFE28_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vfe28_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON1),
		(&val),
		(PMIC_RG_VFE28_MEASURE_FT_EN_MASK),
		(PMIC_RG_VFE28_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vfe28_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VFE28_ANA_CON1),
		(&val),
		(PMIC_RGS_VFE28_OC_STATUS_MASK),
		(PMIC_RGS_VFE28_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON0),
		(val),
		(PMIC_RG_VAUX18_VOCAL_MASK),
		(PMIC_RG_VAUX18_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON0),
		(val),
		(PMIC_RG_VAUX18_VOSEL_MASK),
		(PMIC_RG_VAUX18_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON0),
		(&val),
		(PMIC_RG_VAUX18_VOSEL_MASK),
		(PMIC_RG_VAUX18_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON1),
		(val),
		(PMIC_RG_VAUX18_NDIS_EN_MASK),
		(PMIC_RG_VAUX18_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUX18_NDIS_EN_MASK),
		(PMIC_RG_VAUX18_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON1),
		(val),
		(PMIC_RG_VAUX18_RSV_1_MASK),
		(PMIC_RG_VAUX18_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON1),
		(val),
		(PMIC_RG_VAUX18_OC_LP_EN_MASK),
		(PMIC_RG_VAUX18_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUX18_OC_LP_EN_MASK),
		(PMIC_RG_VAUX18_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON1),
		(val),
		(PMIC_RG_VAUX18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VAUX18_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUX18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VAUX18_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON1),
		(val),
		(PMIC_RG_VAUX18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VAUX18_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUX18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VAUX18_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaux18_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUX18_ANA_CON1),
		(val),
		(PMIC_RG_VAUX18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VAUX18_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaux18_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUX18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VAUX18_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vaux18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUX18_ANA_CON1),
		(&val),
		(PMIC_RGS_VAUX18_OC_STATUS_MASK),
		(PMIC_RGS_VAUX18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vusb_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON0),
		(val),
		(PMIC_RG_VUSB_VOCAL_MASK),
		(PMIC_RG_VUSB_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vusb_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON0),
		(val),
		(PMIC_RG_VUSB_VOSEL_MASK),
		(PMIC_RG_VUSB_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vusb_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON0),
		(&val),
		(PMIC_RG_VUSB_VOSEL_MASK),
		(PMIC_RG_VUSB_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vusb_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON1),
		(val),
		(PMIC_RG_VUSB_NDIS_EN_MASK),
		(PMIC_RG_VUSB_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vusb_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON1),
		(&val),
		(PMIC_RG_VUSB_NDIS_EN_MASK),
		(PMIC_RG_VUSB_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vusb_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON1),
		(val),
		(PMIC_RG_VUSB_RSV_1_MASK),
		(PMIC_RG_VUSB_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vusb_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON1),
		(val),
		(PMIC_RG_VUSB_OC_LP_EN_MASK),
		(PMIC_RG_VUSB_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vusb_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON1),
		(&val),
		(PMIC_RG_VUSB_OC_LP_EN_MASK),
		(PMIC_RG_VUSB_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vusb_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON1),
		(val),
		(PMIC_RG_VUSB_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VUSB_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vusb_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON1),
		(&val),
		(PMIC_RG_VUSB_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VUSB_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vusb_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON1),
		(val),
		(PMIC_RG_VUSB_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VUSB_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vusb_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON1),
		(&val),
		(PMIC_RG_VUSB_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VUSB_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vusb_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUSB_ANA_CON1),
		(val),
		(PMIC_RG_VUSB_MEASURE_FT_EN_MASK),
		(PMIC_RG_VUSB_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vusb_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON1),
		(&val),
		(PMIC_RG_VUSB_MEASURE_FT_EN_MASK),
		(PMIC_RG_VUSB_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vusb_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUSB_ANA_CON1),
		(&val),
		(PMIC_RGS_VUSB_OC_STATUS_MASK),
		(PMIC_RGS_VUSB_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON0),
		(val),
		(PMIC_RG_VBIF28_VOCAL_MASK),
		(PMIC_RG_VBIF28_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbif28_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON0),
		(val),
		(PMIC_RG_VBIF28_VOSEL_MASK),
		(PMIC_RG_VBIF28_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON0),
		(&val),
		(PMIC_RG_VBIF28_VOSEL_MASK),
		(PMIC_RG_VBIF28_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON1),
		(val),
		(PMIC_RG_VBIF28_NDIS_EN_MASK),
		(PMIC_RG_VBIF28_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON1),
		(&val),
		(PMIC_RG_VBIF28_NDIS_EN_MASK),
		(PMIC_RG_VBIF28_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON1),
		(val),
		(PMIC_RG_VBIF28_RSV_1_MASK),
		(PMIC_RG_VBIF28_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbif28_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON1),
		(val),
		(PMIC_RG_VBIF28_OC_LP_EN_MASK),
		(PMIC_RG_VBIF28_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON1),
		(&val),
		(PMIC_RG_VBIF28_OC_LP_EN_MASK),
		(PMIC_RG_VBIF28_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON1),
		(val),
		(PMIC_RG_VBIF28_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VBIF28_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON1),
		(&val),
		(PMIC_RG_VBIF28_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VBIF28_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON1),
		(val),
		(PMIC_RG_VBIF28_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VBIF28_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON1),
		(&val),
		(PMIC_RG_VBIF28_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VBIF28_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbif28_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBIF28_ANA_CON1),
		(val),
		(PMIC_RG_VBIF28_MEASURE_FT_EN_MASK),
		(PMIC_RG_VBIF28_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbif28_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON1),
		(&val),
		(PMIC_RG_VBIF28_MEASURE_FT_EN_MASK),
		(PMIC_RG_VBIF28_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vbif28_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBIF28_ANA_CON1),
		(&val),
		(PMIC_RGS_VBIF28_OC_STATUS_MASK),
		(PMIC_RGS_VBIF28_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON0),
		(val),
		(PMIC_RG_VCN33_1_VOCAL_MASK),
		(PMIC_RG_VCN33_1_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON0),
		(val),
		(PMIC_RG_VCN33_1_VOSEL_MASK),
		(PMIC_RG_VCN33_1_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON0),
		(&val),
		(PMIC_RG_VCN33_1_VOSEL_MASK),
		(PMIC_RG_VCN33_1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_NDIS_EN_MASK),
		(PMIC_RG_VCN33_1_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_1_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_1_NDIS_EN_MASK),
		(PMIC_RG_VCN33_1_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_RSV_0_MASK),
		(PMIC_RG_VCN33_1_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_RSV_1_MASK),
		(PMIC_RG_VCN33_1_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_OC_LP_EN_MASK),
		(PMIC_RG_VCN33_1_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_1_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_1_OC_LP_EN_MASK),
		(PMIC_RG_VCN33_1_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN33_1_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_1_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN33_1_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN33_1_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_1_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN33_1_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN33_1_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_1_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN33_1_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcn33_1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_1_ANA_CON1),
		(&val),
		(PMIC_RGS_VCN33_1_OC_STATUS_MASK),
		(PMIC_RGS_VCN33_1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON0),
		(val),
		(PMIC_RG_VCN33_2_VOCAL_MASK),
		(PMIC_RG_VCN33_2_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON0),
		(val),
		(PMIC_RG_VCN33_2_VOSEL_MASK),
		(PMIC_RG_VCN33_2_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON0),
		(&val),
		(PMIC_RG_VCN33_2_VOSEL_MASK),
		(PMIC_RG_VCN33_2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_NDIS_EN_MASK),
		(PMIC_RG_VCN33_2_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_2_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_2_NDIS_EN_MASK),
		(PMIC_RG_VCN33_2_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_RSV_0_MASK),
		(PMIC_RG_VCN33_2_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_RSV_1_MASK),
		(PMIC_RG_VCN33_2_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_OC_LP_EN_MASK),
		(PMIC_RG_VCN33_2_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_2_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_2_OC_LP_EN_MASK),
		(PMIC_RG_VCN33_2_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN33_2_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_2_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_2_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN33_2_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN33_2_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_2_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_2_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN33_2_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(val),
		(PMIC_RG_VCN33_2_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN33_2_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn33_2_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(&val),
		(PMIC_RG_VCN33_2_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN33_2_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcn33_2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN33_2_ANA_CON1),
		(&val),
		(PMIC_RGS_VCN33_2_OC_STATUS_MASK),
		(PMIC_RGS_VCN33_2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON0),
		(val),
		(PMIC_RG_VEMC_VOCAL_MASK),
		(PMIC_RG_VEMC_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vemc_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON0),
		(val),
		(PMIC_RG_VEMC_VOSEL_MASK),
		(PMIC_RG_VEMC_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vemc_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON0),
		(&val),
		(PMIC_RG_VEMC_VOSEL_MASK),
		(PMIC_RG_VEMC_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_NDIS_EN_MASK),
		(PMIC_RG_VEMC_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vemc_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON1),
		(&val),
		(PMIC_RG_VEMC_NDIS_EN_MASK),
		(PMIC_RG_VEMC_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_RSV_0_MASK),
		(PMIC_RG_VEMC_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vemc_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_RSV_1_MASK),
		(PMIC_RG_VEMC_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vemc_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_OC_LP_EN_MASK),
		(PMIC_RG_VEMC_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vemc_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON1),
		(&val),
		(PMIC_RG_VEMC_OC_LP_EN_MASK),
		(PMIC_RG_VEMC_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VEMC_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vemc_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON1),
		(&val),
		(PMIC_RG_VEMC_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VEMC_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VEMC_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vemc_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON1),
		(&val),
		(PMIC_RG_VEMC_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VEMC_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vemc_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEMC_ANA_CON1),
		(val),
		(PMIC_RG_VEMC_MEASURE_FT_EN_MASK),
		(PMIC_RG_VEMC_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vemc_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON1),
		(&val),
		(PMIC_RG_VEMC_MEASURE_FT_EN_MASK),
		(PMIC_RG_VEMC_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vemc_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEMC_ANA_CON1),
		(&val),
		(PMIC_RGS_VEMC_OC_STATUS_MASK),
		(PMIC_RGS_VEMC_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim1_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON0),
		(val),
		(PMIC_RG_VSIM1_VOCAL_MASK),
		(PMIC_RG_VSIM1_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim1_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON0),
		(val),
		(PMIC_RG_VSIM1_VOSEL_MASK),
		(PMIC_RG_VSIM1_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON0),
		(&val),
		(PMIC_RG_VSIM1_VOSEL_MASK),
		(PMIC_RG_VSIM1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim1_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON1),
		(val),
		(PMIC_RG_VSIM1_NDIS_EN_MASK),
		(PMIC_RG_VSIM1_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim1_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM1_NDIS_EN_MASK),
		(PMIC_RG_VSIM1_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim1_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON1),
		(val),
		(PMIC_RG_VSIM1_RSV_1_MASK),
		(PMIC_RG_VSIM1_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim1_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON1),
		(val),
		(PMIC_RG_VSIM1_OC_LP_EN_MASK),
		(PMIC_RG_VSIM1_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim1_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM1_OC_LP_EN_MASK),
		(PMIC_RG_VSIM1_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim1_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON1),
		(val),
		(PMIC_RG_VSIM1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSIM1_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim1_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSIM1_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim1_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON1),
		(val),
		(PMIC_RG_VSIM1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSIM1_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim1_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSIM1_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim1_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM1_ANA_CON1),
		(val),
		(PMIC_RG_VSIM1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSIM1_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim1_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSIM1_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsim1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM1_ANA_CON1),
		(&val),
		(PMIC_RGS_VSIM1_OC_STATUS_MASK),
		(PMIC_RGS_VSIM1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim2_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON0),
		(val),
		(PMIC_RG_VSIM2_VOCAL_MASK),
		(PMIC_RG_VSIM2_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim2_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON0),
		(val),
		(PMIC_RG_VSIM2_VOSEL_MASK),
		(PMIC_RG_VSIM2_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim2_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON0),
		(&val),
		(PMIC_RG_VSIM2_VOSEL_MASK),
		(PMIC_RG_VSIM2_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim2_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON1),
		(val),
		(PMIC_RG_VSIM2_NDIS_EN_MASK),
		(PMIC_RG_VSIM2_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim2_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM2_NDIS_EN_MASK),
		(PMIC_RG_VSIM2_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim2_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON1),
		(val),
		(PMIC_RG_VSIM2_RSV_1_MASK),
		(PMIC_RG_VSIM2_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim2_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON1),
		(val),
		(PMIC_RG_VSIM2_OC_LP_EN_MASK),
		(PMIC_RG_VSIM2_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim2_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM2_OC_LP_EN_MASK),
		(PMIC_RG_VSIM2_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim2_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON1),
		(val),
		(PMIC_RG_VSIM2_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSIM2_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim2_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM2_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSIM2_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim2_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON1),
		(val),
		(PMIC_RG_VSIM2_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSIM2_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim2_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM2_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSIM2_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsim2_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSIM2_ANA_CON1),
		(val),
		(PMIC_RG_VSIM2_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSIM2_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsim2_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON1),
		(&val),
		(PMIC_RG_VSIM2_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSIM2_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsim2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSIM2_ANA_CON1),
		(&val),
		(PMIC_RGS_VSIM2_OC_STATUS_MASK),
		(PMIC_RGS_VSIM2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio28_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON0),
		(val),
		(PMIC_RG_VIO28_VOCAL_MASK),
		(PMIC_RG_VIO28_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio28_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON0),
		(val),
		(PMIC_RG_VIO28_VOSEL_MASK),
		(PMIC_RG_VIO28_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio28_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON0),
		(&val),
		(PMIC_RG_VIO28_VOSEL_MASK),
		(PMIC_RG_VIO28_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio28_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON1),
		(val),
		(PMIC_RG_VIO28_NDIS_EN_MASK),
		(PMIC_RG_VIO28_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio28_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON1),
		(&val),
		(PMIC_RG_VIO28_NDIS_EN_MASK),
		(PMIC_RG_VIO28_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio28_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON1),
		(val),
		(PMIC_RG_VIO28_RSV_1_MASK),
		(PMIC_RG_VIO28_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio28_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON1),
		(val),
		(PMIC_RG_VIO28_OC_LP_EN_MASK),
		(PMIC_RG_VIO28_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio28_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON1),
		(&val),
		(PMIC_RG_VIO28_OC_LP_EN_MASK),
		(PMIC_RG_VIO28_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio28_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON1),
		(val),
		(PMIC_RG_VIO28_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VIO28_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio28_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON1),
		(&val),
		(PMIC_RG_VIO28_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VIO28_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio28_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON1),
		(val),
		(PMIC_RG_VIO28_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VIO28_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio28_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON1),
		(&val),
		(PMIC_RG_VIO28_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VIO28_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio28_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO28_ANA_CON1),
		(val),
		(PMIC_RG_VIO28_MEASURE_FT_EN_MASK),
		(PMIC_RG_VIO28_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio28_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON1),
		(&val),
		(PMIC_RG_VIO28_MEASURE_FT_EN_MASK),
		(PMIC_RG_VIO28_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vio28_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO28_ANA_CON1),
		(&val),
		(PMIC_RGS_VIO28_OC_STATUS_MASK),
		(PMIC_RGS_VIO28_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vibr_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON0),
		(val),
		(PMIC_RG_VIBR_VOCAL_MASK),
		(PMIC_RG_VIBR_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vibr_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON0),
		(val),
		(PMIC_RG_VIBR_VOSEL_MASK),
		(PMIC_RG_VIBR_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vibr_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON0),
		(&val),
		(PMIC_RG_VIBR_VOSEL_MASK),
		(PMIC_RG_VIBR_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vibr_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON1),
		(val),
		(PMIC_RG_VIBR_NDIS_EN_MASK),
		(PMIC_RG_VIBR_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vibr_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON1),
		(&val),
		(PMIC_RG_VIBR_NDIS_EN_MASK),
		(PMIC_RG_VIBR_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vibr_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON1),
		(val),
		(PMIC_RG_VIBR_RSV_1_MASK),
		(PMIC_RG_VIBR_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vibr_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON1),
		(val),
		(PMIC_RG_VIBR_OC_LP_EN_MASK),
		(PMIC_RG_VIBR_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vibr_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON1),
		(&val),
		(PMIC_RG_VIBR_OC_LP_EN_MASK),
		(PMIC_RG_VIBR_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vibr_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON1),
		(val),
		(PMIC_RG_VIBR_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VIBR_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vibr_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON1),
		(&val),
		(PMIC_RG_VIBR_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VIBR_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vibr_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON1),
		(val),
		(PMIC_RG_VIBR_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VIBR_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vibr_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON1),
		(&val),
		(PMIC_RG_VIBR_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VIBR_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vibr_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIBR_ANA_CON1),
		(val),
		(PMIC_RG_VIBR_MEASURE_FT_EN_MASK),
		(PMIC_RG_VIBR_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vibr_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON1),
		(&val),
		(PMIC_RG_VIBR_MEASURE_FT_EN_MASK),
		(PMIC_RG_VIBR_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vibr_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIBR_ANA_CON1),
		(&val),
		(PMIC_RGS_VIBR_OC_STATUS_MASK),
		(PMIC_RGS_VIBR_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_adldo_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ADLDO_ANA_CON0),
		(val),
		(PMIC_RG_ADLDO_RSV_MASK),
		(PMIC_RG_ADLDO_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vfe28_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_0),
		(val),
		(PMIC_RG_VFE28_VOTRIM_MASK),
		(PMIC_RG_VFE28_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaux18_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_0),
		(val),
		(PMIC_RG_VAUX18_VOTRIM_MASK),
		(PMIC_RG_VAUX18_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vusb_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_0),
		(val),
		(PMIC_RG_VUSB_VOTRIM_MASK),
		(PMIC_RG_VUSB_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbif28_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_0),
		(val),
		(PMIC_RG_VBIF28_VOTRIM_MASK),
		(PMIC_RG_VBIF28_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_1),
		(val),
		(PMIC_RG_VCN33_1_VOTRIM_MASK),
		(PMIC_RG_VCN33_1_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_1_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_1),
		(val),
		(PMIC_RG_VCN33_1_OC_TRIM_MASK),
		(PMIC_RG_VCN33_1_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_1),
		(val),
		(PMIC_RG_VCN33_2_VOTRIM_MASK),
		(PMIC_RG_VCN33_2_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn33_2_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_1),
		(val),
		(PMIC_RG_VCN33_2_OC_TRIM_MASK),
		(PMIC_RG_VCN33_2_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vemc_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_2),
		(val),
		(PMIC_RG_VEMC_VOTRIM_MASK),
		(PMIC_RG_VEMC_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vemc_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_2),
		(val),
		(PMIC_RG_VEMC_OC_TRIM_MASK),
		(PMIC_RG_VEMC_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim1_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_2),
		(val),
		(PMIC_RG_VSIM1_VOTRIM_MASK),
		(PMIC_RG_VSIM1_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim1_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_2),
		(val),
		(PMIC_RG_VSIM1_OC_TRIM_MASK),
		(PMIC_RG_VSIM1_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim2_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_3),
		(val),
		(PMIC_RG_VSIM2_VOTRIM_MASK),
		(PMIC_RG_VSIM2_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsim2_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_3),
		(val),
		(PMIC_RG_VSIM2_OC_TRIM_MASK),
		(PMIC_RG_VSIM2_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio28_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_3),
		(val),
		(PMIC_RG_VIO28_VOTRIM_MASK),
		(PMIC_RG_VIO28_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vibr_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_3),
		(val),
		(PMIC_RG_VIBR_VOTRIM_MASK),
		(PMIC_RG_VIBR_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vibr_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_4),
		(val),
		(PMIC_RG_VIBR_OC_TRIM_MASK),
		(PMIC_RG_VIBR_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrtc28_bias_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VFE28_ELR_4),
		(val),
		(PMIC_RG_VRTC28_BIAS_SEL_MASK),
		(PMIC_RG_VRTC28_BIAS_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON0),
		(val),
		(PMIC_RG_VRF18_VOCAL_MASK),
		(PMIC_RG_VRF18_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON0),
		(val),
		(PMIC_RG_VRF18_VOSEL_MASK),
		(PMIC_RG_VRF18_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf18_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON0),
		(&val),
		(PMIC_RG_VRF18_VOSEL_MASK),
		(PMIC_RG_VRF18_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf18_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_NDIS_EN_MASK),
		(PMIC_RG_VRF18_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf18_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON1),
		(&val),
		(PMIC_RG_VRF18_NDIS_EN_MASK),
		(PMIC_RG_VRF18_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf18_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_RSV_0_MASK),
		(PMIC_RG_VRF18_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_RSV_1_MASK),
		(PMIC_RG_VRF18_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_OC_LP_EN_MASK),
		(PMIC_RG_VRF18_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf18_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON1),
		(&val),
		(PMIC_RG_VRF18_OC_LP_EN_MASK),
		(PMIC_RG_VRF18_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf18_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRF18_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf18_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON1),
		(&val),
		(PMIC_RG_VRF18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRF18_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf18_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRF18_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf18_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON1),
		(&val),
		(PMIC_RG_VRF18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRF18_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf18_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ANA_CON1),
		(val),
		(PMIC_RG_VRF18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRF18_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf18_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON1),
		(&val),
		(PMIC_RG_VRF18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRF18_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrf18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF18_ANA_CON1),
		(&val),
		(PMIC_RGS_VRF18_OC_STATUS_MASK),
		(PMIC_RGS_VRF18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vefuse_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON0),
		(val),
		(PMIC_RG_VEFUSE_VOCAL_MASK),
		(PMIC_RG_VEFUSE_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vefuse_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON0),
		(val),
		(PMIC_RG_VEFUSE_VOSEL_MASK),
		(PMIC_RG_VEFUSE_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vefuse_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON0),
		(&val),
		(PMIC_RG_VEFUSE_VOSEL_MASK),
		(PMIC_RG_VEFUSE_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vefuse_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(val),
		(PMIC_RG_VEFUSE_NDIS_EN_MASK),
		(PMIC_RG_VEFUSE_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vefuse_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(&val),
		(PMIC_RG_VEFUSE_NDIS_EN_MASK),
		(PMIC_RG_VEFUSE_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vefuse_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(val),
		(PMIC_RG_VEFUSE_RSV_1_MASK),
		(PMIC_RG_VEFUSE_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vefuse_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(val),
		(PMIC_RG_VEFUSE_OC_LP_EN_MASK),
		(PMIC_RG_VEFUSE_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vefuse_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(&val),
		(PMIC_RG_VEFUSE_OC_LP_EN_MASK),
		(PMIC_RG_VEFUSE_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vefuse_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(val),
		(PMIC_RG_VEFUSE_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VEFUSE_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vefuse_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(&val),
		(PMIC_RG_VEFUSE_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VEFUSE_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vefuse_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(val),
		(PMIC_RG_VEFUSE_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VEFUSE_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vefuse_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(&val),
		(PMIC_RG_VEFUSE_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VEFUSE_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vefuse_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(val),
		(PMIC_RG_VEFUSE_MEASURE_FT_EN_MASK),
		(PMIC_RG_VEFUSE_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vefuse_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(&val),
		(PMIC_RG_VEFUSE_MEASURE_FT_EN_MASK),
		(PMIC_RG_VEFUSE_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vefuse_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VEFUSE_ANA_CON1),
		(&val),
		(PMIC_RGS_VEFUSE_OC_STATUS_MASK),
		(PMIC_RGS_VEFUSE_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn18_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON0),
		(val),
		(PMIC_RG_VCN18_VOCAL_MASK),
		(PMIC_RG_VCN18_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn18_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON0),
		(val),
		(PMIC_RG_VCN18_VOSEL_MASK),
		(PMIC_RG_VCN18_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn18_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON0),
		(&val),
		(PMIC_RG_VCN18_VOSEL_MASK),
		(PMIC_RG_VCN18_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn18_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON1),
		(val),
		(PMIC_RG_VCN18_NDIS_EN_MASK),
		(PMIC_RG_VCN18_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn18_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON1),
		(&val),
		(PMIC_RG_VCN18_NDIS_EN_MASK),
		(PMIC_RG_VCN18_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn18_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON1),
		(val),
		(PMIC_RG_VCN18_RSV_1_MASK),
		(PMIC_RG_VCN18_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn18_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON1),
		(val),
		(PMIC_RG_VCN18_OC_LP_EN_MASK),
		(PMIC_RG_VCN18_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn18_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON1),
		(&val),
		(PMIC_RG_VCN18_OC_LP_EN_MASK),
		(PMIC_RG_VCN18_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn18_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON1),
		(val),
		(PMIC_RG_VCN18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN18_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn18_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON1),
		(&val),
		(PMIC_RG_VCN18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN18_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn18_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON1),
		(val),
		(PMIC_RG_VCN18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN18_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn18_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON1),
		(&val),
		(PMIC_RG_VCN18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN18_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn18_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN18_ANA_CON1),
		(val),
		(PMIC_RG_VCN18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN18_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn18_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON1),
		(&val),
		(PMIC_RG_VCN18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN18_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcn18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN18_ANA_CON1),
		(&val),
		(PMIC_RGS_VCN18_OC_STATUS_MASK),
		(PMIC_RGS_VCN18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcamio_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON0),
		(val),
		(PMIC_RG_VCAMIO_VOCAL_MASK),
		(PMIC_RG_VCAMIO_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcamio_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON0),
		(val),
		(PMIC_RG_VCAMIO_VOSEL_MASK),
		(PMIC_RG_VCAMIO_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcamio_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON0),
		(&val),
		(PMIC_RG_VCAMIO_VOSEL_MASK),
		(PMIC_RG_VCAMIO_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcamio_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(val),
		(PMIC_RG_VCAMIO_NDIS_EN_MASK),
		(PMIC_RG_VCAMIO_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcamio_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(&val),
		(PMIC_RG_VCAMIO_NDIS_EN_MASK),
		(PMIC_RG_VCAMIO_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcamio_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(val),
		(PMIC_RG_VCAMIO_RSV_1_MASK),
		(PMIC_RG_VCAMIO_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcamio_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(val),
		(PMIC_RG_VCAMIO_OC_LP_EN_MASK),
		(PMIC_RG_VCAMIO_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcamio_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(&val),
		(PMIC_RG_VCAMIO_OC_LP_EN_MASK),
		(PMIC_RG_VCAMIO_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcamio_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(val),
		(PMIC_RG_VCAMIO_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCAMIO_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcamio_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(&val),
		(PMIC_RG_VCAMIO_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCAMIO_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcamio_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(val),
		(PMIC_RG_VCAMIO_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCAMIO_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcamio_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(&val),
		(PMIC_RG_VCAMIO_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCAMIO_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcamio_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(val),
		(PMIC_RG_VCAMIO_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCAMIO_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcamio_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(&val),
		(PMIC_RG_VCAMIO_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCAMIO_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcamio_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCAMIO_ANA_CON1),
		(&val),
		(PMIC_RGS_VCAMIO_OC_STATUS_MASK),
		(PMIC_RGS_VCAMIO_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaud18_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON0),
		(val),
		(PMIC_RG_VAUD18_VOCAL_MASK),
		(PMIC_RG_VAUD18_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaud18_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON0),
		(val),
		(PMIC_RG_VAUD18_VOSEL_MASK),
		(PMIC_RG_VAUD18_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaud18_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON0),
		(&val),
		(PMIC_RG_VAUD18_VOSEL_MASK),
		(PMIC_RG_VAUD18_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaud18_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON1),
		(val),
		(PMIC_RG_VAUD18_NDIS_EN_MASK),
		(PMIC_RG_VAUD18_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaud18_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUD18_NDIS_EN_MASK),
		(PMIC_RG_VAUD18_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaud18_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON1),
		(val),
		(PMIC_RG_VAUD18_RSV_1_MASK),
		(PMIC_RG_VAUD18_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaud18_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON1),
		(val),
		(PMIC_RG_VAUD18_OC_LP_EN_MASK),
		(PMIC_RG_VAUD18_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaud18_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUD18_OC_LP_EN_MASK),
		(PMIC_RG_VAUD18_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaud18_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON1),
		(val),
		(PMIC_RG_VAUD18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VAUD18_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaud18_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUD18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VAUD18_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaud18_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON1),
		(val),
		(PMIC_RG_VAUD18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VAUD18_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaud18_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUD18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VAUD18_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vaud18_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VAUD18_ANA_CON1),
		(val),
		(PMIC_RG_VAUD18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VAUD18_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vaud18_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON1),
		(&val),
		(PMIC_RG_VAUD18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VAUD18_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vaud18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VAUD18_ANA_CON1),
		(&val),
		(PMIC_RGS_VAUD18_OC_STATUS_MASK),
		(PMIC_RGS_VAUD18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio18_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON0),
		(val),
		(PMIC_RG_VIO18_VOCAL_MASK),
		(PMIC_RG_VIO18_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio18_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON0),
		(val),
		(PMIC_RG_VIO18_VOSEL_MASK),
		(PMIC_RG_VIO18_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio18_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON0),
		(&val),
		(PMIC_RG_VIO18_VOSEL_MASK),
		(PMIC_RG_VIO18_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio18_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON1),
		(val),
		(PMIC_RG_VIO18_NDIS_EN_MASK),
		(PMIC_RG_VIO18_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio18_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON1),
		(&val),
		(PMIC_RG_VIO18_NDIS_EN_MASK),
		(PMIC_RG_VIO18_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio18_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON1),
		(val),
		(PMIC_RG_VIO18_RSV_1_MASK),
		(PMIC_RG_VIO18_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio18_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON1),
		(val),
		(PMIC_RG_VIO18_OC_LP_EN_MASK),
		(PMIC_RG_VIO18_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio18_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON1),
		(&val),
		(PMIC_RG_VIO18_OC_LP_EN_MASK),
		(PMIC_RG_VIO18_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio18_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON1),
		(val),
		(PMIC_RG_VIO18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VIO18_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio18_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON1),
		(&val),
		(PMIC_RG_VIO18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VIO18_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio18_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON1),
		(val),
		(PMIC_RG_VIO18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VIO18_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio18_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON1),
		(&val),
		(PMIC_RG_VIO18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VIO18_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vio18_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VIO18_ANA_CON1),
		(val),
		(PMIC_RG_VIO18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VIO18_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vio18_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON1),
		(&val),
		(PMIC_RG_VIO18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VIO18_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vio18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VIO18_ANA_CON1),
		(&val),
		(PMIC_RGS_VIO18_OC_STATUS_MASK),
		(PMIC_RGS_VIO18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vm18_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON0),
		(val),
		(PMIC_RG_VM18_VOCAL_MASK),
		(PMIC_RG_VM18_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vm18_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON0),
		(val),
		(PMIC_RG_VM18_VOSEL_MASK),
		(PMIC_RG_VM18_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vm18_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON0),
		(&val),
		(PMIC_RG_VM18_VOSEL_MASK),
		(PMIC_RG_VM18_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vm18_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON1),
		(val),
		(PMIC_RG_VM18_NDIS_EN_MASK),
		(PMIC_RG_VM18_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vm18_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON1),
		(&val),
		(PMIC_RG_VM18_NDIS_EN_MASK),
		(PMIC_RG_VM18_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vm18_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON1),
		(val),
		(PMIC_RG_VM18_RSV_1_MASK),
		(PMIC_RG_VM18_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vm18_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON1),
		(val),
		(PMIC_RG_VM18_OC_LP_EN_MASK),
		(PMIC_RG_VM18_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vm18_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON1),
		(&val),
		(PMIC_RG_VM18_OC_LP_EN_MASK),
		(PMIC_RG_VM18_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vm18_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON1),
		(val),
		(PMIC_RG_VM18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VM18_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vm18_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON1),
		(&val),
		(PMIC_RG_VM18_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VM18_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vm18_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON1),
		(val),
		(PMIC_RG_VM18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VM18_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vm18_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON1),
		(&val),
		(PMIC_RG_VM18_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VM18_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vm18_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VM18_ANA_CON1),
		(val),
		(PMIC_RG_VM18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VM18_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vm18_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON1),
		(&val),
		(PMIC_RG_VM18_MEASURE_FT_EN_MASK),
		(PMIC_RG_VM18_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vm18_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VM18_ANA_CON1),
		(&val),
		(PMIC_RGS_VM18_OC_STATUS_MASK),
		(PMIC_RGS_VM18_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vufs_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON0),
		(val),
		(PMIC_RG_VUFS_VOCAL_MASK),
		(PMIC_RG_VUFS_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vufs_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON0),
		(val),
		(PMIC_RG_VUFS_VOSEL_MASK),
		(PMIC_RG_VUFS_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vufs_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON0),
		(&val),
		(PMIC_RG_VUFS_VOSEL_MASK),
		(PMIC_RG_VUFS_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vufs_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON1),
		(val),
		(PMIC_RG_VUFS_NDIS_EN_MASK),
		(PMIC_RG_VUFS_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vufs_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON1),
		(&val),
		(PMIC_RG_VUFS_NDIS_EN_MASK),
		(PMIC_RG_VUFS_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vufs_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON1),
		(val),
		(PMIC_RG_VUFS_RSV_1_MASK),
		(PMIC_RG_VUFS_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vufs_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON1),
		(val),
		(PMIC_RG_VUFS_OC_LP_EN_MASK),
		(PMIC_RG_VUFS_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vufs_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON1),
		(&val),
		(PMIC_RG_VUFS_OC_LP_EN_MASK),
		(PMIC_RG_VUFS_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vufs_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON1),
		(val),
		(PMIC_RG_VUFS_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VUFS_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vufs_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON1),
		(&val),
		(PMIC_RG_VUFS_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VUFS_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vufs_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON1),
		(val),
		(PMIC_RG_VUFS_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VUFS_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vufs_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON1),
		(&val),
		(PMIC_RG_VUFS_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VUFS_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vufs_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VUFS_ANA_CON1),
		(val),
		(PMIC_RG_VUFS_MEASURE_FT_EN_MASK),
		(PMIC_RG_VUFS_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vufs_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON1),
		(&val),
		(PMIC_RG_VUFS_MEASURE_FT_EN_MASK),
		(PMIC_RG_VUFS_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vufs_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VUFS_ANA_CON1),
		(&val),
		(PMIC_RGS_VUFS_OC_STATUS_MASK),
		(PMIC_RGS_VUFS_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_sldo20_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SLDO20_ANA_CON0),
		(val),
		(PMIC_RG_SLDO20_RSV_MASK),
		(PMIC_RG_SLDO20_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf12_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON0),
		(val),
		(PMIC_RG_VRF12_VOCAL_MASK),
		(PMIC_RG_VRF12_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf12_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON0),
		(val),
		(PMIC_RG_VRF12_VOSEL_MASK),
		(PMIC_RG_VRF12_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf12_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON0),
		(&val),
		(PMIC_RG_VRF12_VOSEL_MASK),
		(PMIC_RG_VRF12_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf12_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_NDIS_EN_MASK),
		(PMIC_RG_VRF12_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf12_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON1),
		(&val),
		(PMIC_RG_VRF12_NDIS_EN_MASK),
		(PMIC_RG_VRF12_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf12_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_RSV_0_MASK),
		(PMIC_RG_VRF12_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf12_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_RSV_1_MASK),
		(PMIC_RG_VRF12_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf12_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_OC_LP_EN_MASK),
		(PMIC_RG_VRF12_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf12_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON1),
		(&val),
		(PMIC_RG_VRF12_OC_LP_EN_MASK),
		(PMIC_RG_VRF12_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf12_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRF12_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf12_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON1),
		(&val),
		(PMIC_RG_VRF12_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRF12_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf12_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRF12_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf12_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON1),
		(&val),
		(PMIC_RG_VRF12_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRF12_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrf12_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF12_ANA_CON1),
		(val),
		(PMIC_RG_VRF12_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRF12_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrf12_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON1),
		(&val),
		(PMIC_RG_VRF12_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRF12_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrf12_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRF12_ANA_CON1),
		(&val),
		(PMIC_RGS_VRF12_OC_STATUS_MASK),
		(PMIC_RGS_VRF12_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn13_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON0),
		(val),
		(PMIC_RG_VCN13_VOCAL_MASK),
		(PMIC_RG_VCN13_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn13_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON0),
		(val),
		(PMIC_RG_VCN13_VOSEL_MASK),
		(PMIC_RG_VCN13_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn13_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON0),
		(&val),
		(PMIC_RG_VCN13_VOSEL_MASK),
		(PMIC_RG_VCN13_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn13_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_NDIS_EN_MASK),
		(PMIC_RG_VCN13_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn13_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON1),
		(&val),
		(PMIC_RG_VCN13_NDIS_EN_MASK),
		(PMIC_RG_VCN13_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn13_rsv_0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_RSV_0_MASK),
		(PMIC_RG_VCN13_RSV_0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn13_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_RSV_1_MASK),
		(PMIC_RG_VCN13_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn13_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_OC_LP_EN_MASK),
		(PMIC_RG_VCN13_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn13_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON1),
		(&val),
		(PMIC_RG_VCN13_OC_LP_EN_MASK),
		(PMIC_RG_VCN13_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn13_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN13_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn13_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON1),
		(&val),
		(PMIC_RG_VCN13_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VCN13_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn13_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN13_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn13_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON1),
		(&val),
		(PMIC_RG_VCN13_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VCN13_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vcn13_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VCN13_ANA_CON1),
		(val),
		(PMIC_RG_VCN13_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN13_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vcn13_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON1),
		(&val),
		(PMIC_RG_VCN13_MEASURE_FT_EN_MASK),
		(PMIC_RG_VCN13_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vcn13_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VCN13_ANA_CON1),
		(&val),
		(PMIC_RGS_VCN13_OC_STATUS_MASK),
		(PMIC_RGS_VCN13_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va09_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON0),
		(val),
		(PMIC_RG_VA09_VOCAL_MASK),
		(PMIC_RG_VA09_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va09_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON0),
		(val),
		(PMIC_RG_VA09_VOSEL_MASK),
		(PMIC_RG_VA09_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va09_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON0),
		(&val),
		(PMIC_RG_VA09_VOSEL_MASK),
		(PMIC_RG_VA09_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va09_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON1),
		(val),
		(PMIC_RG_VA09_NDIS_EN_MASK),
		(PMIC_RG_VA09_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va09_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON1),
		(&val),
		(PMIC_RG_VA09_NDIS_EN_MASK),
		(PMIC_RG_VA09_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va09_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON1),
		(val),
		(PMIC_RG_VA09_RSV_1_MASK),
		(PMIC_RG_VA09_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va09_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON1),
		(val),
		(PMIC_RG_VA09_OC_LP_EN_MASK),
		(PMIC_RG_VA09_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va09_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON1),
		(&val),
		(PMIC_RG_VA09_OC_LP_EN_MASK),
		(PMIC_RG_VA09_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va09_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON1),
		(val),
		(PMIC_RG_VA09_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VA09_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va09_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON1),
		(&val),
		(PMIC_RG_VA09_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VA09_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va09_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON1),
		(val),
		(PMIC_RG_VA09_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VA09_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va09_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON1),
		(&val),
		(PMIC_RG_VA09_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VA09_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va09_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA09_ANA_CON1),
		(val),
		(PMIC_RG_VA09_MEASURE_FT_EN_MASK),
		(PMIC_RG_VA09_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va09_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON1),
		(&val),
		(PMIC_RG_VA09_MEASURE_FT_EN_MASK),
		(PMIC_RG_VA09_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_va09_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA09_ANA_CON1),
		(&val),
		(PMIC_RGS_VA09_OC_STATUS_MASK),
		(PMIC_RGS_VA09_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va12_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON0),
		(val),
		(PMIC_RG_VA12_VOCAL_MASK),
		(PMIC_RG_VA12_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va12_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON0),
		(val),
		(PMIC_RG_VA12_VOSEL_MASK),
		(PMIC_RG_VA12_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va12_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON0),
		(&val),
		(PMIC_RG_VA12_VOSEL_MASK),
		(PMIC_RG_VA12_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va12_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON1),
		(val),
		(PMIC_RG_VA12_NDIS_EN_MASK),
		(PMIC_RG_VA12_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va12_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON1),
		(&val),
		(PMIC_RG_VA12_NDIS_EN_MASK),
		(PMIC_RG_VA12_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va12_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON1),
		(val),
		(PMIC_RG_VA12_RSV_1_MASK),
		(PMIC_RG_VA12_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va12_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON1),
		(val),
		(PMIC_RG_VA12_OC_LP_EN_MASK),
		(PMIC_RG_VA12_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va12_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON1),
		(&val),
		(PMIC_RG_VA12_OC_LP_EN_MASK),
		(PMIC_RG_VA12_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va12_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON1),
		(val),
		(PMIC_RG_VA12_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VA12_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va12_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON1),
		(&val),
		(PMIC_RG_VA12_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VA12_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va12_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON1),
		(val),
		(PMIC_RG_VA12_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VA12_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va12_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON1),
		(&val),
		(PMIC_RG_VA12_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VA12_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_va12_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VA12_ANA_CON1),
		(val),
		(PMIC_RG_VA12_MEASURE_FT_EN_MASK),
		(PMIC_RG_VA12_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_va12_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON1),
		(&val),
		(PMIC_RG_VA12_MEASURE_FT_EN_MASK),
		(PMIC_RG_VA12_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_va12_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VA12_ANA_CON1),
		(&val),
		(PMIC_RGS_VA12_OC_STATUS_MASK),
		(PMIC_RGS_VA12_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC1_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc1_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_PROC1_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_ndis_plcur(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC1_NDIS_PLCUR_MASK),
		(PMIC_RG_VSRAM_PROC1_NDIS_PLCUR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC1_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc1_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_PROC1_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_rsv_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC1_RSV_H_MASK),
		(PMIC_RG_VSRAM_PROC1_RSV_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_rsv_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC1_RSV_L_MASK),
		(PMIC_RG_VSRAM_PROC1_RSV_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_PROC1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc1_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_PROC1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_ulp_biasx2_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_PROC1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc1_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_PROC1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc1_measure_ft_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_PROC1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc1_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_PROC1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_PROC1_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_proc1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC1_ANA_CON1),
		(&val),
		(PMIC_RGS_VSRAM_PROC1_OC_STATUS_MASK),
		(PMIC_RGS_VSRAM_PROC1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC2_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc2_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_PROC2_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_ndis_plcur(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC2_NDIS_PLCUR_MASK),
		(PMIC_RG_VSRAM_PROC2_NDIS_PLCUR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC2_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc2_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_PROC2_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_rsv_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC2_RSV_H_MASK),
		(PMIC_RG_VSRAM_PROC2_RSV_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_rsv_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_PROC2_RSV_L_MASK),
		(PMIC_RG_VSRAM_PROC2_RSV_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_PROC2_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc2_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_PROC2_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_ulp_biasx2_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_PROC2_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc2_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_PROC2_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_proc2_measure_ft_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_PROC2_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_proc2_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_PROC2_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_PROC2_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_proc2_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_PROC2_ANA_CON1),
		(&val),
		(PMIC_RGS_VSRAM_PROC2_OC_STATUS_MASK),
		(PMIC_RGS_VSRAM_PROC2_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_others_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_OTHERS_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_others_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_OTHERS_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_others_ndis_plcur(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_OTHERS_NDIS_PLCUR_MASK),
		(PMIC_RG_VSRAM_OTHERS_NDIS_PLCUR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_others_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_OTHERS_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_others_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_OTHERS_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_others_rsv_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_OTHERS_RSV_H_MASK),
		(PMIC_RG_VSRAM_OTHERS_RSV_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_others_rsv_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_OTHERS_RSV_L_MASK),
		(PMIC_RG_VSRAM_OTHERS_RSV_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_others_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_OTHERS_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_others_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_OTHERS_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_others_ulp_biasx2_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_OTHERS_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_others_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_OTHERS_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_others_measure_ft_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_OTHERS_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_others_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_OTHERS_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_OTHERS_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_others_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_OTHERS_ANA_CON1),
		(&val),
		(PMIC_RGS_VSRAM_OTHERS_OC_STATUS_MASK),
		(PMIC_RGS_VSRAM_OTHERS_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_md_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_MD_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_MD_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_md_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_MD_NDIS_EN_MASK),
		(PMIC_RG_VSRAM_MD_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_md_ndis_plcur(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_MD_NDIS_PLCUR_MASK),
		(PMIC_RG_VSRAM_MD_NDIS_PLCUR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_md_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_MD_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_MD_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_md_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(&val),
		(PMIC_RG_VSRAM_MD_OC_LP_EN_MASK),
		(PMIC_RG_VSRAM_MD_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_md_rsv_h(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_MD_RSV_H_MASK),
		(PMIC_RG_VSRAM_MD_RSV_H_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_md_rsv_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON0),
		(val),
		(PMIC_RG_VSRAM_MD_RSV_L_MASK),
		(PMIC_RG_VSRAM_MD_RSV_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vsram_md_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_MD_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_MD_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_md_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_MD_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VSRAM_MD_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_md_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_MD_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_MD_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_md_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_MD_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VSRAM_MD_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vsram_md_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(val),
		(PMIC_RG_VSRAM_MD_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_MD_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vsram_md_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(&val),
		(PMIC_RG_VSRAM_MD_MEASURE_FT_EN_MASK),
		(PMIC_RG_VSRAM_MD_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vsram_md_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VSRAM_MD_ANA_CON1),
		(&val),
		(PMIC_RGS_VSRAM_MD_OC_STATUS_MASK),
		(PMIC_RGS_VSRAM_MD_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_sldo14_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_SLDO14_ANA_CON0),
		(val),
		(PMIC_RG_SLDO14_RSV_MASK),
		(PMIC_RG_SLDO14_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf18_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_0),
		(val),
		(PMIC_RG_VRF18_VOTRIM_MASK),
		(PMIC_RG_VRF18_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vefuse_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_0),
		(val),
		(PMIC_RG_VEFUSE_VOTRIM_MASK),
		(PMIC_RG_VEFUSE_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn18_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_0),
		(val),
		(PMIC_RG_VCN18_VOTRIM_MASK),
		(PMIC_RG_VCN18_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn18_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_0),
		(val),
		(PMIC_RG_VCN18_OC_TRIM_MASK),
		(PMIC_RG_VCN18_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcamio_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_1),
		(val),
		(PMIC_RG_VCAMIO_VOTRIM_MASK),
		(PMIC_RG_VCAMIO_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vaud18_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_1),
		(val),
		(PMIC_RG_VAUD18_VOTRIM_MASK),
		(PMIC_RG_VAUD18_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vio18_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_1),
		(val),
		(PMIC_RG_VIO18_VOTRIM_MASK),
		(PMIC_RG_VIO18_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vm18_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_1),
		(val),
		(PMIC_RG_VM18_VOTRIM_MASK),
		(PMIC_RG_VM18_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vufs_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_2),
		(val),
		(PMIC_RG_VUFS_VOTRIM_MASK),
		(PMIC_RG_VUFS_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vufs_oc_trim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_2),
		(val),
		(PMIC_RG_VUFS_OC_TRIM_MASK),
		(PMIC_RG_VUFS_OC_TRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrf12_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_2),
		(val),
		(PMIC_RG_VRF12_VOTRIM_MASK),
		(PMIC_RG_VRF12_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vcn13_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_2),
		(val),
		(PMIC_RG_VCN13_VOTRIM_MASK),
		(PMIC_RG_VCN13_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va09_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_3),
		(val),
		(PMIC_RG_VA09_VOTRIM_MASK),
		(PMIC_RG_VA09_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_va12_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRF18_ELR_3),
		(val),
		(PMIC_RG_VA12_VOTRIM_MASK),
		(PMIC_RG_VA12_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vxo22_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON0),
		(val),
		(PMIC_RG_VXO22_VOCAL_MASK),
		(PMIC_RG_VXO22_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vxo22_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON0),
		(val),
		(PMIC_RG_VXO22_VOSEL_MASK),
		(PMIC_RG_VXO22_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vxo22_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_ANA_CON0),
		(&val),
		(PMIC_RG_VXO22_VOSEL_MASK),
		(PMIC_RG_VXO22_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vxo22_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON1),
		(val),
		(PMIC_RG_VXO22_RSV_1_MASK),
		(PMIC_RG_VXO22_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vxo22_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON1),
		(val),
		(PMIC_RG_VXO22_OC_LP_EN_MASK),
		(PMIC_RG_VXO22_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vxo22_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_ANA_CON1),
		(&val),
		(PMIC_RG_VXO22_OC_LP_EN_MASK),
		(PMIC_RG_VXO22_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vxo22_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON1),
		(val),
		(PMIC_RG_VXO22_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VXO22_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vxo22_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_ANA_CON1),
		(&val),
		(PMIC_RG_VXO22_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VXO22_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vxo22_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON1),
		(val),
		(PMIC_RG_VXO22_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VXO22_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vxo22_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_ANA_CON1),
		(&val),
		(PMIC_RG_VXO22_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VXO22_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vxo22_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VXO22_ANA_CON1),
		(val),
		(PMIC_RG_VXO22_MEASURE_FT_EN_MASK),
		(PMIC_RG_VXO22_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vxo22_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_ANA_CON1),
		(&val),
		(PMIC_RG_VXO22_MEASURE_FT_EN_MASK),
		(PMIC_RG_VXO22_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vxo22_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VXO22_ANA_CON1),
		(&val),
		(PMIC_RGS_VXO22_OC_STATUS_MASK),
		(PMIC_RGS_VXO22_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON0),
		(val),
		(PMIC_RG_VRFCK_VOCAL_MASK),
		(PMIC_RG_VRFCK_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON0),
		(val),
		(PMIC_RG_VRFCK_VOSEL_MASK),
		(PMIC_RG_VRFCK_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_ANA_CON0),
		(&val),
		(PMIC_RG_VRFCK_VOSEL_MASK),
		(PMIC_RG_VRFCK_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_RSV_1_MASK),
		(PMIC_RG_VRFCK_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_OC_LP_EN_MASK),
		(PMIC_RG_VRFCK_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_OC_LP_EN_MASK),
		(PMIC_RG_VRFCK_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRFCK_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRFCK_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRFCK_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRFCK_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRFCK_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRFCK_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrfck_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_ANA_CON1),
		(&val),
		(PMIC_RGS_VRFCK_OC_STATUS_MASK),
		(PMIC_RGS_VRFCK_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON0),
		(val),
		(PMIC_RG_VRFCK_1_VOCAL_MASK),
		(PMIC_RG_VRFCK_1_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON0),
		(val),
		(PMIC_RG_VRFCK_1_VOSEL_MASK),
		(PMIC_RG_VRFCK_1_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_1_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_1_ANA_CON0),
		(&val),
		(PMIC_RG_VRFCK_1_VOSEL_MASK),
		(PMIC_RG_VRFCK_1_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_1_RSV_1_MASK),
		(PMIC_RG_VRFCK_1_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_1_OC_LP_EN_MASK),
		(PMIC_RG_VRFCK_1_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_1_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_1_OC_LP_EN_MASK),
		(PMIC_RG_VRFCK_1_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_ulp_iq_clamp_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRFCK_1_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_1_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_1_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VRFCK_1_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRFCK_1_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_1_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_1_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VRFCK_1_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(val),
		(PMIC_RG_VRFCK_1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRFCK_1_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_1_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(&val),
		(PMIC_RG_VRFCK_1_MEASURE_FT_EN_MASK),
		(PMIC_RG_VRFCK_1_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vrfck_1_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VRFCK_1_ANA_CON1),
		(&val),
		(PMIC_RGS_VRFCK_1_OC_STATUS_MASK),
		(PMIC_RGS_VRFCK_1_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbbck_vocal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON0),
		(val),
		(PMIC_RG_VBBCK_VOCAL_MASK),
		(PMIC_RG_VBBCK_VOCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbbck_vosel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON0),
		(val),
		(PMIC_RG_VBBCK_VOSEL_MASK),
		(PMIC_RG_VBBCK_VOSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbbck_vosel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBBCK_ANA_CON0),
		(&val),
		(PMIC_RG_VBBCK_VOSEL_MASK),
		(PMIC_RG_VBBCK_VOSEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbbck_rsv_1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON1),
		(val),
		(PMIC_RG_VBBCK_RSV_1_MASK),
		(PMIC_RG_VBBCK_RSV_1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbbck_oc_lp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON1),
		(val),
		(PMIC_RG_VBBCK_OC_LP_EN_MASK),
		(PMIC_RG_VBBCK_OC_LP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbbck_oc_lp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBBCK_ANA_CON1),
		(&val),
		(PMIC_RG_VBBCK_OC_LP_EN_MASK),
		(PMIC_RG_VBBCK_OC_LP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbbck_ulp_iq_clamp_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON1),
		(val),
		(PMIC_RG_VBBCK_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VBBCK_ULP_IQ_CLAMP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbbck_ulp_iq_clamp_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBBCK_ANA_CON1),
		(&val),
		(PMIC_RG_VBBCK_ULP_IQ_CLAMP_EN_MASK),
		(PMIC_RG_VBBCK_ULP_IQ_CLAMP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbbck_ulp_biasx2_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON1),
		(val),
		(PMIC_RG_VBBCK_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VBBCK_ULP_BIASX2_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbbck_ulp_biasx2_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBBCK_ANA_CON1),
		(&val),
		(PMIC_RG_VBBCK_ULP_BIASX2_EN_MASK),
		(PMIC_RG_VBBCK_ULP_BIASX2_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbbck_measure_ft_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_VBBCK_ANA_CON1),
		(val),
		(PMIC_RG_VBBCK_MEASURE_FT_EN_MASK),
		(PMIC_RG_VBBCK_MEASURE_FT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbbck_measure_ft_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBBCK_ANA_CON1),
		(&val),
		(PMIC_RG_VBBCK_MEASURE_FT_EN_MASK),
		(PMIC_RG_VBBCK_MEASURE_FT_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_vbbck_oc_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_VBBCK_ANA_CON1),
		(&val),
		(PMIC_RGS_VBBCK_OC_STATUS_MASK),
		(PMIC_RGS_VBBCK_OC_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vxo22_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(val),
		(PMIC_RG_VXO22_VOTRIM_MASK),
		(PMIC_RG_VXO22_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vxo22_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(val),
		(PMIC_RG_VXO22_NDIS_EN_MASK),
		(PMIC_RG_VXO22_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vxo22_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(&val),
		(PMIC_RG_VXO22_NDIS_EN_MASK),
		(PMIC_RG_VXO22_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(val),
		(PMIC_RG_VRFCK_VOTRIM_MASK),
		(PMIC_RG_VRFCK_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(val),
		(PMIC_RG_VRFCK_NDIS_EN_MASK),
		(PMIC_RG_VRFCK_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(&val),
		(PMIC_RG_VRFCK_NDIS_EN_MASK),
		(PMIC_RG_VRFCK_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(val),
		(PMIC_RG_VRFCK_1_VOTRIM_MASK),
		(PMIC_RG_VRFCK_1_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vrfck_1_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(val),
		(PMIC_RG_VRFCK_1_NDIS_EN_MASK),
		(PMIC_RG_VRFCK_1_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vrfck_1_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_0),
		(&val),
		(PMIC_RG_VRFCK_1_NDIS_EN_MASK),
		(PMIC_RG_VRFCK_1_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vbbck_votrim(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_1),
		(val),
		(PMIC_RG_VBBCK_VOTRIM_MASK),
		(PMIC_RG_VBBCK_VOTRIM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vbbck_ndis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_1),
		(val),
		(PMIC_RG_VBBCK_NDIS_EN_MASK),
		(PMIC_RG_VBBCK_NDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vbbck_ndis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DCXO_ADLDO_BIAS_ELR_1),
		(&val),
		(PMIC_RG_VBBCK_NDIS_EN_MASK),
		(PMIC_RG_VBBCK_NDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_isink_trim_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK_TRIM_EN_MASK),
		(PMIC_RG_ISINK_TRIM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_isink_trim_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(&val),
		(PMIC_RG_ISINK_TRIM_EN_MASK),
		(PMIC_RG_ISINK_TRIM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_isink_trim_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK_TRIM_SEL_MASK),
		(PMIC_RG_ISINK_TRIM_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_isink_rsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK_RSV_MASK),
		(PMIC_RG_ISINK_RSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_isink0_chop_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK0_CHOP_EN_MASK),
		(PMIC_RG_ISINK0_CHOP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_isink0_chop_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(&val),
		(PMIC_RG_ISINK0_CHOP_EN_MASK),
		(PMIC_RG_ISINK0_CHOP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_isink1_chop_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK1_CHOP_EN_MASK),
		(PMIC_RG_ISINK1_CHOP_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_isink1_chop_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(&val),
		(PMIC_RG_ISINK1_CHOP_EN_MASK),
		(PMIC_RG_ISINK1_CHOP_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_isink0_double(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK0_DOUBLE_MASK),
		(PMIC_RG_ISINK0_DOUBLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_isink1_double(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ANA_CON0),
		(val),
		(PMIC_RG_ISINK1_DOUBLE_MASK),
		(PMIC_RG_ISINK1_DOUBLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink0_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK0_CON1),
		(val),
		(PMIC_ISINK0_RSV1_MASK),
		(PMIC_ISINK0_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink0_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK0_CON1),
		(val),
		(PMIC_ISINK0_RSV0_MASK),
		(PMIC_ISINK0_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_ch0_step(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK0_CON1),
		(val),
		(PMIC_ISINK_CH0_STEP_MASK),
		(PMIC_ISINK_CH0_STEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink1_rsv1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK1_CON1),
		(val),
		(PMIC_ISINK1_RSV1_MASK),
		(PMIC_ISINK1_RSV1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink1_rsv0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK1_CON1),
		(val),
		(PMIC_ISINK1_RSV0_MASK),
		(PMIC_ISINK1_RSV0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_ch1_step(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK1_CON1),
		(val),
		(PMIC_ISINK_CH1_STEP_MASK),
		(PMIC_ISINK_CH1_STEP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_ad_isink0_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ISINK_ANA1_SMPL),
		(&val),
		(PMIC_AD_ISINK0_STATUS_MASK),
		(PMIC_AD_ISINK0_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_isink1_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ISINK_ANA1_SMPL),
		(&val),
		(PMIC_AD_ISINK1_STATUS_MASK),
		(PMIC_AD_ISINK1_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_isink_ch1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK_EN_CTRL_SMPL),
		(val),
		(PMIC_ISINK_CH1_EN_MASK),
		(PMIC_ISINK_CH1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_ch0_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK_EN_CTRL_SMPL),
		(val),
		(PMIC_ISINK_CH0_EN_MASK),
		(PMIC_ISINK_CH0_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_chop1_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK_EN_CTRL_SMPL),
		(val),
		(PMIC_ISINK_CHOP1_EN_MASK),
		(PMIC_ISINK_CHOP1_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_chop0_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK_EN_CTRL_SMPL),
		(val),
		(PMIC_ISINK_CHOP0_EN_MASK),
		(PMIC_ISINK_CHOP0_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_ch1_bias_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK_EN_CTRL_SMPL),
		(val),
		(PMIC_ISINK_CH1_BIAS_EN_MASK),
		(PMIC_ISINK_CH1_BIAS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_isink_ch0_bias_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ISINK_EN_CTRL_SMPL),
		(val),
		(PMIC_ISINK_CH0_BIAS_EN_MASK),
		(PMIC_ISINK_CH0_BIAS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_isink_trim_bias(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_DUMMYLOAD_ELR_0),
		(val),
		(PMIC_RG_ISINK_TRIM_BIAS_MASK),
		(PMIC_RG_ISINK_TRIM_BIAS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_aud_top_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_ID),
		(&val),
		(PMIC_AUD_TOP_ANA_ID_MASK),
		(PMIC_AUD_TOP_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_ID),
		(&val),
		(PMIC_AUD_TOP_DIG_ID_MASK),
		(PMIC_AUD_TOP_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_REV0),
		(&val),
		(PMIC_AUD_TOP_ANA_MINOR_REV_MASK),
		(PMIC_AUD_TOP_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_REV0),
		(&val),
		(PMIC_AUD_TOP_ANA_MAJOR_REV_MASK),
		(PMIC_AUD_TOP_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_REV0),
		(&val),
		(PMIC_AUD_TOP_DIG_MINOR_REV_MASK),
		(PMIC_AUD_TOP_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_REV0),
		(&val),
		(PMIC_AUD_TOP_DIG_MAJOR_REV_MASK),
		(PMIC_AUD_TOP_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_clk_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_CKPDN_TPM0),
		(&val),
		(PMIC_AUD_TOP_CLK_OFFSET_MASK),
		(PMIC_AUD_TOP_CLK_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_rst_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_CKPDN_TPM0),
		(&val),
		(PMIC_AUD_TOP_RST_OFFSET_MASK),
		(PMIC_AUD_TOP_RST_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_int_offset(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_CKPDN_TPM1),
		(&val),
		(PMIC_AUD_TOP_INT_OFFSET_MASK),
		(PMIC_AUD_TOP_INT_OFFSET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_top_int_len(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_CKPDN_TPM1),
		(&val),
		(PMIC_AUD_TOP_INT_LEN_MASK),
		(PMIC_AUD_TOP_INT_LEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_accdet_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_ACCDET_CK_PDN_MASK),
		(PMIC_RG_ACCDET_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_AUD_CK_PDN_MASK),
		(PMIC_RG_AUD_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audif_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_AUDIF_CK_PDN_MASK),
		(PMIC_RG_AUDIF_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_zcd13m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_ZCD13M_CK_PDN_MASK),
		(PMIC_RG_ZCD13M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audncp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_AUDNCP_CK_PDN_MASK),
		(PMIC_RG_AUDNCP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_pad_aud_clk_miso_ck_pdn(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_PAD_AUD_CLK_MISO_CK_PDN_MASK),
		(PMIC_RG_PAD_AUD_CLK_MISO_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_intrp_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_AUD_INTRP_CK_PDN_MASK),
		(PMIC_RG_AUD_INTRP_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow32k_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_VOW32K_CK_PDN_MASK),
		(PMIC_RG_VOW32K_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow13m_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKPDN_CON0),
		(val),
		(PMIC_RG_VOW13M_CK_PDN_MASK),
		(PMIC_RG_VOW13M_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_ck_cksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_AUD_CK_CKSEL_MASK),
		(PMIC_RG_AUD_CK_CKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audif_ck_cksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKSEL_CON0),
		(val),
		(PMIC_RG_AUDIF_CK_CKSEL_MASK),
		(PMIC_RG_AUDIF_CK_CKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud26m_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_AUD26M_CK_TST_DIS_MASK),
		(PMIC_RG_AUD26M_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_AUD_CK_TSTSEL_MASK),
		(PMIC_RG_AUD_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audif_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_AUDIF_CK_TSTSEL_MASK),
		(PMIC_RG_AUDIF_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud26m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_AUD26M_CK_TSTSEL_MASK),
		(PMIC_RG_AUD26M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow13m_ck_tst_dis(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_VOW13M_CK_TST_DIS_MASK),
		(PMIC_RG_VOW13M_CK_TST_DIS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow13m_ck_tstsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CKTST_CON0),
		(val),
		(PMIC_RG_VOW13M_CK_TSTSEL_MASK),
		(PMIC_RG_VOW13M_CK_TSTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_intrp_ck_pdn_hwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_CLK_HWEN_CON0),
		(val),
		(PMIC_RG_AUD_INTRP_CK_PDN_HWEN_MASK),
		(PMIC_RG_AUD_INTRP_CK_PDN_HWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audio_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_CON0),
		(val),
		(PMIC_RG_AUDIO_RST_MASK),
		(PMIC_RG_AUDIO_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_accdet_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_CON0),
		(val),
		(PMIC_RG_ACCDET_RST_MASK),
		(PMIC_RG_ACCDET_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_zcd_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_CON0),
		(val),
		(PMIC_RG_ZCD_RST_MASK),
		(PMIC_RG_ZCD_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audncp_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_CON0),
		(val),
		(PMIC_RG_AUDNCP_RST_MASK),
		(PMIC_RG_AUDNCP_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_accdet_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_BANK_CON0),
		(val),
		(PMIC_BANK_ACCDET_SWRST_MASK),
		(PMIC_BANK_ACCDET_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_audio_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_BANK_CON0),
		(val),
		(PMIC_BANK_AUDIO_SWRST_MASK),
		(PMIC_BANK_AUDIO_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_bank_audzcd_swrst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_RST_BANK_CON0),
		(val),
		(PMIC_BANK_AUDZCD_SWRST_MASK),
		(PMIC_BANK_AUDZCD_SWRST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_en_audio(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_AUDIO_MASK),
		(PMIC_RG_INT_EN_AUDIO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_audio(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_AUDIO_MASK),
		(PMIC_RG_INT_EN_AUDIO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_accdet(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_ACCDET_MASK),
		(PMIC_RG_INT_EN_ACCDET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_accdet(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_ACCDET_MASK),
		(PMIC_RG_INT_EN_ACCDET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_accdet_eint0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_ACCDET_EINT0_MASK),
		(PMIC_RG_INT_EN_ACCDET_EINT0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_accdet_eint0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_ACCDET_EINT0_MASK),
		(PMIC_RG_INT_EN_ACCDET_EINT0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_en_accdet_eint1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(val),
		(PMIC_RG_INT_EN_ACCDET_EINT1_MASK),
		(PMIC_RG_INT_EN_ACCDET_EINT1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_en_accdet_eint1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_CON0),
		(&val),
		(PMIC_RG_INT_EN_ACCDET_EINT1_MASK),
		(PMIC_RG_INT_EN_ACCDET_EINT1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_int_mask_audio(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_AUDIO_MASK),
		(PMIC_RG_INT_MASK_AUDIO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_accdet(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_ACCDET_MASK),
		(PMIC_RG_INT_MASK_ACCDET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_accdet_eint0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_ACCDET_EINT0_MASK),
		(PMIC_RG_INT_MASK_ACCDET_EINT0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_int_mask_accdet_eint1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_MASK_CON0),
		(val),
		(PMIC_RG_INT_MASK_ACCDET_EINT1_MASK),
		(PMIC_RG_INT_MASK_ACCDET_EINT1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_audio(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_AUDIO_MASK),
		(PMIC_RG_INT_RAW_STATUS_AUDIO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_accdet(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_ACCDET_MASK),
		(PMIC_RG_INT_RAW_STATUS_ACCDET_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_accdet_eint0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_ACCDET_EINT0_MASK),
		(PMIC_RG_INT_RAW_STATUS_ACCDET_EINT0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_int_raw_status_accdet_eint1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_INT_RAW_STATUS0),
		(&val),
		(PMIC_RG_INT_RAW_STATUS_ACCDET_EINT1_MASK),
		(PMIC_RG_INT_RAW_STATUS_ACCDET_EINT1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_top_int_polarity(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_INT_MISC_CON0),
		(val),
		(PMIC_RG_AUD_TOP_INT_POLARITY_MASK),
		(PMIC_RG_AUD_TOP_INT_POLARITY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_top_mon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_MON_CON0),
		(val),
		(PMIC_RG_AUD_TOP_MON_SEL_MASK),
		(PMIC_RG_AUD_TOP_MON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_clk_int_mon_flag_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_MON_CON0),
		(val),
		(PMIC_RG_AUD_CLK_INT_MON_FLAG_SEL_MASK),
		(PMIC_RG_AUD_CLK_INT_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_clk_int_mon_flag_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUD_TOP_MON_CON0),
		(val),
		(PMIC_RG_AUD_CLK_INT_MON_FLAG_EN_MASK),
		(PMIC_RG_AUD_CLK_INT_MON_FLAG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_clk_int_mon_flag_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUD_TOP_MON_CON0),
		(&val),
		(PMIC_RG_AUD_CLK_INT_MON_FLAG_EN_MASK),
		(PMIC_RG_AUD_CLK_INT_MON_FLAG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_DSN_ID),
		(&val),
		(PMIC_AUDIO_DIG_ANA_ID_MASK),
		(PMIC_AUDIO_DIG_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_DSN_ID),
		(&val),
		(PMIC_AUDIO_DIG_DIG_ID_MASK),
		(PMIC_AUDIO_DIG_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_ANA_MINOR_REV_MASK),
		(PMIC_AUDIO_DIG_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_ANA_MAJOR_REV_MASK),
		(PMIC_AUDIO_DIG_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_DIG_MINOR_REV_MASK),
		(PMIC_AUDIO_DIG_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_DIG_MAJOR_REV_MASK),
		(PMIC_AUDIO_DIG_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_afe_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_DL_CON0),
		(val),
		(PMIC_AFE_ON_MASK),
		(PMIC_AFE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_afe_dl_lr_swap(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_DL_CON0),
		(val),
		(PMIC_AFE_DL_LR_SWAP_MASK),
		(PMIC_AFE_DL_LR_SWAP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_afe_ul_lr_swap(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_DL_CON0),
		(val),
		(PMIC_AFE_UL_LR_SWAP_MASK),
		(PMIC_AFE_UL_LR_SWAP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dl_2_src_on_tmp_ctl_pre(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_SRC2_CON0_L),
		(val),
		(PMIC_DL_2_SRC_ON_TMP_CTL_PRE_MASK),
		(PMIC_DL_2_SRC_ON_TMP_CTL_PRE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_two_digital_mic_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_H),
		(val),
		(PMIC_C_TWO_DIGITAL_MIC_CTL_MASK),
		(PMIC_C_TWO_DIGITAL_MIC_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_digmic_phase_sel_ch2_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_H),
		(val),
		(PMIC_C_DIGMIC_PHASE_SEL_CH2_CTL_MASK),
		(PMIC_C_DIGMIC_PHASE_SEL_CH2_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_digmic_phase_sel_ch1_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_H),
		(val),
		(PMIC_C_DIGMIC_PHASE_SEL_CH1_CTL_MASK),
		(PMIC_C_DIGMIC_PHASE_SEL_CH1_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_src_on_tmp_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_L),
		(val),
		(PMIC_UL_SRC_ON_TMP_CTL_MASK),
		(PMIC_UL_SRC_ON_TMP_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_sdm_3_level_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_L),
		(val),
		(PMIC_UL_SDM_3_LEVEL_CTL_MASK),
		(PMIC_UL_SDM_3_LEVEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_loop_back_mode_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_L),
		(val),
		(PMIC_UL_LOOP_BACK_MODE_CTL_MASK),
		(PMIC_UL_LOOP_BACK_MODE_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_digmic_3p25m_1p625m_sel_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_L),
		(val),
		(PMIC_DIGMIC_3P25M_1P625M_SEL_CTL_MASK),
		(PMIC_DIGMIC_3P25M_1P625M_SEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_digmic_4p33m_sel_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_L),
		(val),
		(PMIC_DIGMIC_4P33M_SEL_CTL_MASK),
		(PMIC_DIGMIC_4P33M_SEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_low_power_mode_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_UL_SRC_CON0_L),
		(val),
		(PMIC_DMIC_LOW_POWER_MODE_CTL_MASK),
		(PMIC_DMIC_LOW_POWER_MODE_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_c_two_digital_mic_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_L_SRC_CON0_H),
		(val),
		(PMIC_ADDA6_C_TWO_DIGITAL_MIC_CTL_MASK),
		(PMIC_ADDA6_C_TWO_DIGITAL_MIC_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_c_digmic_phase_sel_ch2_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_L_SRC_CON0_H),
		(val),
		(PMIC_ADDA6_C_DIGMIC_PHASE_SEL_CH2_CTL_MASK),
		(PMIC_ADDA6_C_DIGMIC_PHASE_SEL_CH2_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_c_digmic_phase_sel_ch1_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_L_SRC_CON0_H),
		(val),
		(PMIC_ADDA6_C_DIGMIC_PHASE_SEL_CH1_CTL_MASK),
		(PMIC_ADDA6_C_DIGMIC_PHASE_SEL_CH1_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_ul_src_on_tmp_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_UL_SRC_CON0_L),
		(val),
		(PMIC_ADDA6_UL_SRC_ON_TMP_CTL_MASK),
		(PMIC_ADDA6_UL_SRC_ON_TMP_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_ul_sdm_3_level_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_UL_SRC_CON0_L),
		(val),
		(PMIC_ADDA6_UL_SDM_3_LEVEL_CTL_MASK),
		(PMIC_ADDA6_UL_SDM_3_LEVEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_ul_loop_back_mode_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_UL_SRC_CON0_L),
		(val),
		(PMIC_ADDA6_UL_LOOP_BACK_MODE_CTL_MASK),
		(PMIC_ADDA6_UL_LOOP_BACK_MODE_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_digmic_3p25m_1p625m_sel_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_UL_SRC_CON0_L),
		(val),
		(PMIC_ADDA6_DIGMIC_3P25M_1P625M_SEL_CTL_MASK),
		(PMIC_ADDA6_DIGMIC_3P25M_1P625M_SEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_digmic_4p33m_sel_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_UL_SRC_CON0_L),
		(val),
		(PMIC_ADDA6_DIGMIC_4P33M_SEL_CTL_MASK),
		(PMIC_ADDA6_DIGMIC_4P33M_SEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_dmic_low_power_mode_ctl(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA6_UL_SRC_CON0_L),
		(val),
		(PMIC_ADDA6_DMIC_LOW_POWER_MODE_CTL_MASK),
		(PMIC_ADDA6_DMIC_LOW_POWER_MODE_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dl_sine_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_TOP_CON0),
		(val),
		(PMIC_DL_SINE_ON_MASK),
		(PMIC_DL_SINE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_sine_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_TOP_CON0),
		(val),
		(PMIC_UL_SINE_ON_MASK),
		(PMIC_UL_SINE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_mtkaif_sine_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_TOP_CON0),
		(val),
		(PMIC_MTKAIF_SINE_ON_MASK),
		(PMIC_MTKAIF_SINE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_ul_sine_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_TOP_CON0),
		(val),
		(PMIC_ADDA6_UL_SINE_ON_MASK),
		(PMIC_ADDA6_UL_SINE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_adda6_mtkaif_sine_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_TOP_CON0),
		(val),
		(PMIC_ADDA6_MTKAIF_SINE_ON_MASK),
		(PMIC_ADDA6_MTKAIF_SINE_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_reserved(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_RESERVED_MASK),
		(PMIC_PDN_RESERVED_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_afe_testmodel_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_AFE_TESTMODEL_CTL_MASK),
		(PMIC_PDN_AFE_TESTMODEL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pwr_clk_dis_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PWR_CLK_DIS_CTL_MASK),
		(PMIC_PWR_CLK_DIS_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_i2s_dl_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_I2S_DL_CTL_MASK),
		(PMIC_PDN_I2S_DL_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_adda6_adc_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_ADDA6_ADC_CTL_MASK),
		(PMIC_PDN_ADDA6_ADC_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_adc_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_ADC_CTL_MASK),
		(PMIC_PDN_ADC_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_dac_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_DAC_CTL_MASK),
		(PMIC_PDN_DAC_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_afe_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_TOP_CON0),
		(val),
		(PMIC_PDN_AFE_CTL_MASK),
		(PMIC_PDN_AFE_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_afe_mon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MON_DEBUG0),
		(val),
		(PMIC_AFE_MON_SEL_MASK),
		(PMIC_AFE_MON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audio_sys_top_mon_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MON_DEBUG0),
		(val),
		(PMIC_AUDIO_SYS_TOP_MON_SEL_MASK),
		(PMIC_AUDIO_SYS_TOP_MON_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audio_sys_top_mon_swap(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MON_DEBUG0),
		(val),
		(PMIC_AUDIO_SYS_TOP_MON_SWAP_MASK),
		(PMIC_AUDIO_SYS_TOP_MON_SWAP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_scrambler_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_SCRAMBLER_EN_MASK),
		(PMIC_CCI_SCRAMBLER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_sdm_7bit_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUD_SDM_7BIT_SEL_MASK),
		(PMIC_CCI_AUD_SDM_7BIT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_sdm_muter(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUD_SDM_MUTER_MASK),
		(PMIC_CCI_AUD_SDM_MUTER_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_sdm_mutel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUD_SDM_MUTEL_MASK),
		(PMIC_CCI_AUD_SDM_MUTEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_split_test_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUD_SPLIT_TEST_EN_MASK),
		(PMIC_CCI_AUD_SPLIT_TEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_zero_pad_disable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_ZERO_PAD_DISABLE_MASK),
		(PMIC_CCI_ZERO_PAD_DISABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_idac_test_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUD_IDAC_TEST_EN_MASK),
		(PMIC_CCI_AUD_IDAC_TEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_splt_scrmb_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_SPLT_SCRMB_ON_MASK),
		(PMIC_CCI_SPLT_SCRMB_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_splt_scrmb_clk_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_SPLT_SCRMB_CLK_ON_MASK),
		(PMIC_CCI_SPLT_SCRMB_CLK_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_rand_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_RAND_EN_MASK),
		(PMIC_CCI_RAND_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_lch_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_LCH_INV_MASK),
		(PMIC_CCI_LCH_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_scrambler_cg_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_SCRAMBLER_CG_EN_MASK),
		(PMIC_CCI_SCRAMBLER_CG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_audio_fifo_wptr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUDIO_FIFO_WPTR_MASK),
		(PMIC_CCI_AUDIO_FIFO_WPTR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_anack_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON0),
		(val),
		(PMIC_CCI_AUD_ANACK_SEL_MASK),
		(PMIC_CCI_AUD_ANACK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_aud_sdm_test_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON1),
		(val),
		(PMIC_AUD_SDM_TEST_R_MASK),
		(PMIC_AUD_SDM_TEST_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_aud_sdm_test_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON1),
		(val),
		(PMIC_AUD_SDM_TEST_L_MASK),
		(PMIC_AUD_SDM_TEST_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_acd_func_rstb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_ACD_FUNC_RSTB_MASK),
		(PMIC_CCI_ACD_FUNC_RSTB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_afifo_clk_pwdb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_AFIFO_CLK_PWDB_MASK),
		(PMIC_CCI_AFIFO_CLK_PWDB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_acd_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_ACD_MODE_MASK),
		(PMIC_CCI_ACD_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_audio_fifo_enable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_AUDIO_FIFO_ENABLE_MASK),
		(PMIC_CCI_AUDIO_FIFO_ENABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_audio_fifo_clkin_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_AUDIO_FIFO_CLKIN_INV_MASK),
		(PMIC_CCI_AUDIO_FIFO_CLKIN_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_dac_ana_rstb_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_AUD_DAC_ANA_RSTB_SEL_MASK),
		(PMIC_CCI_AUD_DAC_ANA_RSTB_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_dac_ana_mute(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON2),
		(val),
		(PMIC_CCI_AUD_DAC_ANA_MUTE_MASK),
		(PMIC_CCI_AUD_DAC_ANA_MUTE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_digmic_testck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON3),
		(val),
		(PMIC_DIGMIC_TESTCK_SEL_MASK),
		(PMIC_DIGMIC_TESTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_digmic_testck_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON3),
		(val),
		(PMIC_DIGMIC_TESTCK_SRC_SEL_MASK),
		(PMIC_DIGMIC_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sdm_testck_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON3),
		(val),
		(PMIC_SDM_TESTCK_SRC_SEL_MASK),
		(PMIC_SDM_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sdm_ana13m_testck_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON3),
		(val),
		(PMIC_SDM_ANA13M_TESTCK_SRC_SEL_MASK),
		(PMIC_SDM_ANA13M_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sdm_ana13m_testck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON3),
		(val),
		(PMIC_SDM_ANA13M_TESTCK_SEL_MASK),
		(PMIC_SDM_ANA13M_TESTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_fifo_wclk_6p5m_testck_src_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON4),
		(val),
		(PMIC_UL_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_MASK),
		(PMIC_UL_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_fifo_wclk_6p5m_testck_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON4),
		(val),
		(PMIC_UL_FIFO_WCLK_6P5M_TESTCK_SEL_MASK),
		(PMIC_UL_FIFO_WCLK_6P5M_TESTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_fifo_wdata_testsrc_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON4),
		(val),
		(PMIC_UL_FIFO_WDATA_TESTSRC_SEL_MASK),
		(PMIC_UL_FIFO_WDATA_TESTSRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_fifo_wdata_testen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON4),
		(val),
		(PMIC_UL_FIFO_WDATA_TESTEN_MASK),
		(PMIC_UL_FIFO_WDATA_TESTEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_fifo_digmic_wdata_testsrc_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON4),
		(val),
		(PMIC_UL_FIFO_DIGMIC_WDATA_TESTSRC_SEL_MASK),
		(PMIC_UL_FIFO_DIGMIC_WDATA_TESTSRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul_fifo_wclk_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON4),
		(val),
		(PMIC_UL_FIFO_WCLK_INV_MASK),
		(PMIC_UL_FIFO_WCLK_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_neg_large_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON5),
		(val),
		(PMIC_R_AUD_DAC_NEG_LARGE_MONO_MASK),
		(PMIC_R_AUD_DAC_NEG_LARGE_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_pos_large_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON5),
		(val),
		(PMIC_R_AUD_DAC_POS_LARGE_MONO_MASK),
		(PMIC_R_AUD_DAC_POS_LARGE_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_sw_rstb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_SW_RSTB_MASK),
		(PMIC_R_AUD_DAC_SW_RSTB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_3th_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_3TH_SEL_MASK),
		(PMIC_R_AUD_DAC_3TH_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_mono_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_MONO_SEL_MASK),
		(PMIC_R_AUD_DAC_MONO_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_neg_tiny_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_NEG_TINY_MONO_MASK),
		(PMIC_R_AUD_DAC_NEG_TINY_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_pos_tiny_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_POS_TINY_MONO_MASK),
		(PMIC_R_AUD_DAC_POS_TINY_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_neg_small_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_NEG_SMALL_MONO_MASK),
		(PMIC_R_AUD_DAC_NEG_SMALL_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_dac_pos_small_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON6),
		(val),
		(PMIC_R_AUD_DAC_POS_SMALL_MONO_MASK),
		(PMIC_R_AUD_DAC_POS_SMALL_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_fifo_wclk_6p5m_testck_src_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_MASK),
		(PMIC_UL2_FIFO_WCLK_6P5M_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_fifo_wclk_6p5m_testck_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_FIFO_WCLK_6P5M_TESTCK_SEL_MASK),
		(PMIC_UL2_FIFO_WCLK_6P5M_TESTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_fifo_wdata_testsrc_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_FIFO_WDATA_TESTSRC_SEL_MASK),
		(PMIC_UL2_FIFO_WDATA_TESTSRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_fifo_wdata_testen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_FIFO_WDATA_TESTEN_MASK),
		(PMIC_UL2_FIFO_WDATA_TESTEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_fifo_digmic_wdata_testsrc_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_FIFO_DIGMIC_WDATA_TESTSRC_SEL_MASK),
		(PMIC_UL2_FIFO_DIGMIC_WDATA_TESTSRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_fifo_wclk_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_FIFO_WCLK_INV_MASK),
		(PMIC_UL2_FIFO_WCLK_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_digmic_testck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_DIGMIC_TESTCK_SEL_MASK),
		(PMIC_UL2_DIGMIC_TESTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ul2_digmic_testck_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON7),
		(val),
		(PMIC_UL2_DIGMIC_TESTCK_SRC_SEL_MASK),
		(PMIC_UL2_DIGMIC_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter1_dither_gain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON8),
		(val),
		(PMIC_SPLITTER1_DITHER_GAIN_MASK),
		(PMIC_SPLITTER1_DITHER_GAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter2_dither_gain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON8),
		(val),
		(PMIC_SPLITTER2_DITHER_GAIN_MASK),
		(PMIC_SPLITTER2_DITHER_GAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter1_dither_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON8),
		(val),
		(PMIC_SPLITTER1_DITHER_EN_MASK),
		(PMIC_SPLITTER1_DITHER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter2_dither_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON8),
		(val),
		(PMIC_SPLITTER2_DITHER_EN_MASK),
		(PMIC_SPLITTER2_DITHER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_scrambler_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_SCRAMBLER_EN_2ND_MASK),
		(PMIC_CCI_SCRAMBLER_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_sdm_7bit_sel_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUD_SDM_7BIT_SEL_2ND_MASK),
		(PMIC_CCI_AUD_SDM_7BIT_SEL_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_sdm_muter_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUD_SDM_MUTER_2ND_MASK),
		(PMIC_CCI_AUD_SDM_MUTER_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_sdm_mutel_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUD_SDM_MUTEL_2ND_MASK),
		(PMIC_CCI_AUD_SDM_MUTEL_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_split_test_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUD_SPLIT_TEST_EN_2ND_MASK),
		(PMIC_CCI_AUD_SPLIT_TEST_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_zero_pad_disable_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_ZERO_PAD_DISABLE_2ND_MASK),
		(PMIC_CCI_ZERO_PAD_DISABLE_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_idac_test_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUD_IDAC_TEST_EN_2ND_MASK),
		(PMIC_CCI_AUD_IDAC_TEST_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_splt_scrmb_on_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_SPLT_SCRMB_ON_2ND_MASK),
		(PMIC_CCI_SPLT_SCRMB_ON_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_splt_scrmb_clk_on_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_SPLT_SCRMB_CLK_ON_2ND_MASK),
		(PMIC_CCI_SPLT_SCRMB_CLK_ON_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_rand_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_RAND_EN_2ND_MASK),
		(PMIC_CCI_RAND_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_lch_inv_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_LCH_INV_2ND_MASK),
		(PMIC_CCI_LCH_INV_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_scrambler_cg_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_SCRAMBLER_CG_EN_2ND_MASK),
		(PMIC_CCI_SCRAMBLER_CG_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_audio_fifo_wptr_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUDIO_FIFO_WPTR_2ND_MASK),
		(PMIC_CCI_AUDIO_FIFO_WPTR_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_anack_sel_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON9),
		(val),
		(PMIC_CCI_AUD_ANACK_SEL_2ND_MASK),
		(PMIC_CCI_AUD_ANACK_SEL_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_aud_sdm_test_r_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON10),
		(val),
		(PMIC_AUD_SDM_TEST_R_2ND_MASK),
		(PMIC_AUD_SDM_TEST_R_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_aud_sdm_test_l_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON10),
		(val),
		(PMIC_AUD_SDM_TEST_L_2ND_MASK),
		(PMIC_AUD_SDM_TEST_L_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_acd_func_rstb_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_ACD_FUNC_RSTB_2ND_MASK),
		(PMIC_CCI_ACD_FUNC_RSTB_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_afifo_clk_pwdb_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_AFIFO_CLK_PWDB_2ND_MASK),
		(PMIC_CCI_AFIFO_CLK_PWDB_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_acd_mode_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_ACD_MODE_2ND_MASK),
		(PMIC_CCI_ACD_MODE_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_audio_fifo_enable_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_AUDIO_FIFO_ENABLE_2ND_MASK),
		(PMIC_CCI_AUDIO_FIFO_ENABLE_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_audio_fifo_clkin_inv_2nd(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_AUDIO_FIFO_CLKIN_INV_2ND_MASK),
		(PMIC_CCI_AUDIO_FIFO_CLKIN_INV_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_dac_ana_rstb_sel_2nd(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_AUD_DAC_ANA_RSTB_SEL_2ND_MASK),
		(PMIC_CCI_AUD_DAC_ANA_RSTB_SEL_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_cci_aud_dac_ana_mute_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON11),
		(val),
		(PMIC_CCI_AUD_DAC_ANA_MUTE_2ND_MASK),
		(PMIC_CCI_AUD_DAC_ANA_MUTE_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter1_dither_gain_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON12),
		(val),
		(PMIC_SPLITTER1_DITHER_GAIN_2ND_MASK),
		(PMIC_SPLITTER1_DITHER_GAIN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter2_dither_gain_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON12),
		(val),
		(PMIC_SPLITTER2_DITHER_GAIN_2ND_MASK),
		(PMIC_SPLITTER2_DITHER_GAIN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter1_dither_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON12),
		(val),
		(PMIC_SPLITTER1_DITHER_EN_2ND_MASK),
		(PMIC_SPLITTER1_DITHER_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_splitter2_dither_en_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFUNC_AUD_CON12),
		(val),
		(PMIC_SPLITTER2_DITHER_EN_2ND_MASK),
		(PMIC_SPLITTER2_DITHER_EN_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_aud_scr_out_r(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFUNC_AUD_MON0),
		(&val),
		(PMIC_AUD_SCR_OUT_R_MASK),
		(PMIC_AUD_SCR_OUT_R_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_scr_out_l(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFUNC_AUD_MON0),
		(&val),
		(PMIC_AUD_SCR_OUT_L_MASK),
		(PMIC_AUD_SCR_OUT_L_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_scr_out_r_2nd(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFUNC_AUD_MON1),
		(&val),
		(PMIC_AUD_SCR_OUT_R_2ND_MASK),
		(PMIC_AUD_SCR_OUT_R_2ND_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_aud_scr_out_l_2nd(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFUNC_AUD_MON1),
		(&val),
		(PMIC_AUD_SCR_OUT_L_2ND_MASK),
		(PMIC_AUD_SCR_OUT_L_2ND_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_fifo_inten(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_FIFO_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_FIFO_INTEN_MASK),
		(PMIC_RG_MTKAIF_RXIF_FIFO_INTEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_afe_reserved(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_FIFO_CFG0),
		(val),
		(PMIC_AFE_RESERVED_MASK),
		(PMIC_AFE_RESERVED_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_rd_empty_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_FIFO_LOG_MON1),
		(&val),
		(PMIC_MTKAIF_RXIF_RD_EMPTY_STATUS_MASK),
		(PMIC_MTKAIF_RXIF_RD_EMPTY_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_wr_full_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_FIFO_LOG_MON1),
		(&val),
		(PMIC_MTKAIF_RXIF_WR_FULL_STATUS_MASK),
		(PMIC_MTKAIF_RXIF_WR_FULL_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_fifo_status(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON0),
		(&val),
		(PMIC_MTKAIF_RXIF_FIFO_STATUS_MASK),
		(PMIC_MTKAIF_RXIF_FIFO_STATUS_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaiftx_v3_sdata_out1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON0),
		(&val),
		(PMIC_MTKAIFTX_V3_SDATA_OUT1_MASK),
		(PMIC_MTKAIFTX_V3_SDATA_OUT1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaiftx_v3_sdata_out2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON0),
		(&val),
		(PMIC_MTKAIFTX_V3_SDATA_OUT2_MASK),
		(PMIC_MTKAIFTX_V3_SDATA_OUT2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaiftx_v3_sdata_out3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON0),
		(&val),
		(PMIC_MTKAIFTX_V3_SDATA_OUT3_MASK),
		(PMIC_MTKAIFTX_V3_SDATA_OUT3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaiftx_v3_sync_out(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON0),
		(&val),
		(PMIC_MTKAIFTX_V3_SYNC_OUT_MASK),
		(PMIC_MTKAIFTX_V3_SYNC_OUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_invalid_cycle(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIF_RXIF_INVALID_CYCLE_MASK),
		(PMIC_MTKAIF_RXIF_INVALID_CYCLE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_invalid_flag(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIF_RXIF_INVALID_FLAG_MASK),
		(PMIC_MTKAIF_RXIF_INVALID_FLAG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_search_fail_flag(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIF_RXIF_SEARCH_FAIL_FLAG_MASK),
		(PMIC_MTKAIF_RXIF_SEARCH_FAIL_FLAG_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaifrx_v3_sdata_in1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIFRX_V3_SDATA_IN1_MASK),
		(PMIC_MTKAIFRX_V3_SDATA_IN1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaifrx_v3_sdata_in2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIFRX_V3_SDATA_IN2_MASK),
		(PMIC_MTKAIFRX_V3_SDATA_IN2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaifrx_v3_sdata_in3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIFRX_V3_SDATA_IN3_MASK),
		(PMIC_MTKAIFRX_V3_SDATA_IN3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaifrx_v3_sync_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON1),
		(&val),
		(PMIC_MTKAIFRX_V3_SYNC_IN_MASK),
		(PMIC_MTKAIFRX_V3_SYNC_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_txif_in_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON2),
		(&val),
		(PMIC_MTKAIF_TXIF_IN_CH1_MASK),
		(PMIC_MTKAIF_TXIF_IN_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_txif_in_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON2),
		(&val),
		(PMIC_MTKAIF_TXIF_IN_CH2_MASK),
		(PMIC_MTKAIF_TXIF_IN_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_adda6_mtkaif_txif_in_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA6_MTKAIF_MON3),
		(&val),
		(PMIC_ADDA6_MTKAIF_TXIF_IN_CH1_MASK),
		(PMIC_ADDA6_MTKAIF_TXIF_IN_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_adda6_mtkaif_txif_in_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA6_MTKAIF_MON3),
		(&val),
		(PMIC_ADDA6_MTKAIF_TXIF_IN_CH2_MASK),
		(PMIC_ADDA6_MTKAIF_TXIF_IN_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_out_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON4),
		(&val),
		(PMIC_MTKAIF_RXIF_OUT_CH1_MASK),
		(PMIC_MTKAIF_RXIF_OUT_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_out_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON4),
		(&val),
		(PMIC_MTKAIF_RXIF_OUT_CH2_MASK),
		(PMIC_MTKAIF_RXIF_OUT_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_mtkaif_rxif_out_ch3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_MON5),
		(&val),
		(PMIC_MTKAIF_RXIF_OUT_CH3_MASK),
		(PMIC_MTKAIF_RXIF_OUT_CH3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtkaif_loopback_test1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_LOOPBACK_TEST1_MASK),
		(PMIC_RG_MTKAIF_LOOPBACK_TEST1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_loopback_test2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_LOOPBACK_TEST2_MASK),
		(PMIC_RG_MTKAIF_LOOPBACK_TEST2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_pmic_txif_8to5(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_PMIC_TXIF_8TO5_MASK),
		(PMIC_RG_MTKAIF_PMIC_TXIF_8TO5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda6_mtkaif_pmic_txif_8to5(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_ADDA6_MTKAIF_PMIC_TXIF_8TO5_MASK),
		(PMIC_RG_ADDA6_MTKAIF_PMIC_TXIF_8TO5_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_txif_protocol2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_TXIF_PROTOCOL2_MASK),
		(PMIC_RG_MTKAIF_TXIF_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_bypass_src_test(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_BYPASS_SRC_TEST_MASK),
		(PMIC_RG_MTKAIF_BYPASS_SRC_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_bypass_src_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_BYPASS_SRC_MODE_MASK),
		(PMIC_RG_MTKAIF_BYPASS_SRC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mtkaif_bypass_src_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(&val),
		(PMIC_RG_MTKAIF_BYPASS_SRC_MODE_MASK),
		(PMIC_RG_MTKAIF_BYPASS_SRC_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_protocol2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_PROTOCOL2_MASK),
		(PMIC_RG_MTKAIF_RXIF_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda6_mtkaif_txif_protocol2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_ADDA6_MTKAIF_TXIF_PROTOCOL2_MASK),
		(PMIC_RG_ADDA6_MTKAIF_TXIF_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_clkinv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_CLKINV_MASK),
		(PMIC_RG_MTKAIF_RXIF_CLKINV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_data_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_DATA_MODE_MASK),
		(PMIC_RG_MTKAIF_RXIF_DATA_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mtkaif_rxif_data_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(&val),
		(PMIC_RG_MTKAIF_RXIF_DATA_MODE_MASK),
		(PMIC_RG_MTKAIF_RXIF_DATA_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_detect_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_DETECT_ON_MASK),
		(PMIC_RG_MTKAIF_RXIF_DETECT_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_fifo_rsp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_FIFO_RSP_MASK),
		(PMIC_RG_MTKAIF_RXIF_FIFO_RSP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_data_bit(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_DATA_BIT_MASK),
		(PMIC_RG_MTKAIF_RXIF_DATA_BIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_voice_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_MASK),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mtkaif_rxif_voice_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG0),
		(&val),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_MASK),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_voice_mode_protocol2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG1),
		(val),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_MASK),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mtkaif_rxif_voice_mode_protocol2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG1),
		(&val),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_MASK),
		(PMIC_RG_MTKAIF_RXIF_VOICE_MODE_PROTOCOL2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_sync_check_round(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG1),
		(val),
		(PMIC_RG_MTKAIF_RXIF_SYNC_CHECK_ROUND_MASK),
		(PMIC_RG_MTKAIF_RXIF_SYNC_CHECK_ROUND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_invalid_sync_check_round(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG1),
		(val),
		(PMIC_RG_MTKAIF_RXIF_INVALID_SYNC_CHECK_ROUND_MASK),
		(PMIC_RG_MTKAIF_RXIF_INVALID_SYNC_CHECK_ROUND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_sync_search_table(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG1),
		(val),
		(PMIC_RG_MTKAIF_RXIF_SYNC_SEARCH_TABLE_MASK),
		(PMIC_RG_MTKAIF_RXIF_SYNC_SEARCH_TABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_sync_cnt_table(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG2),
		(val),
		(PMIC_RG_MTKAIF_RXIF_SYNC_CNT_TABLE_MASK),
		(PMIC_RG_MTKAIF_RXIF_SYNC_CNT_TABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_clear_sync_fail(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG2),
		(val),
		(PMIC_RG_MTKAIF_RXIF_CLEAR_SYNC_FAIL_MASK),
		(PMIC_RG_MTKAIF_RXIF_CLEAR_SYNC_FAIL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_sync_word1_disable(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG2),
		(val),
		(PMIC_RG_MTKAIF_RXIF_SYNC_WORD1_DISABLE_MASK),
		(PMIC_RG_MTKAIF_RXIF_SYNC_WORD1_DISABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_sync_word2_disable(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG2),
		(val),
		(PMIC_RG_MTKAIF_RXIF_SYNC_WORD2_DISABLE_MASK),
		(PMIC_RG_MTKAIF_RXIF_SYNC_WORD2_DISABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_p2_input_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG2),
		(val),
		(PMIC_RG_MTKAIF_RXIF_P2_INPUT_SEL_MASK),
		(PMIC_RG_MTKAIF_RXIF_P2_INPUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_detect_on_protocol2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG3),
		(val),
		(PMIC_RG_MTKAIF_RXIF_DETECT_ON_PROTOCOL2_MASK),
		(PMIC_RG_MTKAIF_RXIF_DETECT_ON_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_fifo_rsp_protocol2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG3),
		(val),
		(PMIC_RG_MTKAIF_RXIF_FIFO_RSP_PROTOCOL2_MASK),
		(PMIC_RG_MTKAIF_RXIF_FIFO_RSP_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rxif_loopback_use_nle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_RX_CFG3),
		(val),
		(PMIC_RG_MTKAIF_RXIF_LOOPBACK_USE_NLE_MASK),
		(PMIC_RG_MTKAIF_RXIF_LOOPBACK_USE_NLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rx_sync_word1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_SYNCWORD_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RX_SYNC_WORD1_MASK),
		(PMIC_RG_MTKAIF_RX_SYNC_WORD1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_rx_sync_word2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_SYNCWORD_CFG0),
		(val),
		(PMIC_RG_MTKAIF_RX_SYNC_WORD2_MASK),
		(PMIC_RG_MTKAIF_RX_SYNC_WORD2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda_mtkaif_tx_sync_word1(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_SYNCWORD_CFG1),
		(val),
		(PMIC_RG_ADDA_MTKAIF_TX_SYNC_WORD1_MASK),
		(PMIC_RG_ADDA_MTKAIF_TX_SYNC_WORD1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda_mtkaif_tx_sync_word2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_SYNCWORD_CFG1),
		(val),
		(PMIC_RG_ADDA_MTKAIF_TX_SYNC_WORD2_MASK),
		(PMIC_RG_ADDA_MTKAIF_TX_SYNC_WORD2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda6_mtkaif_tx_sync_word1(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_SYNCWORD_CFG1),
		(val),
		(PMIC_RG_ADDA6_MTKAIF_TX_SYNC_WORD1_MASK),
		(PMIC_RG_ADDA6_MTKAIF_TX_SYNC_WORD1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda6_mtkaif_tx_sync_word2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADDA_MTKAIF_SYNCWORD_CFG1),
		(val),
		(PMIC_RG_ADDA6_MTKAIF_TX_SYNC_WORD2_MASK),
		(PMIC_RG_ADDA6_MTKAIF_TX_SYNC_WORD2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_sdm_mute_r_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_R_AUD_SDM_MUTE_R_2ND_MASK),
		(PMIC_R_AUD_SDM_MUTE_R_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_sdm_mute_l_2nd(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_R_AUD_SDM_MUTE_L_2ND_MASK),
		(PMIC_R_AUD_SDM_MUTE_L_2ND_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_sdm_mute_r(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_R_AUD_SDM_MUTE_R_MASK),
		(PMIC_R_AUD_SDM_MUTE_R_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_r_aud_sdm_mute_l(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_R_AUD_SDM_MUTE_L_MASK),
		(PMIC_R_AUD_SDM_MUTE_L_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_mute_sw_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_C_MUTE_SW_CTL_MASK),
		(PMIC_C_MUTE_SW_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_dac_en_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_C_DAC_EN_CTL_MASK),
		(PMIC_C_DAC_EN_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_amp_div_ch1_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG0),
		(val),
		(PMIC_C_AMP_DIV_CH1_CTL_MASK),
		(PMIC_C_AMP_DIV_CH1_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_freq_div_ch1_ctl(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG1),
		(val),
		(PMIC_C_FREQ_DIV_CH1_CTL_MASK),
		(PMIC_C_FREQ_DIV_CH1_CTL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_sgen_rch_inv_8bit(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG1),
		(val),
		(PMIC_C_SGEN_RCH_INV_8BIT_MASK),
		(PMIC_C_SGEN_RCH_INV_8BIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_c_sgen_rch_inv_5bit(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_SGEN_CFG1),
		(val),
		(PMIC_C_SGEN_RCH_INV_5BIT_MASK),
		(PMIC_C_SGEN_RCH_INV_5BIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_amic_ul_adc_clk_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG),
		(val),
		(PMIC_RG_AMIC_UL_ADC_CLK_SEL_MASK),
		(PMIC_RG_AMIC_UL_ADC_CLK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ul_async_fifo_soft_rst(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG),
		(val),
		(PMIC_RG_UL_ASYNC_FIFO_SOFT_RST_MASK),
		(PMIC_RG_UL_ASYNC_FIFO_SOFT_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ul_async_fifo_soft_rst_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG),
		(val),
		(PMIC_RG_UL_ASYNC_FIFO_SOFT_RST_EN_MASK),
		(PMIC_RG_UL_ASYNC_FIFO_SOFT_RST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ul_async_fifo_soft_rst_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG),
		(&val),
		(PMIC_RG_UL_ASYNC_FIFO_SOFT_RST_EN_MASK),
		(PMIC_RG_UL_ASYNC_FIFO_SOFT_RST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ul2_async_fifo_soft_rst(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG1),
		(val),
		(PMIC_RG_UL2_ASYNC_FIFO_SOFT_RST_MASK),
		(PMIC_RG_UL2_ASYNC_FIFO_SOFT_RST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ul2_async_fifo_soft_rst_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG1),
		(val),
		(PMIC_RG_UL2_ASYNC_FIFO_SOFT_RST_EN_MASK),
		(PMIC_RG_UL2_ASYNC_FIFO_SOFT_RST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ul2_async_fifo_soft_rst_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_ADC_ASYNC_FIFO_CFG1),
		(&val),
		(PMIC_RG_UL2_ASYNC_FIFO_SOFT_RST_EN_MASK),
		(PMIC_RG_UL2_ASYNC_FIFO_SOFT_RST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_dcclk_gen_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG0),
		(val),
		(PMIC_DCCLK_GEN_ON_MASK),
		(PMIC_DCCLK_GEN_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dcclk_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG0),
		(val),
		(PMIC_DCCLK_PDN_MASK),
		(PMIC_DCCLK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dcclk_ref_ck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG0),
		(val),
		(PMIC_DCCLK_REF_CK_SEL_MASK),
		(PMIC_DCCLK_REF_CK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dcclk_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG0),
		(val),
		(PMIC_DCCLK_INV_MASK),
		(PMIC_DCCLK_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dcclk_div(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG0),
		(val),
		(PMIC_DCCLK_DIV_MASK),
		(PMIC_DCCLK_DIV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dcclk_phase_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG1),
		(val),
		(PMIC_DCCLK_PHASE_SEL_MASK),
		(PMIC_DCCLK_PHASE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dcclk_resync_bypass(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG1),
		(val),
		(PMIC_DCCLK_RESYNC_BYPASS_MASK),
		(PMIC_DCCLK_RESYNC_BYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_resync_src_ck_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG1),
		(val),
		(PMIC_RESYNC_SRC_CK_INV_MASK),
		(PMIC_RESYNC_SRC_CK_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_resync_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DCCLK_CFG1),
		(val),
		(PMIC_RESYNC_SRC_SEL_MASK),
		(PMIC_RESYNC_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_phase_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_DIG_CFG),
		(val),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE_MASK),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_pad_top_phase_mode(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_CFG),
		(&val),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE_MASK),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_dat_miso_loopback(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_DIG_CFG),
		(val),
		(PMIC_RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_MASK),
		(PMIC_RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_phase_mode2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_DIG_CFG),
		(val),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE2_MASK),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_pad_top_phase_mode2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_CFG),
		(&val),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE2_MASK),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_dat_miso2_loopback(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_DIG_CFG),
		(val),
		(PMIC_RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_MASK),
		(PMIC_RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_phase_mode3(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_DIG_CFG1),
		(val),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE3_MASK),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_aud_pad_top_phase_mode3(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_CFG1),
		(&val),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE3_MASK),
		(PMIC_RG_AUD_PAD_TOP_PHASE_MODE3_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_dat_miso3_loopback(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDIO_DIG_CFG1),
		(val),
		(PMIC_RG_AUD_PAD_TOP_DAT_MISO3_LOOPBACK_MASK),
		(PMIC_RG_AUD_PAD_TOP_DAT_MISO3_LOOPBACK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_tx_fifo_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_AUD_PAD_TOP),
		(val),
		(PMIC_RG_AUD_PAD_TOP_TX_FIFO_ON_MASK),
		(PMIC_RG_AUD_PAD_TOP_TX_FIFO_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_mtkaif_clk_protocol2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_AUD_PAD_TOP),
		(val),
		(PMIC_RG_AUD_PAD_TOP_MTKAIF_CLK_PROTOCOL2_MASK),
		(PMIC_RG_AUD_PAD_TOP_MTKAIF_CLK_PROTOCOL2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_pad_top_tx_fifo_rsp(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_AUD_PAD_TOP),
		(val),
		(PMIC_RG_AUD_PAD_TOP_TX_FIFO_RSP_MASK),
		(PMIC_RG_AUD_PAD_TOP_TX_FIFO_RSP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_adda_aud_pad_top_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_AUD_PAD_TOP_MON),
		(&val),
		(PMIC_ADDA_AUD_PAD_TOP_MON_MASK),
		(PMIC_ADDA_AUD_PAD_TOP_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_adda_aud_pad_top_mon1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_AUD_PAD_TOP_MON1),
		(&val),
		(PMIC_ADDA_AUD_PAD_TOP_MON1_MASK),
		(PMIC_ADDA_AUD_PAD_TOP_MON1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_adda_aud_pad_top_mon2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_AUD_PAD_TOP_MON2),
		(&val),
		(PMIC_ADDA_AUD_PAD_TOP_MON2_MASK),
		(PMIC_ADDA_AUD_PAD_TOP_MON2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_nle_lch_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_NLE_CFG),
		(val),
		(PMIC_NLE_LCH_ON_MASK),
		(PMIC_NLE_LCH_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_nle_lch_ch_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_NLE_CFG),
		(val),
		(PMIC_NLE_LCH_CH_SEL_MASK),
		(PMIC_NLE_LCH_CH_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_nle_lch_hpgain_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_NLE_CFG),
		(val),
		(PMIC_NLE_LCH_HPGAIN_SEL_MASK),
		(PMIC_NLE_LCH_HPGAIN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_nle_rch_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_NLE_CFG),
		(val),
		(PMIC_NLE_RCH_ON_MASK),
		(PMIC_NLE_RCH_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_nle_rch_ch_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_NLE_CFG),
		(val),
		(PMIC_NLE_RCH_CH_SEL_MASK),
		(PMIC_NLE_RCH_CH_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_nle_rch_hpgain_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_DL_NLE_CFG),
		(val),
		(PMIC_NLE_RCH_HPGAIN_SEL_MASK),
		(PMIC_NLE_RCH_HPGAIN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_nle_monitor(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_DL_NLE_MON),
		(&val),
		(PMIC_NLE_MONITOR_MASK),
		(PMIC_NLE_MONITOR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ck_cg_en_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_CG_EN_MON),
		(&val),
		(PMIC_CK_CG_EN_MON_MASK),
		(PMIC_CK_CG_EN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_dmic_adc3_source_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MIC_ARRAY_CFG),
		(val),
		(PMIC_RG_DMIC_ADC3_SOURCE_SEL_MASK),
		(PMIC_RG_DMIC_ADC3_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmic_adc2_source_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MIC_ARRAY_CFG),
		(val),
		(PMIC_RG_DMIC_ADC2_SOURCE_SEL_MASK),
		(PMIC_RG_DMIC_ADC2_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmic_adc1_source_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MIC_ARRAY_CFG),
		(val),
		(PMIC_RG_DMIC_ADC1_SOURCE_SEL_MASK),
		(PMIC_RG_DMIC_ADC1_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_amic_adc3_source_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MIC_ARRAY_CFG),
		(val),
		(PMIC_RG_AMIC_ADC3_SOURCE_SEL_MASK),
		(PMIC_RG_AMIC_ADC3_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_amic_adc2_source_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MIC_ARRAY_CFG),
		(val),
		(PMIC_RG_AMIC_ADC2_SOURCE_SEL_MASK),
		(PMIC_RG_AMIC_ADC2_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_amic_adc1_source_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MIC_ARRAY_CFG),
		(val),
		(PMIC_RG_AMIC_ADC1_SOURCE_SEL_MASK),
		(PMIC_RG_AMIC_ADC1_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_chop_div_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_CHOP_CFG0),
		(val),
		(PMIC_RG_CHOP_DIV_EN_MASK),
		(PMIC_RG_CHOP_DIV_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_chop_div_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_CHOP_CFG0),
		(&val),
		(PMIC_RG_CHOP_DIV_EN_MASK),
		(PMIC_RG_CHOP_DIV_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_chop_div_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_CHOP_CFG0),
		(val),
		(PMIC_RG_CHOP_DIV_SEL_MASK),
		(PMIC_RG_CHOP_DIV_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda_ch1_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(val),
		(PMIC_RG_ADDA_CH1_SEL_MASK),
		(PMIC_RG_ADDA_CH1_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda_ch2_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(val),
		(PMIC_RG_ADDA_CH2_SEL_MASK),
		(PMIC_RG_ADDA_CH2_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda_en_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(val),
		(PMIC_RG_ADDA_EN_SEL_MASK),
		(PMIC_RG_ADDA_EN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adda_en_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(&val),
		(PMIC_RG_ADDA_EN_SEL_MASK),
		(PMIC_RG_ADDA_EN_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_adda6_ch1_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(val),
		(PMIC_RG_ADDA6_CH1_SEL_MASK),
		(PMIC_RG_ADDA6_CH1_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda6_ch2_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(val),
		(PMIC_RG_ADDA6_CH2_SEL_MASK),
		(PMIC_RG_ADDA6_CH2_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_adda6_en_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(val),
		(PMIC_RG_ADDA6_EN_SEL_MASK),
		(PMIC_RG_ADDA6_EN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_adda6_en_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_MTKAIF_MUX_CFG),
		(&val),
		(PMIC_RG_ADDA6_EN_SEL_MASK),
		(PMIC_RG_ADDA6_EN_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_2nd_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_2ND_DSN_ID),
		(&val),
		(PMIC_AUDIO_DIG_2ND_ANA_ID_MASK),
		(PMIC_AUDIO_DIG_2ND_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_2nd_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_2ND_DSN_ID),
		(&val),
		(PMIC_AUDIO_DIG_2ND_DIG_ID_MASK),
		(PMIC_AUDIO_DIG_2ND_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_2nd_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_2ND_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_2ND_ANA_MINOR_REV_MASK),
		(PMIC_AUDIO_DIG_2ND_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_2nd_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_2ND_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_2ND_ANA_MAJOR_REV_MASK),
		(PMIC_AUDIO_DIG_2ND_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_2nd_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_2ND_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_2ND_DIG_MINOR_REV_MASK),
		(PMIC_AUDIO_DIG_2ND_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_2nd_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_2ND_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_2ND_DIG_MAJOR_REV_MASK),
		(PMIC_AUDIO_DIG_2ND_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_up8x_sync_word(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_PMIC_NEWIF_CFG3),
		(val),
		(PMIC_RG_UP8X_SYNC_WORD_MASK),
		(PMIC_RG_UP8X_SYNC_WORD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow_intr_mode_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_RG_VOW_INTR_MODE_SEL_MASK),
		(PMIC_RG_VOW_INTR_MODE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vow_intr_mode_sel(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(&val),
		(PMIC_RG_VOW_INTR_MODE_SEL_MASK),
		(PMIC_RG_VOW_INTR_MODE_SEL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_vow_intr_sw_val(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_VOW_INTR_SW_VAL_MASK),
		(PMIC_VOW_INTR_SW_VAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_intr_sw_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_VOW_INTR_SW_MODE_MASK),
		(PMIC_VOW_INTR_SW_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_loop_back_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_VOW_LOOP_BACK_MODE_MASK),
		(PMIC_VOW_LOOP_BACK_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_sdm_3_level(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_VOW_SDM_3_LEVEL_MASK),
		(PMIC_VOW_SDM_3_LEVEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_cic_mode_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_VOW_CIC_MODE_SEL_MASK),
		(PMIC_VOW_CIC_MODE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_main_dmic_ck_vow_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_MAIN_DMIC_CK_VOW_SEL_MASK),
		(PMIC_MAIN_DMIC_CK_VOW_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_dmic_ck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_VOW_DMIC_CK_SEL_MASK),
		(PMIC_VOW_DMIC_CK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_vow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON0),
		(val),
		(PMIC_PDN_VOW_MASK),
		(PMIC_PDN_VOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_ON_CH1_MASK),
		(PMIC_VOW_ON_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sample_base_mode_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_SAMPLE_BASE_MODE_CH1_MASK),
		(PMIC_SAMPLE_BASE_MODE_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_s_n_value_rst_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_S_N_VALUE_RST_CH1_MASK),
		(PMIC_S_N_VALUE_RST_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_intr_clr_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_INTR_CLR_CH1_MASK),
		(PMIC_VOW_INTR_CLR_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_intr_source_sel_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_INTR_SOURCE_SEL_CH1_MASK),
		(PMIC_VOW_INTR_SOURCE_SEL_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_adc_clk_inv_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_ADC_CLK_INV_CH1_MASK),
		(PMIC_VOW_ADC_CLK_INV_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_digmic_ck_phase_sel_ch1(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_DIGMIC_CK_PHASE_SEL_CH1_MASK),
		(PMIC_VOW_DIGMIC_CK_PHASE_SEL_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_ck_pdn_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_CK_PDN_CH1_MASK),
		(PMIC_VOW_CK_PDN_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_adc_ck_pdn_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_ADC_CK_PDN_CH1_MASK),
		(PMIC_VOW_ADC_CK_PDN_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_ck_div_rst_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_CK_DIV_RST_CH1_MASK),
		(PMIC_VOW_CK_DIV_RST_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_digmic_on_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_DIGMIC_ON_CH1_MASK),
		(PMIC_VOW_DIGMIC_ON_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_dmic0_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON1),
		(val),
		(PMIC_VOW_DMIC0_CK_PDN_MASK),
		(PMIC_VOW_DMIC0_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_ON_CH2_MASK),
		(PMIC_VOW_ON_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_sample_base_mode_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_SAMPLE_BASE_MODE_CH2_MASK),
		(PMIC_SAMPLE_BASE_MODE_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_s_n_value_rst_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_S_N_VALUE_RST_CH2_MASK),
		(PMIC_S_N_VALUE_RST_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_intr_clr_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_INTR_CLR_CH2_MASK),
		(PMIC_VOW_INTR_CLR_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_intr_source_sel_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_INTR_SOURCE_SEL_CH2_MASK),
		(PMIC_VOW_INTR_SOURCE_SEL_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_adc_clk_inv_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_ADC_CLK_INV_CH2_MASK),
		(PMIC_VOW_ADC_CLK_INV_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_digmic_ck_phase_sel_ch2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_DIGMIC_CK_PHASE_SEL_CH2_MASK),
		(PMIC_VOW_DIGMIC_CK_PHASE_SEL_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_ck_pdn_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_CK_PDN_CH2_MASK),
		(PMIC_VOW_CK_PDN_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_adc_ck_pdn_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_ADC_CK_PDN_CH2_MASK),
		(PMIC_VOW_ADC_CK_PDN_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_ck_div_rst_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_CK_DIV_RST_CH2_MASK),
		(PMIC_VOW_CK_DIV_RST_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_digmic_on_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_DIGMIC_ON_CH2_MASK),
		(PMIC_VOW_DIGMIC_ON_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_dmic1_ck_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON2),
		(val),
		(PMIC_VOW_DMIC1_CK_PDN_MASK),
		(PMIC_VOW_DMIC1_CK_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_p2_snrdet_auto_pdn(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON3),
		(val),
		(PMIC_VOW_P2_SNRDET_AUTO_PDN_MASK),
		(PMIC_VOW_P2_SNRDET_AUTO_PDN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_txif_sck_div(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON3),
		(val),
		(PMIC_VOW_TXIF_SCK_DIV_MASK),
		(PMIC_VOW_TXIF_SCK_DIV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_txif_mono(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON3),
		(val),
		(PMIC_VOW_TXIF_MONO_MASK),
		(PMIC_VOW_TXIF_MONO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_adc_testck_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON3),
		(val),
		(PMIC_VOW_ADC_TESTCK_SEL_MASK),
		(PMIC_VOW_ADC_TESTCK_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_adc_testck_src_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON3),
		(val),
		(PMIC_VOW_ADC_TESTCK_SRC_SEL_MASK),
		(PMIC_VOW_ADC_TESTCK_SRC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_txif_sck_inv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON3),
		(val),
		(PMIC_VOW_TXIF_SCK_INV_MASK),
		(PMIC_VOW_TXIF_SCK_INV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow_amic_adc2_source_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON4),
		(val),
		(PMIC_RG_VOW_AMIC_ADC2_SOURCE_SEL_MASK),
		(PMIC_RG_VOW_AMIC_ADC2_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_vow_amic_adc1_source_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TOP_CON4),
		(val),
		(PMIC_RG_VOW_AMIC_ADC1_SOURCE_SEL_MASK),
		(PMIC_RG_VOW_AMIC_ADC1_SOURCE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_vow_intr_flag_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_TOP_MON0),
		(&val),
		(PMIC_VOW_INTR_FLAG_CH2_MASK),
		(PMIC_VOW_INTR_FLAG_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_intr_flag_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_TOP_MON0),
		(&val),
		(PMIC_VOW_INTR_FLAG_CH1_MASK),
		(PMIC_VOW_INTR_FLAG_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_intr(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_TOP_MON0),
		(&val),
		(PMIC_VOW_INTR_MASK),
		(PMIC_VOW_INTR_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_buck_dvfs_done(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_TOP_MON0),
		(&val),
		(PMIC_BUCK_DVFS_DONE_MASK),
		(PMIC_BUCK_DVFS_DONE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_ampref_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG0),
		(val),
		(PMIC_AMPREF_CH1_MASK),
		(PMIC_AMPREF_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_ampref_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG1),
		(val),
		(PMIC_AMPREF_CH2_MASK),
		(PMIC_AMPREF_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_timerini_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG2),
		(val),
		(PMIC_TIMERINI_CH1_MASK),
		(PMIC_TIMERINI_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_timerini_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG3),
		(val),
		(PMIC_TIMERINI_CH2_MASK),
		(PMIC_TIMERINI_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_a_ini_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG4),
		(val),
		(PMIC_A_INI_CH1_MASK),
		(PMIC_A_INI_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_b_ini_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG4),
		(val),
		(PMIC_B_INI_CH1_MASK),
		(PMIC_B_INI_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_a_default_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG4),
		(val),
		(PMIC_A_DEFAULT_CH1_MASK),
		(PMIC_A_DEFAULT_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_b_default_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG4),
		(val),
		(PMIC_B_DEFAULT_CH1_MASK),
		(PMIC_B_DEFAULT_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_irq_latch_snr_en_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG4),
		(val),
		(PMIC_VOW_IRQ_LATCH_SNR_EN_CH1_MASK),
		(PMIC_VOW_IRQ_LATCH_SNR_EN_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_a_ini_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG5),
		(val),
		(PMIC_A_INI_CH2_MASK),
		(PMIC_A_INI_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_b_ini_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG5),
		(val),
		(PMIC_B_INI_CH2_MASK),
		(PMIC_B_INI_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_a_default_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG5),
		(val),
		(PMIC_A_DEFAULT_CH2_MASK),
		(PMIC_A_DEFAULT_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_b_default_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG5),
		(val),
		(PMIC_B_DEFAULT_CH2_MASK),
		(PMIC_B_DEFAULT_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_irq_latch_snr_en_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG5),
		(val),
		(PMIC_VOW_IRQ_LATCH_SNR_EN_CH2_MASK),
		(PMIC_VOW_IRQ_LATCH_SNR_EN_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_alpha_fall_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG6),
		(val),
		(PMIC_K_ALPHA_FALL_CH1_MASK),
		(PMIC_K_ALPHA_FALL_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_alpha_rise_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG6),
		(val),
		(PMIC_K_ALPHA_RISE_CH1_MASK),
		(PMIC_K_ALPHA_RISE_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_beta_fall_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG6),
		(val),
		(PMIC_K_BETA_FALL_CH1_MASK),
		(PMIC_K_BETA_FALL_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_beta_rise_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG6),
		(val),
		(PMIC_K_BETA_RISE_CH1_MASK),
		(PMIC_K_BETA_RISE_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_alpha_fall_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG7),
		(val),
		(PMIC_K_ALPHA_FALL_CH2_MASK),
		(PMIC_K_ALPHA_FALL_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_alpha_rise_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG7),
		(val),
		(PMIC_K_ALPHA_RISE_CH2_MASK),
		(PMIC_K_ALPHA_RISE_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_beta_fall_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG7),
		(val),
		(PMIC_K_BETA_FALL_CH2_MASK),
		(PMIC_K_BETA_FALL_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_beta_rise_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG7),
		(val),
		(PMIC_K_BETA_RISE_CH2_MASK),
		(PMIC_K_BETA_RISE_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_n_min_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG8),
		(val),
		(PMIC_N_MIN_CH1_MASK),
		(PMIC_N_MIN_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_n_min_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG9),
		(val),
		(PMIC_N_MIN_CH2_MASK),
		(PMIC_N_MIN_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_sn_ini_cfg_val_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG10),
		(val),
		(PMIC_VOW_SN_INI_CFG_VAL_CH1_MASK),
		(PMIC_VOW_SN_INI_CFG_VAL_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_sn_ini_cfg_en_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG10),
		(val),
		(PMIC_VOW_SN_INI_CFG_EN_CH1_MASK),
		(PMIC_VOW_SN_INI_CFG_EN_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_sn_ini_cfg_val_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG11),
		(val),
		(PMIC_VOW_SN_INI_CFG_VAL_CH2_MASK),
		(PMIC_VOW_SN_INI_CFG_VAL_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_sn_ini_cfg_en_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG11),
		(val),
		(PMIC_VOW_SN_INI_CFG_EN_CH2_MASK),
		(PMIC_VOW_SN_INI_CFG_EN_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_gamma_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG12),
		(val),
		(PMIC_K_GAMMA_CH2_MASK),
		(PMIC_K_GAMMA_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_k_gamma_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_VAD_CFG12),
		(val),
		(PMIC_K_GAMMA_CH1_MASK),
		(PMIC_K_GAMMA_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_vow_downcnt_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON0),
		(&val),
		(PMIC_VOW_DOWNCNT_CH1_MASK),
		(PMIC_VOW_DOWNCNT_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_downcnt_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON1),
		(&val),
		(PMIC_VOW_DOWNCNT_CH2_MASK),
		(PMIC_VOW_DOWNCNT_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_second_cnt_start_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON2),
		(&val),
		(PMIC_SECOND_CNT_START_CH1_MASK),
		(PMIC_SECOND_CNT_START_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_a_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON2),
		(&val),
		(PMIC_VOW_A_CH1_MASK),
		(PMIC_VOW_A_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_b_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON2),
		(&val),
		(PMIC_VOW_B_CH1_MASK),
		(PMIC_VOW_B_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_slt_counter_mon_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON2),
		(&val),
		(PMIC_SLT_COUNTER_MON_CH1_MASK),
		(PMIC_SLT_COUNTER_MON_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_k_tmp_mon_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON2),
		(&val),
		(PMIC_K_TMP_MON_CH1_MASK),
		(PMIC_K_TMP_MON_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_second_cnt_start_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON3),
		(&val),
		(PMIC_SECOND_CNT_START_CH2_MASK),
		(PMIC_SECOND_CNT_START_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_a_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON3),
		(&val),
		(PMIC_VOW_A_CH2_MASK),
		(PMIC_VOW_A_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_b_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON3),
		(&val),
		(PMIC_VOW_B_CH2_MASK),
		(PMIC_VOW_B_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_slt_counter_mon_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON3),
		(&val),
		(PMIC_SLT_COUNTER_MON_CH2_MASK),
		(PMIC_SLT_COUNTER_MON_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_k_tmp_mon_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON3),
		(&val),
		(PMIC_K_TMP_MON_CH2_MASK),
		(PMIC_K_TMP_MON_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_s_l_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON4),
		(&val),
		(PMIC_VOW_S_L_CH1_MASK),
		(PMIC_VOW_S_L_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_s_l_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON5),
		(&val),
		(PMIC_VOW_S_L_CH2_MASK),
		(PMIC_VOW_S_L_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_s_h_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON6),
		(&val),
		(PMIC_VOW_S_H_CH1_MASK),
		(PMIC_VOW_S_H_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_s_h_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON7),
		(&val),
		(PMIC_VOW_S_H_CH2_MASK),
		(PMIC_VOW_S_H_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_n_l_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON8),
		(&val),
		(PMIC_VOW_N_L_CH1_MASK),
		(PMIC_VOW_N_L_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_n_l_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON9),
		(&val),
		(PMIC_VOW_N_L_CH2_MASK),
		(PMIC_VOW_N_L_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_n_h_ch1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON10),
		(&val),
		(PMIC_VOW_N_H_CH1_MASK),
		(PMIC_VOW_N_H_CH1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_n_h_ch2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_VAD_MON11),
		(&val),
		(PMIC_VOW_N_H_CH2_MASK),
		(PMIC_VOW_N_H_CH2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_vow_tgen_freq_div_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TGEN_CFG0),
		(val),
		(PMIC_VOW_TGEN_FREQ_DIV_CH1_MASK),
		(PMIC_VOW_TGEN_FREQ_DIV_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_tgen_mute_sw_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TGEN_CFG0),
		(val),
		(PMIC_VOW_TGEN_MUTE_SW_CH1_MASK),
		(PMIC_VOW_TGEN_MUTE_SW_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_tgen_en_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TGEN_CFG0),
		(val),
		(PMIC_VOW_TGEN_EN_CH1_MASK),
		(PMIC_VOW_TGEN_EN_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_tgen_freq_div_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TGEN_CFG1),
		(val),
		(PMIC_VOW_TGEN_FREQ_DIV_CH2_MASK),
		(PMIC_VOW_TGEN_FREQ_DIV_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_tgen_mute_sw_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TGEN_CFG1),
		(val),
		(PMIC_VOW_TGEN_MUTE_SW_CH2_MASK),
		(PMIC_VOW_TGEN_MUTE_SW_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_tgen_en_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_TGEN_CFG1),
		(val),
		(PMIC_VOW_TGEN_EN_CH2_MASK),
		(PMIC_VOW_TGEN_EN_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hpf_on_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG0),
		(val),
		(PMIC_RG_HPF_ON_CH1_MASK),
		(PMIC_RG_HPF_ON_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_snrdet_hpf_bypass_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG0),
		(val),
		(PMIC_RG_SNRDET_HPF_BYPASS_CH1_MASK),
		(PMIC_RG_SNRDET_HPF_BYPASS_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_hpf_bypass_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG0),
		(val),
		(PMIC_RG_MTKAIF_HPF_BYPASS_CH1_MASK),
		(PMIC_RG_MTKAIF_HPF_BYPASS_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baseline_alpha_order_ch1(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG0),
		(val),
		(PMIC_RG_BASELINE_ALPHA_ORDER_CH1_MASK),
		(PMIC_RG_BASELINE_ALPHA_ORDER_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_hpf_dc_test_ch1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG0),
		(val),
		(PMIC_VOW_HPF_DC_TEST_CH1_MASK),
		(PMIC_VOW_HPF_DC_TEST_CH1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hpf_on_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG1),
		(val),
		(PMIC_RG_HPF_ON_CH2_MASK),
		(PMIC_RG_HPF_ON_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_snrdet_hpf_bypass_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG1),
		(val),
		(PMIC_RG_SNRDET_HPF_BYPASS_CH2_MASK),
		(PMIC_RG_SNRDET_HPF_BYPASS_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtkaif_hpf_bypass_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG1),
		(val),
		(PMIC_RG_MTKAIF_HPF_BYPASS_CH2_MASK),
		(PMIC_RG_MTKAIF_HPF_BYPASS_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_baseline_alpha_order_ch2(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG1),
		(val),
		(PMIC_RG_BASELINE_ALPHA_ORDER_CH2_MASK),
		(PMIC_RG_BASELINE_ALPHA_ORDER_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_hpf_dc_test_ch2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_HPF_CFG1),
		(val),
		(PMIC_VOW_HPF_DC_TEST_CH2_MASK),
		(PMIC_VOW_HPF_DC_TEST_CH2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_audio_dig_3rd_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_3RD_DSN_ID),
		(&val),
		(PMIC_AUDIO_DIG_3RD_ANA_ID_MASK),
		(PMIC_AUDIO_DIG_3RD_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_3rd_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_3RD_DSN_ID),
		(&val),
		(PMIC_AUDIO_DIG_3RD_DIG_ID_MASK),
		(PMIC_AUDIO_DIG_3RD_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_3rd_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_3RD_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_3RD_ANA_MINOR_REV_MASK),
		(PMIC_AUDIO_DIG_3RD_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_3rd_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_3RD_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_3RD_ANA_MAJOR_REV_MASK),
		(PMIC_AUDIO_DIG_3RD_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_3rd_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_3RD_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_3RD_DIG_MINOR_REV_MASK),
		(PMIC_AUDIO_DIG_3RD_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audio_dig_3rd_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDIO_DIG_3RD_DSN_REV0),
		(&val),
		(PMIC_AUDIO_DIG_3RD_DIG_MAJOR_REV_MASK),
		(PMIC_AUDIO_DIG_3RD_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_periodic_cnt_period(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG0),
		(val),
		(PMIC_RG_PERIODIC_CNT_PERIOD_MASK),
		(PMIC_RG_PERIODIC_CNT_PERIOD_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_periodic_cnt_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG0),
		(val),
		(PMIC_RG_PERIODIC_CNT_CLR_MASK),
		(PMIC_RG_PERIODIC_CNT_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_periodic_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG0),
		(val),
		(PMIC_RG_PERIODIC_EN_MASK),
		(PMIC_RG_PERIODIC_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_periodic_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG0),
		(&val),
		(PMIC_RG_PERIODIC_EN_MASK),
		(PMIC_RG_PERIODIC_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_periodic_cnt_set_value(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG1),
		(val),
		(PMIC_RG_PERIODIC_CNT_SET_VALUE_MASK),
		(PMIC_RG_PERIODIC_CNT_SET_VALUE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_periodic_cnt_pause(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG1),
		(val),
		(PMIC_RG_PERIODIC_CNT_PAUSE_MASK),
		(PMIC_RG_PERIODIC_CNT_PAUSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_periodic_cnt_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG1),
		(val),
		(PMIC_RG_PERIODIC_CNT_SET_MASK),
		(PMIC_RG_PERIODIC_CNT_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamplon_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG2),
		(val),
		(PMIC_AUDPREAMPLON_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPREAMPLON_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamplon_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG2),
		(val),
		(PMIC_AUDPREAMPLON_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPREAMPLON_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamplon_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG2),
		(val),
		(PMIC_AUDPREAMPLON_PERIODIC_MODE_MASK),
		(PMIC_AUDPREAMPLON_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampldcprecharge_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG3),
		(val),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampldcprecharge_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG3),
		(val),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampldcprecharge_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG3),
		(val),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_MODE_MASK),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadclpwrup_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG4),
		(val),
		(PMIC_AUDADCLPWRUP_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDADCLPWRUP_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadclpwrup_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG4),
		(val),
		(PMIC_AUDADCLPWRUP_PERIODIC_INVERSE_MASK),
		(PMIC_AUDADCLPWRUP_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadclpwrup_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG4),
		(val),
		(PMIC_AUDADCLPWRUP_PERIODIC_MODE_MASK),
		(PMIC_AUDADCLPWRUP_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbvowlpwen_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG5),
		(val),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbvowlpwen_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG5),
		(val),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_INVERSE_MASK),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbvowlpwen_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG5),
		(val),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_MODE_MASK),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmicen_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG6),
		(val),
		(PMIC_AUDDIGMICEN_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDDIGMICEN_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmicen_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG6),
		(val),
		(PMIC_AUDDIGMICEN_PERIODIC_INVERSE_MASK),
		(PMIC_AUDDIGMICEN_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmicen_periodic_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG6),
		(val),
		(PMIC_AUDDIGMICEN_PERIODIC_MODE_MASK),
		(PMIC_AUDDIGMICEN_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias0_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG7),
		(val),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias0_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG7),
		(val),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias0_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG7),
		(val),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_MODE_MASK),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias1_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG8),
		(val),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias1_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG8),
		(val),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias1_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG8),
		(val),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_MODE_MASK),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vow_ck_en_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG9),
		(val),
		(PMIC_XO_VOW_CK_EN_PERIODIC_ON_CYCLE_MASK),
		(PMIC_XO_VOW_CK_EN_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vow_ck_en_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG9),
		(val),
		(PMIC_XO_VOW_CK_EN_PERIODIC_INVERSE_MASK),
		(PMIC_XO_VOW_CK_EN_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vow_ck_en_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG9),
		(val),
		(PMIC_XO_VOW_CK_EN_PERIODIC_MODE_MASK),
		(PMIC_XO_VOW_CK_EN_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglb_pwrdn_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG10),
		(val),
		(PMIC_AUDGLB_PWRDN_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDGLB_PWRDN_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglb_pwrdn_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG10),
		(val),
		(PMIC_AUDGLB_PWRDN_PERIODIC_INVERSE_MASK),
		(PMIC_AUDGLB_PWRDN_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglb_pwrdn_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG10),
		(val),
		(PMIC_AUDGLB_PWRDN_PERIODIC_MODE_MASK),
		(PMIC_AUDGLB_PWRDN_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch1_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG11),
		(val),
		(PMIC_VOW_ON_CH1_PERIODIC_ON_CYCLE_MASK),
		(PMIC_VOW_ON_CH1_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch1_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG11),
		(val),
		(PMIC_VOW_ON_CH1_PERIODIC_INVERSE_MASK),
		(PMIC_VOW_ON_CH1_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch1_periodic_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG11),
		(val),
		(PMIC_VOW_ON_CH1_PERIODIC_MODE_MASK),
		(PMIC_VOW_ON_CH1_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch1_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG12),
		(val),
		(PMIC_DMIC_ON_CH1_PERIODIC_ON_CYCLE_MASK),
		(PMIC_DMIC_ON_CH1_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch1_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG12),
		(val),
		(PMIC_DMIC_ON_CH1_PERIODIC_INVERSE_MASK),
		(PMIC_DMIC_ON_CH1_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch1_periodic_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG12),
		(val),
		(PMIC_DMIC_ON_CH1_PERIODIC_MODE_MASK),
		(PMIC_DMIC_ON_CH1_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamplon_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG13),
		(val),
		(PMIC_AUDPREAMPLON_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPREAMPLON_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_pdn_vow_f32k_ck(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG13),
		(val),
		(PMIC_PDN_VOW_F32K_CK_MASK),
		(PMIC_PDN_VOW_F32K_CK_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampldcprecharge_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG14),
		(val),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPREAMPLDCPRECHARGE_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_snrdet_periodic_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG14),
		(val),
		(PMIC_VOW_SNRDET_PERIODIC_CFG_MASK),
		(PMIC_VOW_SNRDET_PERIODIC_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadclpwrup_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG15),
		(val),
		(PMIC_AUDADCLPWRUP_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDADCLPWRUP_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbvowlpwen_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG16),
		(val),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDGLBVOWLPWEN_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmicen_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG17),
		(val),
		(PMIC_AUDDIGMICEN_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDDIGMICEN_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias0_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG18),
		(val),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPWDBMICBIAS0_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias1_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG19),
		(val),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPWDBMICBIAS1_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_xo_vow_ck_en_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG20),
		(val),
		(PMIC_XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_XO_VOW_CK_EN_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_clksq_en_vow_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG20),
		(val),
		(PMIC_CLKSQ_EN_VOW_PERIODIC_MODE_MASK),
		(PMIC_CLKSQ_EN_VOW_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglb_pwrdn_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG21),
		(val),
		(PMIC_AUDGLB_PWRDN_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDGLB_PWRDN_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch1_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG22),
		(val),
		(PMIC_VOW_ON_CH1_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_VOW_ON_CH1_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch1_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG23),
		(val),
		(PMIC_DMIC_ON_CH1_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_DMIC_ON_CH1_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampron_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG24),
		(val),
		(PMIC_AUDPREAMPRON_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPREAMPRON_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampron_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG24),
		(val),
		(PMIC_AUDPREAMPRON_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPREAMPRON_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampron_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG24),
		(val),
		(PMIC_AUDPREAMPRON_PERIODIC_MODE_MASK),
		(PMIC_AUDPREAMPRON_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamprdcprecharge_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG25),
		(val),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamprdcprecharge_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG25),
		(val),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamprdcprecharge_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG25),
		(val),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_MODE_MASK),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadcrpwrup_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG26),
		(val),
		(PMIC_AUDADCRPWRUP_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDADCRPWRUP_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadcrpwrup_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG26),
		(val),
		(PMIC_AUDADCRPWRUP_PERIODIC_INVERSE_MASK),
		(PMIC_AUDADCRPWRUP_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadcrpwrup_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG26),
		(val),
		(PMIC_AUDADCRPWRUP_PERIODIC_MODE_MASK),
		(PMIC_AUDADCRPWRUP_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbrvowlpwen_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG27),
		(val),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbrvowlpwen_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG27),
		(val),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_INVERSE_MASK),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbrvowlpwen_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG27),
		(val),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_MODE_MASK),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmic1en_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG28),
		(val),
		(PMIC_AUDDIGMIC1EN_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDDIGMIC1EN_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmic1en_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG28),
		(val),
		(PMIC_AUDDIGMIC1EN_PERIODIC_INVERSE_MASK),
		(PMIC_AUDDIGMIC1EN_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmic1en_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG28),
		(val),
		(PMIC_AUDDIGMIC1EN_PERIODIC_MODE_MASK),
		(PMIC_AUDDIGMIC1EN_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias2_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG29),
		(val),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_ON_CYCLE_MASK),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias2_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG29),
		(val),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_INVERSE_MASK),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias2_periodic_mode(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG29),
		(val),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_MODE_MASK),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch2_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG30),
		(val),
		(PMIC_VOW_ON_CH2_PERIODIC_ON_CYCLE_MASK),
		(PMIC_VOW_ON_CH2_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch2_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG30),
		(val),
		(PMIC_VOW_ON_CH2_PERIODIC_INVERSE_MASK),
		(PMIC_VOW_ON_CH2_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch2_periodic_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG30),
		(val),
		(PMIC_VOW_ON_CH2_PERIODIC_MODE_MASK),
		(PMIC_VOW_ON_CH2_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch2_periodic_on_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG31),
		(val),
		(PMIC_DMIC_ON_CH2_PERIODIC_ON_CYCLE_MASK),
		(PMIC_DMIC_ON_CH2_PERIODIC_ON_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch2_periodic_inverse(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG31),
		(val),
		(PMIC_DMIC_ON_CH2_PERIODIC_INVERSE_MASK),
		(PMIC_DMIC_ON_CH2_PERIODIC_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch2_periodic_mode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG31),
		(val),
		(PMIC_DMIC_ON_CH2_PERIODIC_MODE_MASK),
		(PMIC_DMIC_ON_CH2_PERIODIC_MODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreampron_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG32),
		(val),
		(PMIC_AUDPREAMPRON_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPREAMPRON_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpreamprdcprecharge_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG33),
		(val),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPREAMPRDCPRECHARGE_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audadcrpwrup_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG34),
		(val),
		(PMIC_AUDADCRPWRUP_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDADCRPWRUP_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audglbrvowlpwen_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG35),
		(val),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDGLBRVOWLPWEN_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_auddigmic1en_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG36),
		(val),
		(PMIC_AUDDIGMIC1EN_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDDIGMIC1EN_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audpwdbmicbias2_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG37),
		(val),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_AUDPWDBMICBIAS2_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_vow_on_ch2_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG38),
		(val),
		(PMIC_VOW_ON_CH2_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_VOW_ON_CH2_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_dmic_on_ch2_periodic_off_cycle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_VOW_PERIODIC_CFG39),
		(val),
		(PMIC_DMIC_ON_CH2_PERIODIC_OFF_CYCLE_MASK),
		(PMIC_DMIC_ON_CH2_PERIODIC_OFF_CYCLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_vow_periodic_mon0(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_PERIODIC_MON0),
		(&val),
		(PMIC_VOW_PERIODIC_MON0_MASK),
		(PMIC_VOW_PERIODIC_MON0_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_periodic_mon1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_PERIODIC_MON1),
		(&val),
		(PMIC_VOW_PERIODIC_MON1_MASK),
		(PMIC_VOW_PERIODIC_MON1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_vow_periodic_count_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_VOW_PERIODIC_MON2),
		(&val),
		(PMIC_VOW_PERIODIC_COUNT_MON_MASK),
		(PMIC_VOW_PERIODIC_COUNT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ncp_on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG0),
		(val),
		(PMIC_RG_NCP_ON_MASK),
		(PMIC_RG_NCP_ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ncp_dither_fixed_ck0_ack2_2p(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG0),
		(val),
		(PMIC_RG_NCP_DITHER_FIXED_CK0_ACK2_2P_MASK),
		(PMIC_RG_NCP_DITHER_FIXED_CK0_ACK2_2P_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ncp_dither_fixed_ck0_ack1_2p(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG0),
		(val),
		(PMIC_RG_NCP_DITHER_FIXED_CK0_ACK1_2P_MASK),
		(PMIC_RG_NCP_DITHER_FIXED_CK0_ACK1_2P_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ncp_dither_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG0),
		(val),
		(PMIC_RG_NCP_DITHER_EN_MASK),
		(PMIC_RG_NCP_DITHER_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ncp_dither_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_NCP_CFG0),
		(&val),
		(PMIC_RG_NCP_DITHER_EN_MASK),
		(PMIC_RG_NCP_DITHER_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ncp_adith(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG0),
		(val),
		(PMIC_RG_NCP_ADITH_MASK),
		(PMIC_RG_NCP_ADITH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_ncp_ck1_valid_cnt(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG0),
		(val),
		(PMIC_RG_NCP_CK1_VALID_CNT_MASK),
		(PMIC_RG_NCP_CK1_VALID_CNT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_y_val_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG1),
		(val),
		(PMIC_RG_Y_VAL_CFG_MASK),
		(PMIC_RG_Y_VAL_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_x_val_cfg(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG1),
		(val),
		(PMIC_RG_X_VAL_CFG_MASK),
		(PMIC_RG_X_VAL_CFG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_xy_val_cfg_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG1),
		(val),
		(PMIC_RG_XY_VAL_CFG_EN_MASK),
		(PMIC_RG_XY_VAL_CFG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_xy_val_cfg_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_NCP_CFG1),
		(&val),
		(PMIC_RG_XY_VAL_CFG_EN_MASK),
		(PMIC_RG_XY_VAL_CFG_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ncp_pddis_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG2),
		(val),
		(PMIC_RG_NCP_PDDIS_EN_MASK),
		(PMIC_RG_NCP_PDDIS_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_ncp_pddis_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AFE_NCP_CFG2),
		(&val),
		(PMIC_RG_NCP_PDDIS_EN_MASK),
		(PMIC_RG_NCP_PDDIS_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_ncp_nonclk_set(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AFE_NCP_CFG2),
		(val),
		(PMIC_RG_NCP_NONCLK_SET_MASK),
		(PMIC_RG_NCP_NONCLK_SET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_audenc_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_DSN_ID),
		(&val),
		(PMIC_AUDENC_ANA_ID_MASK),
		(PMIC_AUDENC_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audenc_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_DSN_ID),
		(&val),
		(PMIC_AUDENC_DIG_ID_MASK),
		(PMIC_AUDENC_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audenc_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_DSN_REV0),
		(&val),
		(PMIC_AUDENC_ANA_MINOR_REV_MASK),
		(PMIC_AUDENC_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audenc_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_DSN_REV0),
		(&val),
		(PMIC_AUDENC_ANA_MAJOR_REV_MASK),
		(PMIC_AUDENC_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audenc_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_DSN_REV0),
		(&val),
		(PMIC_AUDENC_DIG_MINOR_REV_MASK),
		(PMIC_AUDENC_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audenc_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_DSN_REV0),
		(&val),
		(PMIC_AUDENC_DIG_MAJOR_REV_MASK),
		(PMIC_AUDENC_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audpreamplon(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLON_MASK),
		(PMIC_RG_AUDPREAMPLON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreampldccen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLDCCEN_MASK),
		(PMIC_RG_AUDPREAMPLDCCEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreampldcprecharge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLDCPRECHARGE_MASK),
		(PMIC_RG_AUDPREAMPLDCPRECHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamplpgatest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLPGATEST_MASK),
		(PMIC_RG_AUDPREAMPLPGATEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamplvscale(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLVSCALE_MASK),
		(PMIC_RG_AUDPREAMPLVSCALE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamplinputsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLINPUTSEL_MASK),
		(PMIC_RG_AUDPREAMPLINPUTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamplgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDPREAMPLGAIN_MASK),
		(PMIC_RG_AUDPREAMPLGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bulkl_vcm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_BULKL_VCM_EN_MASK),
		(PMIC_RG_BULKL_VCM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bulkl_vcm_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON0),
		(&val),
		(PMIC_RG_BULKL_VCM_EN_MASK),
		(PMIC_RG_BULKL_VCM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audadclpwrup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDADCLPWRUP_MASK),
		(PMIC_RG_AUDADCLPWRUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadclinputsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON0),
		(val),
		(PMIC_RG_AUDADCLINPUTSEL_MASK),
		(PMIC_RG_AUDADCLINPUTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreampron(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRON_MASK),
		(PMIC_RG_AUDPREAMPRON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamprdccen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRDCCEN_MASK),
		(PMIC_RG_AUDPREAMPRDCCEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamprdcprecharge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRDCPRECHARGE_MASK),
		(PMIC_RG_AUDPREAMPRDCPRECHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamprpgatest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRPGATEST_MASK),
		(PMIC_RG_AUDPREAMPRPGATEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamprvscale(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRVSCALE_MASK),
		(PMIC_RG_AUDPREAMPRVSCALE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamprinputsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRINPUTSEL_MASK),
		(PMIC_RG_AUDPREAMPRINPUTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamprgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDPREAMPRGAIN_MASK),
		(PMIC_RG_AUDPREAMPRGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bulkr_vcm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_BULKR_VCM_EN_MASK),
		(PMIC_RG_BULKR_VCM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bulkr_vcm_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON1),
		(&val),
		(PMIC_RG_BULKR_VCM_EN_MASK),
		(PMIC_RG_BULKR_VCM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audadcrpwrup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDADCRPWRUP_MASK),
		(PMIC_RG_AUDADCRPWRUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcrinputsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON1),
		(val),
		(PMIC_RG_AUDADCRINPUTSEL_MASK),
		(PMIC_RG_AUDADCRINPUTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3on(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3ON_MASK),
		(PMIC_RG_AUDPREAMP3ON_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3dccen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3DCCEN_MASK),
		(PMIC_RG_AUDPREAMP3DCCEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3dcprecharge(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3DCPRECHARGE_MASK),
		(PMIC_RG_AUDPREAMP3DCPRECHARGE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3pgatest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3PGATEST_MASK),
		(PMIC_RG_AUDPREAMP3PGATEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3vscale(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3VSCALE_MASK),
		(PMIC_RG_AUDPREAMP3VSCALE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3inputsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3INPUTSEL_MASK),
		(PMIC_RG_AUDPREAMP3INPUTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp3gain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDPREAMP3GAIN_MASK),
		(PMIC_RG_AUDPREAMP3GAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bulk3_vcm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_BULK3_VCM_EN_MASK),
		(PMIC_RG_BULK3_VCM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_bulk3_vcm_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON2),
		(&val),
		(PMIC_RG_BULK3_VCM_EN_MASK),
		(PMIC_RG_BULK3_VCM_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audadc3pwrup(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDADC3PWRUP_MASK),
		(PMIC_RG_AUDADC3PWRUP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc3inputsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON2),
		(val),
		(PMIC_RG_AUDADC3INPUTSEL_MASK),
		(PMIC_RG_AUDADC3INPUTSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audulhalfbias(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDULHALFBIAS_MASK),
		(PMIC_RG_AUDULHALFBIAS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audglbvowlpwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDGLBVOWLPWEN_MASK),
		(PMIC_RG_AUDGLBVOWLPWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamplpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDPREAMPLPEN_MASK),
		(PMIC_RG_AUDPREAMPLPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc1ststagelpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADC1STSTAGELPEN_MASK),
		(PMIC_RG_AUDADC1STSTAGELPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc2ndstagelpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADC2NDSTAGELPEN_MASK),
		(PMIC_RG_AUDADC2NDSTAGELPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcflashlpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADCFLASHLPEN_MASK),
		(PMIC_RG_AUDADCFLASHLPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreampiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDPREAMPIDDTEST_MASK),
		(PMIC_RG_AUDPREAMPIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc1ststageiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADC1STSTAGEIDDTEST_MASK),
		(PMIC_RG_AUDADC1STSTAGEIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc2ndstageiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADC2NDSTAGEIDDTEST_MASK),
		(PMIC_RG_AUDADC2NDSTAGEIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcrefbufiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADCREFBUFIDDTEST_MASK),
		(PMIC_RG_AUDADCREFBUFIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcflashiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON3),
		(val),
		(PMIC_RG_AUDADCFLASHIDDTEST_MASK),
		(PMIC_RG_AUDADCFLASHIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrulhalfbias(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRULHALFBIAS_MASK),
		(PMIC_RG_AUDRULHALFBIAS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audglbrvowlpwen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDGLBRVOWLPWEN_MASK),
		(PMIC_RG_AUDGLBRVOWLPWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrpreamplpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRPREAMPLPEN_MASK),
		(PMIC_RG_AUDRPREAMPLPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradc1ststagelpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADC1STSTAGELPEN_MASK),
		(PMIC_RG_AUDRADC1STSTAGELPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradc2ndstagelpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADC2NDSTAGELPEN_MASK),
		(PMIC_RG_AUDRADC2NDSTAGELPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradcflashlpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADCFLASHLPEN_MASK),
		(PMIC_RG_AUDRADCFLASHLPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrpreampiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRPREAMPIDDTEST_MASK),
		(PMIC_RG_AUDRPREAMPIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradc1ststageiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADC1STSTAGEIDDTEST_MASK),
		(PMIC_RG_AUDRADC1STSTAGEIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradc2ndstageiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADC2NDSTAGEIDDTEST_MASK),
		(PMIC_RG_AUDRADC2NDSTAGEIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradcrefbufiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADCREFBUFIDDTEST_MASK),
		(PMIC_RG_AUDRADCREFBUFIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audradcflashiddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON4),
		(val),
		(PMIC_RG_AUDRADCFLASHIDDTEST_MASK),
		(PMIC_RG_AUDRADCFLASHIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcclkrstb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDADCCLKRSTB_MASK),
		(PMIC_RG_AUDADCCLKRSTB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcclksel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDADCCLKSEL_MASK),
		(PMIC_RG_AUDADCCLKSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcclksource(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDADCCLKSOURCE_MASK),
		(PMIC_RG_AUDADCCLKSOURCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcclkgenmode(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDADCCLKGENMODE_MASK),
		(PMIC_RG_AUDADCCLKGENMODE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreamp_accfs(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDPREAMP_ACCFS_MASK),
		(PMIC_RG_AUDPREAMP_ACCFS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpreampaafen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDPREAMPAAFEN_MASK),
		(PMIC_RG_AUDPREAMPAAFEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dccvcmbuflpmodsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_DCCVCMBUFLPMODSEL_MASK),
		(PMIC_RG_DCCVCMBUFLPMODSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dccvcmbuflpswen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_DCCVCMBUFLPSWEN_MASK),
		(PMIC_RG_DCCVCMBUFLPSWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audsparepga(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON5),
		(val),
		(PMIC_RG_AUDSPAREPGA_MASK),
		(PMIC_RG_AUDSPAREPGA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc1ststagesdenb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADC1STSTAGESDENB_MASK),
		(PMIC_RG_AUDADC1STSTAGESDENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc2ndstagereset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADC2NDSTAGERESET_MASK),
		(PMIC_RG_AUDADC2NDSTAGERESET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadc3rdstagereset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADC3RDSTAGERESET_MASK),
		(PMIC_RG_AUDADC3RDSTAGERESET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcfsreset(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCFSRESET_MASK),
		(PMIC_RG_AUDADCFSRESET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcwidecm(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCWIDECM_MASK),
		(PMIC_RG_AUDADCWIDECM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcnopatest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCNOPATEST_MASK),
		(PMIC_RG_AUDADCNOPATEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcbypass(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCBYPASS_MASK),
		(PMIC_RG_AUDADCBYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcffbypass(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCFFBYPASS_MASK),
		(PMIC_RG_AUDADCFFBYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcdacfbcurrent(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCDACFBCURRENT_MASK),
		(PMIC_RG_AUDADCDACFBCURRENT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcdaciddtest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCDACIDDTEST_MASK),
		(PMIC_RG_AUDADCDACIDDTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcdacnrz(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCDACNRZ_MASK),
		(PMIC_RG_AUDADCDACNRZ_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcnodem(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCNODEM_MASK),
		(PMIC_RG_AUDADCNODEM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcdactest(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCDACTEST_MASK),
		(PMIC_RG_AUDADCDACTEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcdac0p25fs(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCDAC0P25FS_MASK),
		(PMIC_RG_AUDADCDAC0P25FS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadcrdac0p25fs(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON6),
		(val),
		(PMIC_RG_AUDADCRDAC0P25FS_MASK),
		(PMIC_RG_AUDADCRDAC0P25FS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audadctestdata(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON7),
		(val),
		(PMIC_RG_AUDADCTESTDATA_MASK),
		(PMIC_RG_AUDADCTESTDATA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrctunel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON8),
		(val),
		(PMIC_RG_AUDRCTUNEL_MASK),
		(PMIC_RG_AUDRCTUNEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrctunelsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON8),
		(val),
		(PMIC_RG_AUDRCTUNELSEL_MASK),
		(PMIC_RG_AUDRCTUNELSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrctuner(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON8),
		(val),
		(PMIC_RG_AUDRCTUNER_MASK),
		(PMIC_RG_AUDRCTUNER_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrctunersel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON8),
		(val),
		(PMIC_RG_AUDRCTUNERSEL_MASK),
		(PMIC_RG_AUDRCTUNERSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud3ctunel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON9),
		(val),
		(PMIC_RG_AUD3CTUNEL_MASK),
		(PMIC_RG_AUD3CTUNEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud3ctunelsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON9),
		(val),
		(PMIC_RG_AUD3CTUNELSEL_MASK),
		(PMIC_RG_AUD3CTUNELSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_audrctune3read(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON9),
		(&val),
		(PMIC_RGS_AUDRCTUNE3READ_MASK),
		(PMIC_RGS_AUDRCTUNE3READ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_aud3spare(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON9),
		(val),
		(PMIC_RG_AUD3SPARE_MASK),
		(PMIC_RG_AUD3SPARE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rgs_audrctunelread(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON10),
		(&val),
		(PMIC_RGS_AUDRCTUNELREAD_MASK),
		(PMIC_RGS_AUDRCTUNELREAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rgs_audrctunerread(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON10),
		(&val),
		(PMIC_RGS_AUDRCTUNERREAD_MASK),
		(PMIC_RGS_AUDRCTUNERREAD_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audspareva30(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON11),
		(val),
		(PMIC_RG_AUDSPAREVA30_MASK),
		(PMIC_RG_AUDSPAREVA30_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audspareva18(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON11),
		(val),
		(PMIC_RG_AUDSPAREVA18_MASK),
		(PMIC_RG_AUDSPAREVA18_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpga_decap(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON12),
		(val),
		(PMIC_RG_AUDPGA_DECAP_MASK),
		(PMIC_RG_AUDPGA_DECAP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpga_capra(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON12),
		(val),
		(PMIC_RG_AUDPGA_CAPRA_MASK),
		(PMIC_RG_AUDPGA_CAPRA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpga_acccmp(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON12),
		(val),
		(PMIC_RG_AUDPGA_ACCCMP_MASK),
		(PMIC_RG_AUDPGA_ACCCMP_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audenc_spare2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON12),
		(val),
		(PMIC_RG_AUDENC_SPARE2_MASK),
		(PMIC_RG_AUDENC_SPARE2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmicen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_AUDDIGMICEN_MASK),
		(PMIC_RG_AUDDIGMICEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmicbias(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_AUDDIGMICBIAS_MASK),
		(PMIC_RG_AUDDIGMICBIAS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmichpclken(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_DMICHPCLKEN_MASK),
		(PMIC_RG_DMICHPCLKEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmicpduty(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_AUDDIGMICPDUTY_MASK),
		(PMIC_RG_AUDDIGMICPDUTY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmicnduty(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_AUDDIGMICNDUTY_MASK),
		(PMIC_RG_AUDDIGMICNDUTY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmicmonen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_DMICMONEN_MASK),
		(PMIC_RG_DMICMONEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmicmonsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON13),
		(val),
		(PMIC_RG_DMICMONSEL_MASK),
		(PMIC_RG_DMICMONSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmic1en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_AUDDIGMIC1EN_MASK),
		(PMIC_RG_AUDDIGMIC1EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmicbias1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_AUDDIGMICBIAS1_MASK),
		(PMIC_RG_AUDDIGMICBIAS1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmic1hpclken(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_DMIC1HPCLKEN_MASK),
		(PMIC_RG_DMIC1HPCLKEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmic1pduty(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_AUDDIGMIC1PDUTY_MASK),
		(PMIC_RG_AUDDIGMIC1PDUTY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddigmic1nduty(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_AUDDIGMIC1NDUTY_MASK),
		(PMIC_RG_AUDDIGMIC1NDUTY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmic1monen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_DMIC1MONEN_MASK),
		(PMIC_RG_DMIC1MONEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_dmic1monsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_DMIC1MONSEL_MASK),
		(PMIC_RG_DMIC1MONSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audsparevmic(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON14),
		(val),
		(PMIC_RG_AUDSPAREVMIC_MASK),
		(PMIC_RG_AUDSPAREVMIC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpwdbmicbias0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDPWDBMICBIAS0_MASK),
		(PMIC_RG_AUDPWDBMICBIAS0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0bypassen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0BYPASSEN_MASK),
		(PMIC_RG_AUDMICBIAS0BYPASSEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0lowpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0LOWPEN_MASK),
		(PMIC_RG_AUDMICBIAS0LOWPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpwdbmicbias3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDPWDBMICBIAS3_MASK),
		(PMIC_RG_AUDPWDBMICBIAS3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0vref(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0VREF_MASK),
		(PMIC_RG_AUDMICBIAS0VREF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0dcsw0p1en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0DCSW0P1EN_MASK),
		(PMIC_RG_AUDMICBIAS0DCSW0P1EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0dcsw0p2en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0DCSW0P2EN_MASK),
		(PMIC_RG_AUDMICBIAS0DCSW0P2EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0dcsw0nen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0DCSW0NEN_MASK),
		(PMIC_RG_AUDMICBIAS0DCSW0NEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0dcsw2p1en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0DCSW2P1EN_MASK),
		(PMIC_RG_AUDMICBIAS0DCSW2P1EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0dcsw2p2en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0DCSW2P2EN_MASK),
		(PMIC_RG_AUDMICBIAS0DCSW2P2EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias0dcsw2nen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON15),
		(val),
		(PMIC_RG_AUDMICBIAS0DCSW2NEN_MASK),
		(PMIC_RG_AUDMICBIAS0DCSW2NEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpwdbmicbias1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDPWDBMICBIAS1_MASK),
		(PMIC_RG_AUDPWDBMICBIAS1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1bypassen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1BYPASSEN_MASK),
		(PMIC_RG_AUDMICBIAS1BYPASSEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1lowpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1LOWPEN_MASK),
		(PMIC_RG_AUDMICBIAS1LOWPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1vref(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1VREF_MASK),
		(PMIC_RG_AUDMICBIAS1VREF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1dcsw1pen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1DCSW1PEN_MASK),
		(PMIC_RG_AUDMICBIAS1DCSW1PEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1dcsw1nen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1DCSW1NEN_MASK),
		(PMIC_RG_AUDMICBIAS1DCSW1NEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_bandgapgen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_BANDGAPGEN_MASK),
		(PMIC_RG_BANDGAPGEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1hven(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1HVEN_MASK),
		(PMIC_RG_AUDMICBIAS1HVEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias1hvvref(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON16),
		(val),
		(PMIC_RG_AUDMICBIAS1HVVREF_MASK),
		(PMIC_RG_AUDMICBIAS1HVVREF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpwdbmicbias2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDPWDBMICBIAS2_MASK),
		(PMIC_RG_AUDPWDBMICBIAS2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias2bypassen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIAS2BYPASSEN_MASK),
		(PMIC_RG_AUDMICBIAS2BYPASSEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias2lowpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIAS2LOWPEN_MASK),
		(PMIC_RG_AUDMICBIAS2LOWPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias2vref(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIAS2VREF_MASK),
		(PMIC_RG_AUDMICBIAS2VREF_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias2dcsw3p1en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIAS2DCSW3P1EN_MASK),
		(PMIC_RG_AUDMICBIAS2DCSW3P1EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias2dcsw3p2en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIAS2DCSW3P2EN_MASK),
		(PMIC_RG_AUDMICBIAS2DCSW3P2EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbias2dcsw3nen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIAS2DCSW3NEN_MASK),
		(PMIC_RG_AUDMICBIAS2DCSW3NEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audmicbiasspare(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON17),
		(val),
		(PMIC_RG_AUDMICBIASSPARE_MASK),
		(PMIC_RG_AUDMICBIASSPARE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetmicbias0pulllow(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETMICBIAS0PULLLOW_MASK),
		(PMIC_RG_AUDACCDETMICBIAS0PULLLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetmicbias1pulllow(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETMICBIAS1PULLLOW_MASK),
		(PMIC_RG_AUDACCDETMICBIAS1PULLLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetmicbias2pulllow(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETMICBIAS2PULLLOW_MASK),
		(PMIC_RG_AUDACCDETMICBIAS2PULLLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetvin1pulllow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETVIN1PULLLOW_MASK),
		(PMIC_RG_AUDACCDETVIN1PULLLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetvthacal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETVTHACAL_MASK),
		(PMIC_RG_AUDACCDETVTHACAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetvthbcal(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETVTHBCAL_MASK),
		(PMIC_RG_AUDACCDETVTHBCAL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdettvdet(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETTVDET_MASK),
		(PMIC_RG_AUDACCDETTVDET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_accdetsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_ACCDETSEL_MASK),
		(PMIC_RG_ACCDETSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_swbufmodsel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_SWBUFMODSEL_MASK),
		(PMIC_RG_SWBUFMODSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_swbufswen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_SWBUFSWEN_MASK),
		(PMIC_RG_SWBUFSWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0nohys(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_EINT0NOHYS_MASK),
		(PMIC_RG_EINT0NOHYS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0configaccdet(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_EINT0CONFIGACCDET_MASK),
		(PMIC_RG_EINT0CONFIGACCDET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0hirenb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_EINT0HIRENB_MASK),
		(PMIC_RG_EINT0HIRENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_accdet2auxresbypass(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_ACCDET2AUXRESBYPASS_MASK),
		(PMIC_RG_ACCDET2AUXRESBYPASS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_accdet2auxswen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_ACCDET2AUXSWEN_MASK),
		(PMIC_RG_ACCDET2AUXSWEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetmicbias3pulllow(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON18),
		(val),
		(PMIC_RG_AUDACCDETMICBIAS3PULLLOW_MASK),
		(PMIC_RG_AUDACCDETMICBIAS3PULLLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1configaccdet(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_EINT1CONFIGACCDET_MASK),
		(PMIC_RG_EINT1CONFIGACCDET_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1hirenb(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_EINT1HIRENB_MASK),
		(PMIC_RG_EINT1HIRENB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1nohys(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_EINT1NOHYS_MASK),
		(PMIC_RG_EINT1NOHYS_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eintcompvth(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_EINTCOMPVTH_MASK),
		(PMIC_RG_EINTCOMPVTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtest_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_MTEST_EN_MASK),
		(PMIC_RG_MTEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_mtest_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON19),
		(&val),
		(PMIC_RG_MTEST_EN_MASK),
		(PMIC_RG_MTEST_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_mtest_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_MTEST_SEL_MASK),
		(PMIC_RG_MTEST_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_mtest_current(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_MTEST_CURRENT_MASK),
		(PMIC_RG_MTEST_CURRENT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_analogfden(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_ANALOGFDEN_MASK),
		(PMIC_RG_ANALOGFDEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fdvin1ppulllow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_FDVIN1PPULLLOW_MASK),
		(PMIC_RG_FDVIN1PPULLLOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fdeint0type(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_FDEINT0TYPE_MASK),
		(PMIC_RG_FDEINT0TYPE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_fdeint1type(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON19),
		(val),
		(PMIC_RG_FDEINT1TYPE_MASK),
		(PMIC_RG_FDEINT1TYPE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0cmpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT0CMPEN_MASK),
		(PMIC_RG_EINT0CMPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0cmpmen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT0CMPMEN_MASK),
		(PMIC_RG_EINT0CMPMEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT0EN_MASK),
		(PMIC_RG_EINT0EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0cen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT0CEN_MASK),
		(PMIC_RG_EINT0CEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0inven(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT0INVEN_MASK),
		(PMIC_RG_EINT0INVEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint0cturbo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT0CTURBO_MASK),
		(PMIC_RG_EINT0CTURBO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1cmpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT1CMPEN_MASK),
		(PMIC_RG_EINT1CMPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1cmpmen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT1CMPMEN_MASK),
		(PMIC_RG_EINT1CMPMEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT1EN_MASK),
		(PMIC_RG_EINT1EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1cen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT1CEN_MASK),
		(PMIC_RG_EINT1CEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1inven(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT1INVEN_MASK),
		(PMIC_RG_EINT1INVEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_eint1cturbo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON20),
		(val),
		(PMIC_RG_EINT1CTURBO_MASK),
		(PMIC_RG_EINT1CTURBO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_accdetspare(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON21),
		(val),
		(PMIC_RG_ACCDETSPARE_MASK),
		(PMIC_RG_ACCDETSPARE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audencspareva30(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON22),
		(val),
		(PMIC_RG_AUDENCSPAREVA30_MASK),
		(PMIC_RG_AUDENCSPAREVA30_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audencspareva18(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON22),
		(val),
		(PMIC_RG_AUDENCSPAREVA18_MASK),
		(PMIC_RG_AUDENCSPAREVA18_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_clksq_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_CLKSQ_EN_MASK),
		(PMIC_RG_CLKSQ_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_clksq_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON23),
		(&val),
		(PMIC_RG_CLKSQ_EN_MASK),
		(PMIC_RG_CLKSQ_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_clksq_in_sel_test(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_CLKSQ_IN_SEL_TEST_MASK),
		(PMIC_RG_CLKSQ_IN_SEL_TEST_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_cm_refgensel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_CM_REFGENSEL_MASK),
		(PMIC_RG_CM_REFGENSEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audio_vow_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_AUDIO_VOW_EN_MASK),
		(PMIC_RG_AUDIO_VOW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audio_vow_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON23),
		(&val),
		(PMIC_RG_AUDIO_VOW_EN_MASK),
		(PMIC_RG_AUDIO_VOW_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_clksq_en_vow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_CLKSQ_EN_VOW_MASK),
		(PMIC_RG_CLKSQ_EN_VOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_clksq_en_vow(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON23),
		(&val),
		(PMIC_RG_CLKSQ_EN_VOW_MASK),
		(PMIC_RG_CLKSQ_EN_VOW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_clkand_en_vow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_CLKAND_EN_VOW_MASK),
		(PMIC_RG_CLKAND_EN_VOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_clkand_en_vow(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON23),
		(&val),
		(PMIC_RG_CLKAND_EN_VOW_MASK),
		(PMIC_RG_CLKAND_EN_VOW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_vowclk_sel_en_vow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_VOWCLK_SEL_EN_VOW_MASK),
		(PMIC_RG_VOWCLK_SEL_EN_VOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_vowclk_sel_en_vow(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDENC_ANA_CON23),
		(&val),
		(PMIC_RG_VOWCLK_SEL_EN_VOW_MASK),
		(PMIC_RG_VOWCLK_SEL_EN_VOW_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_spare_vow(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDENC_ANA_CON23),
		(val),
		(PMIC_RG_SPARE_VOW_MASK),
		(PMIC_RG_SPARE_VOW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_auddec_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_DSN_ID),
		(&val),
		(PMIC_AUDDEC_ANA_ID_MASK),
		(PMIC_AUDDEC_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auddec_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_DSN_ID),
		(&val),
		(PMIC_AUDDEC_DIG_ID_MASK),
		(PMIC_AUDDEC_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auddec_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_DSN_REV0),
		(&val),
		(PMIC_AUDDEC_ANA_MINOR_REV_MASK),
		(PMIC_AUDDEC_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auddec_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_DSN_REV0),
		(&val),
		(PMIC_AUDDEC_ANA_MAJOR_REV_MASK),
		(PMIC_AUDDEC_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auddec_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_DSN_REV0),
		(&val),
		(PMIC_AUDDEC_DIG_MINOR_REV_MASK),
		(PMIC_AUDDEC_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_auddec_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_DSN_REV0),
		(&val),
		(PMIC_AUDDEC_DIG_MAJOR_REV_MASK),
		(PMIC_AUDDEC_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_auddaclpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDDACLPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDDACLPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddacrpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDDACRPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDDACRPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dac_pwr_up_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUD_DAC_PWR_UP_VA32_MASK),
		(PMIC_RG_AUD_DAC_PWR_UP_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dac_pwl_up_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUD_DAC_PWL_UP_VA32_MASK),
		(PMIC_RG_AUD_DAC_PWL_UP_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPLPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPLPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPRPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPRPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplpwrup_ibias_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPLPWRUP_IBIAS_VAUDP32_MASK),
		(PMIC_RG_AUDHPLPWRUP_IBIAS_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprpwrup_ibias_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPRPWRUP_IBIAS_VAUDP32_MASK),
		(PMIC_RG_AUDHPRPWRUP_IBIAS_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplmuxinputsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprmuxinputsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplscdisable_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPLSCDISABLE_VAUDP32_MASK),
		(PMIC_RG_AUDHPLSCDISABLE_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprscdisable_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPRSCDISABLE_VAUDP32_MASK),
		(PMIC_RG_AUDHPRSCDISABLE_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplbsccurrent_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPLBSCCURRENT_VAUDP32_MASK),
		(PMIC_RG_AUDHPLBSCCURRENT_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprbsccurrent_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON0),
		(val),
		(PMIC_RG_AUDHPRBSCCURRENT_VAUDP32_MASK),
		(PMIC_RG_AUDHPRBSCCURRENT_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhploutpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_AUDHPLOUTPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPLOUTPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhproutpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_AUDHPROUTPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPROUTPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhploutauxpwrup_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_AUDHPLOUTAUXPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPLOUTAUXPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhproutauxpwrup_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_AUDHPROUTAUXPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPROUTAUXPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hplauxfbrsw_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_HPLAUXFBRSW_EN_VAUDP32_MASK),
		(PMIC_RG_HPLAUXFBRSW_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_hplauxfbrsw_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(&val),
		(PMIC_RG_HPLAUXFBRSW_EN_VAUDP32_MASK),
		(PMIC_RG_HPLAUXFBRSW_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_hprauxfbrsw_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_HPRAUXFBRSW_EN_VAUDP32_MASK),
		(PMIC_RG_HPRAUXFBRSW_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_hprauxfbrsw_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(&val),
		(PMIC_RG_HPRAUXFBRSW_EN_VAUDP32_MASK),
		(PMIC_RG_HPRAUXFBRSW_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_hplshort2hplaux_en_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_HPLSHORT2HPLAUX_EN_VAUDP32_MASK),
		(PMIC_RG_HPLSHORT2HPLAUX_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_hplshort2hplaux_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(&val),
		(PMIC_RG_HPLSHORT2HPLAUX_EN_VAUDP32_MASK),
		(PMIC_RG_HPLSHORT2HPLAUX_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_hprshort2hpraux_en_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_HPRSHORT2HPRAUX_EN_VAUDP32_MASK),
		(PMIC_RG_HPRSHORT2HPRAUX_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_hprshort2hpraux_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(&val),
		(PMIC_RG_HPRSHORT2HPRAUX_EN_VAUDP32_MASK),
		(PMIC_RG_HPRSHORT2HPRAUX_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_hploutstgctrl_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_HPLOUTSTGCTRL_VAUDP32_MASK),
		(PMIC_RG_HPLOUTSTGCTRL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hproutstgctrl_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON1),
		(val),
		(PMIC_RG_HPROUTSTGCTRL_VAUDP32_MASK),
		(PMIC_RG_HPROUTSTGCTRL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hploutputstbenh_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_HPLOUTPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_HPLOUTPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hproutputstbenh_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_HPROUTPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_HPROUTPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhpstartup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_AUDHPSTARTUP_VAUDP32_MASK),
		(PMIC_RG_AUDHPSTARTUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audrefn_deres_en_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_AUDREFN_DERES_EN_VAUDP32_MASK),
		(PMIC_RG_AUDREFN_DERES_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audrefn_deres_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(&val),
		(PMIC_RG_AUDREFN_DERES_EN_VAUDP32_MASK),
		(PMIC_RG_AUDREFN_DERES_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_hpinputstbenh_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_HPINPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_HPINPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hpinputreset0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_HPINPUTRESET0_VAUDP32_MASK),
		(PMIC_RG_HPINPUTRESET0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hpoutputreset0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_HPOUTPUTRESET0_VAUDP32_MASK),
		(PMIC_RG_HPOUTPUTRESET0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hppshort2vcm_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_HPPSHORT2VCM_VAUDP32_MASK),
		(PMIC_RG_HPPSHORT2VCM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhptrim_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(val),
		(PMIC_RG_AUDHPTRIM_EN_VAUDP32_MASK),
		(PMIC_RG_AUDHPTRIM_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audhptrim_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON2),
		(&val),
		(PMIC_RG_AUDHPTRIM_EN_VAUDP32_MASK),
		(PMIC_RG_AUDHPTRIM_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audhpltrim_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON3),
		(val),
		(PMIC_RG_AUDHPLTRIM_VAUDP32_MASK),
		(PMIC_RG_AUDHPLTRIM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplfinetrim_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON3),
		(val),
		(PMIC_RG_AUDHPLFINETRIM_VAUDP32_MASK),
		(PMIC_RG_AUDHPLFINETRIM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprtrim_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON3),
		(val),
		(PMIC_RG_AUDHPRTRIM_VAUDP32_MASK),
		(PMIC_RG_AUDHPRTRIM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprfinetrim_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON3),
		(val),
		(PMIC_RG_AUDHPRFINETRIM_VAUDP32_MASK),
		(PMIC_RG_AUDHPRFINETRIM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhpdiffinpbiasadj_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON4),
		(val),
		(PMIC_RG_AUDHPDIFFINPBIASADJ_VAUDP32_MASK),
		(PMIC_RG_AUDHPDIFFINPBIASADJ_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplfcompressel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON4),
		(val),
		(PMIC_RG_AUDHPLFCOMPRESSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPLFCOMPRESSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhphfcompressel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON4),
		(val),
		(PMIC_RG_AUDHPHFCOMPRESSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPHFCOMPRESSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhphfcompbufgainsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON4),
		(val),
		(PMIC_RG_AUDHPHFCOMPBUFGAINSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPHFCOMPBUFGAINSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhpcomp_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON4),
		(val),
		(PMIC_RG_AUDHPCOMP_EN_VAUDP32_MASK),
		(PMIC_RG_AUDHPCOMP_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audhpcomp_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON4),
		(&val),
		(PMIC_RG_AUDHPCOMP_EN_VAUDP32_MASK),
		(PMIC_RG_AUDHPCOMP_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audhpdecmgainadj_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON5),
		(val),
		(PMIC_RG_AUDHPDECMGAINADJ_VAUDP32_MASK),
		(PMIC_RG_AUDHPDECMGAINADJ_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhpdedmgainadj_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON5),
		(val),
		(PMIC_RG_AUDHPDEDMGAINADJ_VAUDP32_MASK),
		(PMIC_RG_AUDHPDEDMGAINADJ_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhspwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_AUDHSPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDHSPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhspwrup_ibias_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_AUDHSPWRUP_IBIAS_VAUDP32_MASK),
		(PMIC_RG_AUDHSPWRUP_IBIAS_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhsmuxinputsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_AUDHSMUXINPUTSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHSMUXINPUTSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhsscdisable_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_AUDHSSCDISABLE_VAUDP32_MASK),
		(PMIC_RG_AUDHSSCDISABLE_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhsbsccurrent_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_AUDHSBSCCURRENT_VAUDP32_MASK),
		(PMIC_RG_AUDHSBSCCURRENT_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhsstartup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_AUDHSSTARTUP_VAUDP32_MASK),
		(PMIC_RG_AUDHSSTARTUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hsoutputstbenh_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_HSOUTPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_HSOUTPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hsinputstbenh_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_HSINPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_HSINPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hsinputreset0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_HSINPUTRESET0_VAUDP32_MASK),
		(PMIC_RG_HSINPUTRESET0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hsoutputreset0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_HSOUTPUTRESET0_VAUDP32_MASK),
		(PMIC_RG_HSOUTPUTRESET0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_hsout_shortvcm_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON6),
		(val),
		(PMIC_RG_HSOUT_SHORTVCM_VAUDP32_MASK),
		(PMIC_RG_HSOUT_SHORTVCM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlolpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDLOLPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDLOLPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlolpwrup_ibias_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDLOLPWRUP_IBIAS_VAUDP32_MASK),
		(PMIC_RG_AUDLOLPWRUP_IBIAS_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlolmuxinputsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDLOLMUXINPUTSEL_VAUDP32_MASK),
		(PMIC_RG_AUDLOLMUXINPUTSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlolscdisable_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDLOLSCDISABLE_VAUDP32_MASK),
		(PMIC_RG_AUDLOLSCDISABLE_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlolbsccurrent_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDLOLBSCCURRENT_VAUDP32_MASK),
		(PMIC_RG_AUDLOLBSCCURRENT_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlostartup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDLOSTARTUP_VAUDP32_MASK),
		(PMIC_RG_AUDLOSTARTUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_loinputstbenh_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_LOINPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_LOINPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_looutputstbenh_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_LOOUTPUTSTBENH_VAUDP32_MASK),
		(PMIC_RG_LOOUTPUTSTBENH_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_loinputreset0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_LOINPUTRESET0_VAUDP32_MASK),
		(PMIC_RG_LOINPUTRESET0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_looutputreset0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_LOOUTPUTRESET0_VAUDP32_MASK),
		(PMIC_RG_LOOUTPUTRESET0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_loout_shortvcm_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_LOOUT_SHORTVCM_VAUDP32_MASK),
		(PMIC_RG_LOOUT_SHORTVCM_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_auddactpwrup_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUDDACTPWRUP_VAUDP32_MASK),
		(PMIC_RG_AUDDACTPWRUP_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_aud_dac_pwt_up_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON7),
		(val),
		(PMIC_RG_AUD_DAC_PWT_UP_VA32_MASK),
		(PMIC_RG_AUD_DAC_PWT_UP_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audtrimbuf_inputmuxsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(val),
		(PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP32_MASK),
		(PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audtrimbuf_gainsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(val),
		(PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP32_MASK),
		(PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audtrimbuf_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(val),
		(PMIC_RG_AUDTRIMBUF_EN_VAUDP32_MASK),
		(PMIC_RG_AUDTRIMBUF_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audtrimbuf_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(&val),
		(PMIC_RG_AUDTRIMBUF_EN_VAUDP32_MASK),
		(PMIC_RG_AUDTRIMBUF_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audhpspkdet_inputmuxsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(val),
		(PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhpspkdet_outputmuxsel_vaudp32(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(val),
		(PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP32_MASK),
		(PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhpspkdet_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(val),
		(PMIC_RG_AUDHPSPKDET_EN_VAUDP32_MASK),
		(PMIC_RG_AUDHPSPKDET_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audhpspkdet_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON8),
		(&val),
		(PMIC_RG_AUDHPSPKDET_EN_VAUDP32_MASK),
		(PMIC_RG_AUDHPSPKDET_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_abidec_rsvd0_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON9),
		(val),
		(PMIC_RG_ABIDEC_RSVD0_VA32_MASK),
		(PMIC_RG_ABIDEC_RSVD0_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_abidec_rsvd0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON9),
		(val),
		(PMIC_RG_ABIDEC_RSVD0_VAUDP32_MASK),
		(PMIC_RG_ABIDEC_RSVD0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_abidec_rsvd1_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON10),
		(val),
		(PMIC_RG_ABIDEC_RSVD1_VAUDP32_MASK),
		(PMIC_RG_ABIDEC_RSVD1_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_abidec_rsvd2_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON10),
		(val),
		(PMIC_RG_ABIDEC_RSVD2_VAUDP32_MASK),
		(PMIC_RG_ABIDEC_RSVD2_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audzcdmuxsel_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON11),
		(val),
		(PMIC_RG_AUDZCDMUXSEL_VAUDP32_MASK),
		(PMIC_RG_AUDZCDMUXSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audzcdclksel_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON11),
		(val),
		(PMIC_RG_AUDZCDCLKSEL_VAUDP32_MASK),
		(PMIC_RG_AUDZCDCLKSEL_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audbiasadj_0_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON11),
		(val),
		(PMIC_RG_AUDBIASADJ_0_VAUDP32_MASK),
		(PMIC_RG_AUDBIASADJ_0_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audbiasadj_1_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON12),
		(val),
		(PMIC_RG_AUDBIASADJ_1_VAUDP32_MASK),
		(PMIC_RG_AUDBIASADJ_1_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audibiaspwrdn_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON12),
		(val),
		(PMIC_RG_AUDIBIASPWRDN_VAUDP32_MASK),
		(PMIC_RG_AUDIBIASPWRDN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_rstb_decoder_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(val),
		(PMIC_RG_RSTB_DECODER_VA32_MASK),
		(PMIC_RG_RSTB_DECODER_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_sel_decoder_96k_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(val),
		(PMIC_RG_SEL_DECODER_96K_VA32_MASK),
		(PMIC_RG_SEL_DECODER_96K_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_sel_delay_vcore(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(val),
		(PMIC_RG_SEL_DELAY_VCORE_MASK),
		(PMIC_RG_SEL_DELAY_VCORE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audglb_pwrdn_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(val),
		(PMIC_RG_AUDGLB_PWRDN_VA32_MASK),
		(PMIC_RG_AUDGLB_PWRDN_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audglb_lp_vow_en_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(val),
		(PMIC_RG_AUDGLB_LP_VOW_EN_VA32_MASK),
		(PMIC_RG_AUDGLB_LP_VOW_EN_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audglb_lp_vow_en_va32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(&val),
		(PMIC_RG_AUDGLB_LP_VOW_EN_VA32_MASK),
		(PMIC_RG_AUDGLB_LP_VOW_EN_VA32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audglb_lp2_vow_en_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(val),
		(PMIC_RG_AUDGLB_LP2_VOW_EN_VA32_MASK),
		(PMIC_RG_AUDGLB_LP2_VOW_EN_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audglb_lp2_vow_en_va32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON13),
		(&val),
		(PMIC_RG_AUDGLB_LP2_VOW_EN_VA32_MASK),
		(PMIC_RG_AUDGLB_LP2_VOW_EN_VA32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_lcldo_dec_en_va32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(val),
		(PMIC_RG_LCLDO_DEC_EN_VA32_MASK),
		(PMIC_RG_LCLDO_DEC_EN_VA32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_lcldo_dec_en_va32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(&val),
		(PMIC_RG_LCLDO_DEC_EN_VA32_MASK),
		(PMIC_RG_LCLDO_DEC_EN_VA32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_lcldo_dec_pddis_en_va18(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(val),
		(PMIC_RG_LCLDO_DEC_PDDIS_EN_VA18_MASK),
		(PMIC_RG_LCLDO_DEC_PDDIS_EN_VA18_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_lcldo_dec_pddis_en_va18(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(&val),
		(PMIC_RG_LCLDO_DEC_PDDIS_EN_VA18_MASK),
		(PMIC_RG_LCLDO_DEC_PDDIS_EN_VA18_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_lcldo_dec_remote_sense_va18(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(val),
		(PMIC_RG_LCLDO_DEC_REMOTE_SENSE_VA18_MASK),
		(PMIC_RG_LCLDO_DEC_REMOTE_SENSE_VA18_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_nvreg_en_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(val),
		(PMIC_RG_NVREG_EN_VAUDP32_MASK),
		(PMIC_RG_NVREG_EN_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_nvreg_en_vaudp32(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(&val),
		(PMIC_RG_NVREG_EN_VAUDP32_MASK),
		(PMIC_RG_NVREG_EN_VAUDP32_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_nvreg_pull0v_vaudp32(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(val),
		(PMIC_RG_NVREG_PULL0V_VAUDP32_MASK),
		(PMIC_RG_NVREG_PULL0V_VAUDP32_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audpmu_rsvd_va18(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_AUDDEC_ANA_CON14),
		(val),
		(PMIC_RG_AUDPMU_RSVD_VA18_MASK),
		(PMIC_RG_AUDPMU_RSVD_VA18_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_audzcd_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDZCD_DSN_ID),
		(&val),
		(PMIC_AUDZCD_ANA_ID_MASK),
		(PMIC_AUDZCD_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audzcd_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDZCD_DSN_ID),
		(&val),
		(PMIC_AUDZCD_DIG_ID_MASK),
		(PMIC_AUDZCD_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audzcd_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDZCD_DSN_REV0),
		(&val),
		(PMIC_AUDZCD_ANA_MINOR_REV_MASK),
		(PMIC_AUDZCD_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audzcd_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDZCD_DSN_REV0),
		(&val),
		(PMIC_AUDZCD_ANA_MAJOR_REV_MASK),
		(PMIC_AUDZCD_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audzcd_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDZCD_DSN_REV0),
		(&val),
		(PMIC_AUDZCD_DIG_MINOR_REV_MASK),
		(PMIC_AUDZCD_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_audzcd_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_AUDZCD_DSN_REV0),
		(&val),
		(PMIC_AUDZCD_DIG_MAJOR_REV_MASK),
		(PMIC_AUDZCD_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_rg_audzcdenable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON0),
		(val),
		(PMIC_RG_AUDZCDENABLE_MASK),
		(PMIC_RG_AUDZCDENABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audzcdgainsteptime(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON0),
		(val),
		(PMIC_RG_AUDZCDGAINSTEPTIME_MASK),
		(PMIC_RG_AUDZCDGAINSTEPTIME_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audzcdgainstepsize(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON0),
		(val),
		(PMIC_RG_AUDZCDGAINSTEPSIZE_MASK),
		(PMIC_RG_AUDZCDGAINSTEPSIZE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audzcdtimeoutmodesel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON0),
		(val),
		(PMIC_RG_AUDZCDTIMEOUTMODESEL_MASK),
		(PMIC_RG_AUDZCDTIMEOUTMODESEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlolgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON1),
		(val),
		(PMIC_RG_AUDLOLGAIN_MASK),
		(PMIC_RG_AUDLOLGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audlorgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON1),
		(val),
		(PMIC_RG_AUDLORGAIN_MASK),
		(PMIC_RG_AUDLORGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhplgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON2),
		(val),
		(PMIC_RG_AUDHPLGAIN_MASK),
		(PMIC_RG_AUDHPLGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhprgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON2),
		(val),
		(PMIC_RG_AUDHPRGAIN_MASK),
		(PMIC_RG_AUDHPRGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audhsgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON3),
		(val),
		(PMIC_RG_AUDHSGAIN_MASK),
		(PMIC_RG_AUDHSGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audivlgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON4),
		(val),
		(PMIC_RG_AUDIVLGAIN_MASK),
		(PMIC_RG_AUDIVLGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audivrgain(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ZCD_CON4),
		(val),
		(PMIC_RG_AUDIVRGAIN_MASK),
		(PMIC_RG_AUDIVRGAIN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_rg_audintgain1(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ZCD_CON5),
		(&val),
		(PMIC_RG_AUDINTGAIN1_MASK),
		(PMIC_RG_AUDINTGAIN1_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_rg_audintgain2(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ZCD_CON5),
		(&val),
		(PMIC_RG_AUDINTGAIN2_MASK),
		(PMIC_RG_AUDINTGAIN2_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_ana_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_DSN_DIG_ID),
		(&val),
		(PMIC_ACCDET_ANA_ID_MASK),
		(PMIC_ACCDET_ANA_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_dig_id(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_DSN_DIG_ID),
		(&val),
		(PMIC_ACCDET_DIG_ID_MASK),
		(PMIC_ACCDET_DIG_ID_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_ana_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_DSN_DIG_REV0),
		(&val),
		(PMIC_ACCDET_ANA_MINOR_REV_MASK),
		(PMIC_ACCDET_ANA_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_ana_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_DSN_DIG_REV0),
		(&val),
		(PMIC_ACCDET_ANA_MAJOR_REV_MASK),
		(PMIC_ACCDET_ANA_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_dig_minor_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_DSN_DIG_REV0),
		(&val),
		(PMIC_ACCDET_DIG_MINOR_REV_MASK),
		(PMIC_ACCDET_DIG_MINOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_dig_major_rev(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_DSN_DIG_REV0),
		(&val),
		(PMIC_ACCDET_DIG_MAJOR_REV_MASK),
		(PMIC_ACCDET_DIG_MAJOR_REV_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_accdet_auxadc_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_ACCDET_AUXADC_SEL_MASK),
		(PMIC_ACCDET_AUXADC_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_auxadc_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_ACCDET_AUXADC_SW_MASK),
		(PMIC_ACCDET_AUXADC_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_auxadc(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_ACCDET_TEST_AUXADC_MASK),
		(PMIC_ACCDET_TEST_AUXADC_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_auxadc_anaswctrl_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_ACCDET_AUXADC_ANASWCTRL_SEL_MASK),
		(PMIC_ACCDET_AUXADC_ANASWCTRL_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audaccdetauxadcswctrl_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_AUDACCDETAUXADCSWCTRL_SEL_MASK),
		(PMIC_AUDACCDETAUXADCSWCTRL_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_audaccdetauxadcswctrl_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_AUDACCDETAUXADCSWCTRL_SW_MASK),
		(PMIC_AUDACCDETAUXADCSWCTRL_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_ana(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_ACCDET_TEST_ANA_MASK),
		(PMIC_ACCDET_TEST_ANA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_rg_audaccdetrsv(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON0),
		(val),
		(PMIC_RG_AUDACCDETRSV_MASK),
		(PMIC_RG_AUDACCDETRSV_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_SW_EN_MASK),
		(PMIC_ACCDET_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_seq_init(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_SEQ_INIT_MASK),
		(PMIC_ACCDET_SEQ_INIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT0_SW_EN_MASK),
		(PMIC_ACCDET_EINT0_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_seq_init(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT0_SEQ_INIT_MASK),
		(PMIC_ACCDET_EINT0_SEQ_INIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT1_SW_EN_MASK),
		(PMIC_ACCDET_EINT1_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_seq_init(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT1_SEQ_INIT_MASK),
		(PMIC_ACCDET_EINT1_SEQ_INIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_inverter_sw_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT0_INVERTER_SW_EN_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_inverter_seq_init(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT0_INVERTER_SEQ_INIT_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_SEQ_INIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_inverter_sw_en(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT1_INVERTER_SW_EN_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_inverter_seq_init(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT1_INVERTER_SEQ_INIT_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_SEQ_INIT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_m_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT0_M_SW_EN_MASK),
		(PMIC_ACCDET_EINT0_M_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_m_sw_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT1_M_SW_EN_MASK),
		(PMIC_ACCDET_EINT1_M_SW_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_m_detect_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON1),
		(val),
		(PMIC_ACCDET_EINT_M_DETECT_EN_MASK),
		(PMIC_ACCDET_EINT_M_DETECT_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_cmp_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_CMP_PWM_EN_MASK),
		(PMIC_ACCDET_CMP_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_vth_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_VTH_PWM_EN_MASK),
		(PMIC_ACCDET_VTH_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_mbias_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_MBIAS_PWM_EN_MASK),
		(PMIC_ACCDET_MBIAS_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_en_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_EINT_EN_PWM_EN_MASK),
		(PMIC_ACCDET_EINT_EN_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpen_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_EINT_CMPEN_PWM_EN_MASK),
		(PMIC_ACCDET_EINT_CMPEN_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpmen_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_EINT_CMPMEN_PWM_EN_MASK),
		(PMIC_ACCDET_EINT_CMPMEN_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cturbo_pwm_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_EINT_CTURBO_PWM_EN_MASK),
		(PMIC_ACCDET_EINT_CTURBO_PWM_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_cmp_pwm_idle(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_CMP_PWM_IDLE_MASK),
		(PMIC_ACCDET_CMP_PWM_IDLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_vth_pwm_idle(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_VTH_PWM_IDLE_MASK),
		(PMIC_ACCDET_VTH_PWM_IDLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_mbias_pwm_idle(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_MBIAS_PWM_IDLE_MASK),
		(PMIC_ACCDET_MBIAS_PWM_IDLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpen_pwm_idle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_EINT0_CMPEN_PWM_IDLE_MASK),
		(PMIC_ACCDET_EINT0_CMPEN_PWM_IDLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpen_pwm_idle(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_EINT1_CMPEN_PWM_IDLE_MASK),
		(PMIC_ACCDET_EINT1_CMPEN_PWM_IDLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_pwm_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_PWM_EN_SW_MASK),
		(PMIC_ACCDET_PWM_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_pwm_en_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON2),
		(val),
		(PMIC_ACCDET_PWM_EN_SEL_MASK),
		(PMIC_ACCDET_PWM_EN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_pwm_width(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON3),
		(val),
		(PMIC_ACCDET_PWM_WIDTH_MASK),
		(PMIC_ACCDET_PWM_WIDTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_pwm_thresh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON4),
		(val),
		(PMIC_ACCDET_PWM_THRESH_MASK),
		(PMIC_ACCDET_PWM_THRESH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_rise_delay(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON5),
		(val),
		(PMIC_ACCDET_RISE_DELAY_MASK),
		(PMIC_ACCDET_RISE_DELAY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_fall_delay(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON5),
		(val),
		(PMIC_ACCDET_FALL_DELAY_MASK),
		(PMIC_ACCDET_FALL_DELAY_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpmen_pwm_thresh(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON6),
		(val),
		(PMIC_ACCDET_EINT_CMPMEN_PWM_THRESH_MASK),
		(PMIC_ACCDET_EINT_CMPMEN_PWM_THRESH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpmen_pwm_width(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON6),
		(val),
		(PMIC_ACCDET_EINT_CMPMEN_PWM_WIDTH_MASK),
		(PMIC_ACCDET_EINT_CMPMEN_PWM_WIDTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_en_pwm_thresh(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON7),
		(val),
		(PMIC_ACCDET_EINT_EN_PWM_THRESH_MASK),
		(PMIC_ACCDET_EINT_EN_PWM_THRESH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_en_pwm_width(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON7),
		(val),
		(PMIC_ACCDET_EINT_EN_PWM_WIDTH_MASK),
		(PMIC_ACCDET_EINT_EN_PWM_WIDTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpen_pwm_thresh(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON7),
		(val),
		(PMIC_ACCDET_EINT_CMPEN_PWM_THRESH_MASK),
		(PMIC_ACCDET_EINT_CMPEN_PWM_THRESH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpen_pwm_width(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON7),
		(val),
		(PMIC_ACCDET_EINT_CMPEN_PWM_WIDTH_MASK),
		(PMIC_ACCDET_EINT_CMPEN_PWM_WIDTH_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_debounce0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON8),
		(val),
		(PMIC_ACCDET_DEBOUNCE0_MASK),
		(PMIC_ACCDET_DEBOUNCE0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_debounce1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON9),
		(val),
		(PMIC_ACCDET_DEBOUNCE1_MASK),
		(PMIC_ACCDET_DEBOUNCE1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_debounce2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON10),
		(val),
		(PMIC_ACCDET_DEBOUNCE2_MASK),
		(PMIC_ACCDET_DEBOUNCE2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_debounce3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON11),
		(val),
		(PMIC_ACCDET_DEBOUNCE3_MASK),
		(PMIC_ACCDET_DEBOUNCE3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_connect_auxadc_time_dig(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON12),
		(val),
		(PMIC_ACCDET_CONNECT_AUXADC_TIME_DIG_MASK),
		(PMIC_ACCDET_CONNECT_AUXADC_TIME_DIG_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_connect_auxadc_time_ana(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON13),
		(val),
		(PMIC_ACCDET_CONNECT_AUXADC_TIME_ANA_MASK),
		(PMIC_ACCDET_CONNECT_AUXADC_TIME_ANA_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_debounce0(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON14),
		(val),
		(PMIC_ACCDET_EINT_DEBOUNCE0_MASK),
		(PMIC_ACCDET_EINT_DEBOUNCE0_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_debounce1(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON14),
		(val),
		(PMIC_ACCDET_EINT_DEBOUNCE1_MASK),
		(PMIC_ACCDET_EINT_DEBOUNCE1_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_debounce2(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON14),
		(val),
		(PMIC_ACCDET_EINT_DEBOUNCE2_MASK),
		(PMIC_ACCDET_EINT_DEBOUNCE2_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_debounce3(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON14),
		(val),
		(PMIC_ACCDET_EINT_DEBOUNCE3_MASK),
		(PMIC_ACCDET_EINT_DEBOUNCE3_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_inverter_debounce(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON15),
		(val),
		(PMIC_ACCDET_EINT_INVERTER_DEBOUNCE_MASK),
		(PMIC_ACCDET_EINT_INVERTER_DEBOUNCE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_ival_cur_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_IVAL_CUR_IN_MASK),
		(PMIC_ACCDET_IVAL_CUR_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_ival_sam_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_IVAL_SAM_IN_MASK),
		(PMIC_ACCDET_IVAL_SAM_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_ival_mem_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_IVAL_MEM_IN_MASK),
		(PMIC_ACCDET_IVAL_MEM_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_ival_cur_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_EINT_IVAL_CUR_IN_MASK),
		(PMIC_ACCDET_EINT_IVAL_CUR_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_ival_sam_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_EINT_IVAL_SAM_IN_MASK),
		(PMIC_ACCDET_EINT_IVAL_SAM_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_ival_mem_in(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_EINT_IVAL_MEM_IN_MASK),
		(PMIC_ACCDET_EINT_IVAL_MEM_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_ival_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_IVAL_SEL_MASK),
		(PMIC_ACCDET_IVAL_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_ival_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON16),
		(val),
		(PMIC_ACCDET_EINT_IVAL_SEL_MASK),
		(PMIC_ACCDET_EINT_IVAL_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_inverter_ival_cur_in(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON17),
		(val),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_CUR_IN_MASK),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_CUR_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_inverter_ival_sam_in(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON17),
		(val),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_SAM_IN_MASK),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_SAM_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_inverter_ival_mem_in(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON17),
		(val),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_MEM_IN_MASK),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_MEM_IN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_inverter_ival_sel(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON17),
		(val),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_SEL_MASK),
		(PMIC_ACCDET_EINT_INVERTER_IVAL_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_accdet_irq(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON18),
		(&val),
		(PMIC_ACCDET_IRQ_MASK),
		(PMIC_ACCDET_IRQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_irq(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON18),
		(&val),
		(PMIC_ACCDET_EINT0_IRQ_MASK),
		(PMIC_ACCDET_EINT0_IRQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_irq(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON18),
		(&val),
		(PMIC_ACCDET_EINT1_IRQ_MASK),
		(PMIC_ACCDET_EINT1_IRQ_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_accdet_eint_in_inverse(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON18),
		(val),
		(PMIC_ACCDET_EINT_IN_INVERSE_MASK),
		(PMIC_ACCDET_EINT_IN_INVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_irq_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON18),
		(val),
		(PMIC_ACCDET_IRQ_CLR_MASK),
		(PMIC_ACCDET_IRQ_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_irq_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON18),
		(val),
		(PMIC_ACCDET_EINT0_IRQ_CLR_MASK),
		(PMIC_ACCDET_EINT0_IRQ_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_irq_clr(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON18),
		(val),
		(PMIC_ACCDET_EINT1_IRQ_CLR_MASK),
		(PMIC_ACCDET_EINT1_IRQ_CLR_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_m_plug_in_num(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON18),
		(val),
		(PMIC_ACCDET_EINT_M_PLUG_IN_NUM_MASK),
		(PMIC_ACCDET_EINT_M_PLUG_IN_NUM_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_da_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_DA_STABLE_MASK),
		(PMIC_ACCDET_DA_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_en_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT0_EN_STABLE_MASK),
		(PMIC_ACCDET_EINT0_EN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpen_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT0_CMPEN_STABLE_MASK),
		(PMIC_ACCDET_EINT0_CMPEN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpmen_stable(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT0_CMPMEN_STABLE_MASK),
		(PMIC_ACCDET_EINT0_CMPMEN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cturbo_stable(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT0_CTURBO_STABLE_MASK),
		(PMIC_ACCDET_EINT0_CTURBO_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cen_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT0_CEN_STABLE_MASK),
		(PMIC_ACCDET_EINT0_CEN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_en_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT1_EN_STABLE_MASK),
		(PMIC_ACCDET_EINT1_EN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpen_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT1_CMPEN_STABLE_MASK),
		(PMIC_ACCDET_EINT1_CMPEN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpmen_stable(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT1_CMPMEN_STABLE_MASK),
		(PMIC_ACCDET_EINT1_CMPMEN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cturbo_stable(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT1_CTURBO_STABLE_MASK),
		(PMIC_ACCDET_EINT1_CTURBO_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cen_stable(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON19),
		(val),
		(PMIC_ACCDET_EINT1_CEN_STABLE_MASK),
		(PMIC_ACCDET_EINT1_CEN_STABLE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_hwmode_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_HWMODE_EN_MASK),
		(PMIC_ACCDET_HWMODE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_hwmode_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_HWMODE_SEL_MASK),
		(PMIC_ACCDET_HWMODE_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_plug_out_detect(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_PLUG_OUT_DETECT_MASK),
		(PMIC_ACCDET_PLUG_OUT_DETECT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_reverse(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_EINT0_REVERSE_MASK),
		(PMIC_ACCDET_EINT0_REVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_reverse(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_EINT1_REVERSE_MASK),
		(PMIC_ACCDET_EINT1_REVERSE_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_hwmode_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_EINT_HWMODE_EN_MASK),
		(PMIC_ACCDET_EINT_HWMODE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_plug_out_bypass_deb(
	unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_EINT_PLUG_OUT_BYPASS_DEB_MASK),
		(PMIC_ACCDET_EINT_PLUG_OUT_BYPASS_DEB_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_m_plug_in_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_EINT_M_PLUG_IN_EN_MASK),
		(PMIC_ACCDET_EINT_M_PLUG_IN_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_m_hwmode_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON20),
		(val),
		(PMIC_ACCDET_EINT_M_HWMODE_EN_MASK),
		(PMIC_ACCDET_EINT_M_HWMODE_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_cmpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_TEST_CMPEN_MASK),
		(PMIC_ACCDET_TEST_CMPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_vthen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_TEST_VTHEN_MASK),
		(PMIC_ACCDET_TEST_VTHEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_mbiasen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_TEST_MBIASEN_MASK),
		(PMIC_ACCDET_TEST_MBIASEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_EN_MASK),
		(PMIC_ACCDET_EINT_TEST_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_inven(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_INVEN_MASK),
		(PMIC_ACCDET_EINT_TEST_INVEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_cmpen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_CMPEN_MASK),
		(PMIC_ACCDET_EINT_TEST_CMPEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_cmpmen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_CMPMEN_MASK),
		(PMIC_ACCDET_EINT_TEST_CMPMEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_cturbo(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_CTURBO_MASK),
		(PMIC_ACCDET_EINT_TEST_CTURBO_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_cen(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_CEN_MASK),
		(PMIC_ACCDET_EINT_TEST_CEN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_b(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_TEST_B_MASK),
		(PMIC_ACCDET_TEST_B_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_test_a(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_TEST_A_MASK),
		(PMIC_ACCDET_TEST_A_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_cmpout(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_CMPOUT_MASK),
		(PMIC_ACCDET_EINT_TEST_CMPOUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_cmpmout(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_CMPMOUT_MASK),
		(PMIC_ACCDET_EINT_TEST_CMPMOUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_test_invout(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON21),
		(val),
		(PMIC_ACCDET_EINT_TEST_INVOUT_MASK),
		(PMIC_ACCDET_EINT_TEST_INVOUT_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_cmpen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_CMPEN_SEL_MASK),
		(PMIC_ACCDET_CMPEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_vthen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_VTHEN_SEL_MASK),
		(PMIC_ACCDET_VTHEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_mbiasen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_MBIASEN_SEL_MASK),
		(PMIC_ACCDET_MBIASEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_en_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_EN_SEL_MASK),
		(PMIC_ACCDET_EINT_EN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_inven_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_INVEN_SEL_MASK),
		(PMIC_ACCDET_EINT_INVEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_CMPEN_SEL_MASK),
		(PMIC_ACCDET_EINT_CMPEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpmen_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_CMPMEN_SEL_MASK),
		(PMIC_ACCDET_EINT_CMPMEN_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cturbo_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_CTURBO_SEL_MASK),
		(PMIC_ACCDET_EINT_CTURBO_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_b_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_B_SEL_MASK),
		(PMIC_ACCDET_B_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_a_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_A_SEL_MASK),
		(PMIC_ACCDET_A_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpout_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_CMPOUT_SEL_MASK),
		(PMIC_ACCDET_EINT_CMPOUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_cmpmout_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_CMPMOUT_SEL_MASK),
		(PMIC_ACCDET_EINT_CMPMOUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint_invout_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON22),
		(val),
		(PMIC_ACCDET_EINT_INVOUT_SEL_MASK),
		(PMIC_ACCDET_EINT_INVOUT_SEL_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_cmpen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_CMPEN_SW_MASK),
		(PMIC_ACCDET_CMPEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_vthen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_VTHEN_SW_MASK),
		(PMIC_ACCDET_VTHEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_mbiasen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_MBIASEN_SW_MASK),
		(PMIC_ACCDET_MBIASEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT0_EN_SW_MASK),
		(PMIC_ACCDET_EINT0_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_inven_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT0_INVEN_SW_MASK),
		(PMIC_ACCDET_EINT0_INVEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT0_CMPEN_SW_MASK),
		(PMIC_ACCDET_EINT0_CMPEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpmen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT0_CMPMEN_SW_MASK),
		(PMIC_ACCDET_EINT0_CMPMEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cturbo_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT0_CTURBO_SW_MASK),
		(PMIC_ACCDET_EINT0_CTURBO_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_en_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT1_EN_SW_MASK),
		(PMIC_ACCDET_EINT1_EN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_inven_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT1_INVEN_SW_MASK),
		(PMIC_ACCDET_EINT1_INVEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT1_CMPEN_SW_MASK),
		(PMIC_ACCDET_EINT1_CMPEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpmen_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT1_CMPMEN_SW_MASK),
		(PMIC_ACCDET_EINT1_CMPMEN_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cturbo_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON23),
		(val),
		(PMIC_ACCDET_EINT1_CTURBO_SW_MASK),
		(PMIC_ACCDET_EINT1_CTURBO_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_b_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_B_SW_MASK),
		(PMIC_ACCDET_B_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_a_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_A_SW_MASK),
		(PMIC_ACCDET_A_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpout_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_EINT0_CMPOUT_SW_MASK),
		(PMIC_ACCDET_EINT0_CMPOUT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_cmpmout_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_EINT0_CMPMOUT_SW_MASK),
		(PMIC_ACCDET_EINT0_CMPMOUT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint0_invout_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_EINT0_INVOUT_SW_MASK),
		(PMIC_ACCDET_EINT0_INVOUT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpout_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_EINT1_CMPOUT_SW_MASK),
		(PMIC_ACCDET_EINT1_CMPOUT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_cmpmout_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_EINT1_CMPMOUT_SW_MASK),
		(PMIC_ACCDET_EINT1_CMPMOUT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_eint1_invout_sw(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON24),
		(val),
		(PMIC_ACCDET_EINT1_INVOUT_SW_MASK),
		(PMIC_ACCDET_EINT1_INVOUT_SW_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_get_ad_audaccdetcmpob(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_AD_AUDACCDETCMPOB_MASK),
		(PMIC_AD_AUDACCDETCMPOB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_audaccdetcmpoa(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_AD_AUDACCDETCMPOA_MASK),
		(PMIC_AD_AUDACCDETCMPOA_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_cur_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_ACCDET_CUR_IN_MASK),
		(PMIC_ACCDET_CUR_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_sam_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_ACCDET_SAM_IN_MASK),
		(PMIC_ACCDET_SAM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_mem_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_ACCDET_MEM_IN_MASK),
		(PMIC_ACCDET_MEM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_ACCDET_STATE_MASK),
		(PMIC_ACCDET_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetmbiasclk(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_DA_AUDACCDETMBIASCLK_MASK),
		(PMIC_DA_AUDACCDETMBIASCLK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetvthclk(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_DA_AUDACCDETVTHCLK_MASK),
		(PMIC_DA_AUDACCDETVTHCLK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetcmpclk(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_DA_AUDACCDETCMPCLK_MASK),
		(PMIC_DA_AUDACCDETCMPCLK_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetauxadcswctrl(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON25),
		(&val),
		(PMIC_DA_AUDACCDETAUXADCSWCTRL_MASK),
		(PMIC_DA_AUDACCDETAUXADCSWCTRL_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint0cmpmout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_AD_EINT0CMPMOUT_MASK),
		(PMIC_AD_EINT0CMPMOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint0cmpout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_AD_EINT0CMPOUT_MASK),
		(PMIC_AD_EINT0CMPOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_cur_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_ACCDET_EINT0_CUR_IN_MASK),
		(PMIC_ACCDET_EINT0_CUR_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_sam_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_ACCDET_EINT0_SAM_IN_MASK),
		(PMIC_ACCDET_EINT0_SAM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_mem_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_ACCDET_EINT0_MEM_IN_MASK),
		(PMIC_ACCDET_EINT0_MEM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_ACCDET_EINT0_STATE_MASK),
		(PMIC_ACCDET_EINT0_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cmpen(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_DA_EINT0CMPEN_MASK),
		(PMIC_DA_EINT0CMPEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cmpmen(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_DA_EINT0CMPMEN_MASK),
		(PMIC_DA_EINT0CMPMEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cturbo(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON26),
		(&val),
		(PMIC_DA_EINT0CTURBO_MASK),
		(PMIC_DA_EINT0CTURBO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint1cmpmout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_AD_EINT1CMPMOUT_MASK),
		(PMIC_AD_EINT1CMPMOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint1cmpout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_AD_EINT1CMPOUT_MASK),
		(PMIC_AD_EINT1CMPOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_cur_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_ACCDET_EINT1_CUR_IN_MASK),
		(PMIC_ACCDET_EINT1_CUR_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_sam_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_ACCDET_EINT1_SAM_IN_MASK),
		(PMIC_ACCDET_EINT1_SAM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_mem_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_ACCDET_EINT1_MEM_IN_MASK),
		(PMIC_ACCDET_EINT1_MEM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_ACCDET_EINT1_STATE_MASK),
		(PMIC_ACCDET_EINT1_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cmpen(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_DA_EINT1CMPEN_MASK),
		(PMIC_DA_EINT1CMPEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cmpmen(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_DA_EINT1CMPMEN_MASK),
		(PMIC_DA_EINT1CMPMEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cturbo(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON27),
		(&val),
		(PMIC_DA_EINT1CTURBO_MASK),
		(PMIC_DA_EINT1CTURBO_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint0invout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_AD_EINT0INVOUT_MASK),
		(PMIC_AD_EINT0INVOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_inverter_cur_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_ACCDET_EINT0_INVERTER_CUR_IN_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_CUR_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_inverter_sam_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_ACCDET_EINT0_INVERTER_SAM_IN_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_SAM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_inverter_mem_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_ACCDET_EINT0_INVERTER_MEM_IN_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_MEM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_inverter_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_ACCDET_EINT0_INVERTER_STATE_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_DA_EINT0EN_MASK),
		(PMIC_DA_EINT0EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0inven(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_DA_EINT0INVEN_MASK),
		(PMIC_DA_EINT0INVEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cen(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON28),
		(&val),
		(PMIC_DA_EINT0CEN_MASK),
		(PMIC_DA_EINT0CEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint1invout(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_AD_EINT1INVOUT_MASK),
		(PMIC_AD_EINT1INVOUT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_inverter_cur_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_ACCDET_EINT1_INVERTER_CUR_IN_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_CUR_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_inverter_sam_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_ACCDET_EINT1_INVERTER_SAM_IN_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_SAM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_inverter_mem_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_ACCDET_EINT1_INVERTER_MEM_IN_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_MEM_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_inverter_state(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_ACCDET_EINT1_INVERTER_STATE_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_STATE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_DA_EINT1EN_MASK),
		(PMIC_DA_EINT1EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1inven(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_DA_EINT1INVEN_MASK),
		(PMIC_DA_EINT1INVEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cen(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON29),
		(&val),
		(PMIC_DA_EINT1CEN_MASK),
		(PMIC_DA_EINT1CEN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EN_MASK),
		(PMIC_ACCDET_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT0_EN_MASK),
		(PMIC_ACCDET_EINT0_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT1_EN_MASK),
		(PMIC_ACCDET_EINT1_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_m_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT0_M_EN_MASK),
		(PMIC_ACCDET_EINT0_M_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_detect_moisture(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT0_DETECT_MOISTURE_MASK),
		(PMIC_ACCDET_EINT0_DETECT_MOISTURE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_plug_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT0_PLUG_IN_MASK),
		(PMIC_ACCDET_EINT0_PLUG_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_m_plug_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT0_M_PLUG_IN_MASK),
		(PMIC_ACCDET_EINT0_M_PLUG_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_m_en(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT1_M_EN_MASK),
		(PMIC_ACCDET_EINT1_M_EN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_detect_moisture(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT1_DETECT_MOISTURE_MASK),
		(PMIC_ACCDET_EINT1_DETECT_MOISTURE_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_plug_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT1_PLUG_IN_MASK),
		(PMIC_ACCDET_EINT1_PLUG_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_m_plug_in(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON30),
		(&val),
		(PMIC_ACCDET_EINT1_M_PLUG_IN_MASK),
		(PMIC_ACCDET_EINT1_M_PLUG_IN_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_cur_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON31),
		(&val),
		(PMIC_ACCDET_CUR_DEB_MASK),
		(PMIC_ACCDET_CUR_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_cur_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON32),
		(&val),
		(PMIC_ACCDET_EINT0_CUR_DEB_MASK),
		(PMIC_ACCDET_EINT0_CUR_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_cur_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON33),
		(&val),
		(PMIC_ACCDET_EINT1_CUR_DEB_MASK),
		(PMIC_ACCDET_EINT1_CUR_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_inverter_cur_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON34),
		(&val),
		(PMIC_ACCDET_EINT0_INVERTER_CUR_DEB_MASK),
		(PMIC_ACCDET_EINT0_INVERTER_CUR_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_inverter_cur_deb(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON35),
		(&val),
		(PMIC_ACCDET_EINT1_INVERTER_CUR_DEB_MASK),
		(PMIC_ACCDET_EINT1_INVERTER_CUR_DEB_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_audaccdetcmpob_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_AUDACCDETCMPOB_MON_MASK),
		(PMIC_AD_AUDACCDETCMPOB_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_audaccdetcmpoa_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_AUDACCDETCMPOA_MON_MASK),
		(PMIC_AD_AUDACCDETCMPOA_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint0cmpmout_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_EINT0CMPMOUT_MON_MASK),
		(PMIC_AD_EINT0CMPMOUT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint0cmpout_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_EINT0CMPOUT_MON_MASK),
		(PMIC_AD_EINT0CMPOUT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint0invout_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_EINT0INVOUT_MON_MASK),
		(PMIC_AD_EINT0INVOUT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint1cmpmout_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_EINT1CMPMOUT_MON_MASK),
		(PMIC_AD_EINT1CMPMOUT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint1cmpout_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_EINT1CMPOUT_MON_MASK),
		(PMIC_AD_EINT1CMPOUT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_ad_eint1invout_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON36),
		(&val),
		(PMIC_AD_EINT1INVOUT_MON_MASK),
		(PMIC_AD_EINT1INVOUT_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetcmpclk_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON37),
		(&val),
		(PMIC_DA_AUDACCDETCMPCLK_MON_MASK),
		(PMIC_DA_AUDACCDETCMPCLK_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetvthclk_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON37),
		(&val),
		(PMIC_DA_AUDACCDETVTHCLK_MON_MASK),
		(PMIC_DA_AUDACCDETVTHCLK_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetmbiasclk_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON37),
		(&val),
		(PMIC_DA_AUDACCDETMBIASCLK_MON_MASK),
		(PMIC_DA_AUDACCDETMBIASCLK_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_audaccdetauxadcswctrl_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON37),
		(&val),
		(PMIC_DA_AUDACCDETAUXADCSWCTRL_MON_MASK),
		(PMIC_DA_AUDACCDETAUXADCSWCTRL_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cturbo_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT0CTURBO_MON_MASK),
		(PMIC_DA_EINT0CTURBO_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cmpmen_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT0CMPMEN_MON_MASK),
		(PMIC_DA_EINT0CMPMEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cmpen_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT0CMPEN_MON_MASK),
		(PMIC_DA_EINT0CMPEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0inven_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT0INVEN_MON_MASK),
		(PMIC_DA_EINT0INVEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0cen_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT0CEN_MON_MASK),
		(PMIC_DA_EINT0CEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint0en_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT0EN_MON_MASK),
		(PMIC_DA_EINT0EN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cturbo_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT1CTURBO_MON_MASK),
		(PMIC_DA_EINT1CTURBO_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cmpmen_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT1CMPMEN_MON_MASK),
		(PMIC_DA_EINT1CMPMEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cmpen_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT1CMPEN_MON_MASK),
		(PMIC_DA_EINT1CMPEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1inven_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT1INVEN_MON_MASK),
		(PMIC_DA_EINT1INVEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1cen_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT1CEN_MON_MASK),
		(PMIC_DA_EINT1CEN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_da_eint1en_mon(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON38),
		(&val),
		(PMIC_DA_EINT1EN_MON_MASK),
		(PMIC_DA_EINT1EN_MON_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint0_m_plug_in_count(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON39),
		(&val),
		(PMIC_ACCDET_EINT0_M_PLUG_IN_COUNT_MASK),
		(PMIC_ACCDET_EINT0_M_PLUG_IN_COUNT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_get_accdet_eint1_m_plug_in_count(void)
{
	unsigned int ret = 0;
	unsigned int val = 0;

	ret = pmic_read_interface(
		(MT6359_ACCDET_CON39),
		(&val),
		(PMIC_ACCDET_EINT1_M_PLUG_IN_COUNT_MASK),
		(PMIC_ACCDET_EINT1_M_PLUG_IN_COUNT_SHIFT)
		);

	return val;
}

unsigned int mt6359_upmu_set_accdet_mon_flag_en(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON40),
		(val),
		(PMIC_ACCDET_MON_FLAG_EN_MASK),
		(PMIC_ACCDET_MON_FLAG_EN_SHIFT)
			);

	return ret;
}

unsigned int mt6359_upmu_set_accdet_mon_flag_sel(unsigned int val)
{
	unsigned int ret = 0;

	ret = pmic_config_interface(
		(MT6359_ACCDET_CON40),
		(val),
		(PMIC_ACCDET_MON_FLAG_SEL_MASK),
		(PMIC_ACCDET_MON_FLAG_SEL_SHIFT)
			);

	return ret;
}

/* For Multi-user VOSEL API */
unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_lp(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_lp(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_lp(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_lp();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_lp(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_lp(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_lp(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_lp();
}

unsigned int mt6359_upmu_set_rg_vcn33_1_bt_vosel(
	unsigned int val)
{
	return mt6359_upmu_set_rg_vcn33_1_vosel(val);
}

unsigned int mt6359_upmu_get_rg_vcn33_1_bt_vosel(void)
{
	return mt6359_upmu_get_rg_vcn33_1_vosel();
}

unsigned int mt6359_upmu_set_rg_vcn33_1_wifi_vosel(
	unsigned int val)
{
	return mt6359_upmu_set_rg_vcn33_1_vosel(val);
}

unsigned int mt6359_upmu_get_rg_vcn33_1_wifi_vosel(void)
{
	return mt6359_upmu_get_rg_vcn33_1_vosel();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_op_mode(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_op_mode(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_op_mode(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_op_mode();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_op_mode(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_op_mode(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_op_mode(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_op_mode();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_dummy_load(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_dummy_load(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_1_dummy_load();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_dummy_load(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_dummy_load(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_1_dummy_load();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_lp(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_lp(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_lp(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_lp();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_lp(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_lp(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_lp(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_lp();
}

unsigned int mt6359_upmu_set_rg_vcn33_2_bt_vosel(
	unsigned int val)
{
	return mt6359_upmu_set_rg_vcn33_2_vosel(val);
}

unsigned int mt6359_upmu_get_rg_vcn33_2_bt_vosel(void)
{
	return mt6359_upmu_get_rg_vcn33_2_vosel();
}

unsigned int mt6359_upmu_set_rg_vcn33_2_wifi_vosel(
	unsigned int val)
{
	return mt6359_upmu_set_rg_vcn33_2_vosel(val);
}

unsigned int mt6359_upmu_get_rg_vcn33_2_wifi_vosel(void)
{
	return mt6359_upmu_get_rg_vcn33_2_vosel();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_op_mode(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_op_mode(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_op_mode(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_op_mode();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_op_mode(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_op_mode(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_op_mode(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_op_mode();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_dummy_load(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_dummy_load(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_2_dummy_load();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_dummy_load(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_dummy_load(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_2_dummy_load();
}

/* For Multi-user HW EN API */
unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw0_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw0_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw0_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw0_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw0_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw0_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw0_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw0_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw1_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw1_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw1_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw1_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw1_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw1_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw1_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw1_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw2_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw2_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw2_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw2_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw2_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw2_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw2_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw2_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw3_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw3_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw3_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw3_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw3_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw3_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw3_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw3_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw4_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw4_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw4_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw4_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw4_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw4_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw4_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw4_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw5_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw5_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw5_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw5_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw5_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw5_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw5_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw5_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw6_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw6_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw6_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw6_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw6_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw6_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw6_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw6_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw7_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw7_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw7_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw7_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw7_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw7_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw7_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw7_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw8_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw8_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw8_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw8_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw8_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw8_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw8_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw8_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw9_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw9_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw9_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw9_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw9_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw9_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw9_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw9_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw10_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw10_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw10_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw10_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw10_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw10_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw10_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw10_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw11_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw11_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw11_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw11_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw11_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw11_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw11_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw11_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw12_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw12_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw12_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw12_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw12_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw12_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw12_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw12_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw13_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw13_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw13_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw13_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw13_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw13_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw13_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw13_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw14_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw14_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw14_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw14_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw14_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw14_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw14_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw14_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw0_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw0_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw0_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw0_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw0_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw0_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw0_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw0_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw1_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw1_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw1_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw1_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw1_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw1_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw1_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw1_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw2_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw2_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw2_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw2_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw2_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw2_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw2_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw2_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw3_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw3_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw3_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw3_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw3_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw3_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw3_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw3_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw4_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw4_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw4_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw4_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw4_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw4_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw4_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw4_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw5_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw5_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw5_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw5_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw5_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw5_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw5_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw5_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw6_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw6_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw6_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw6_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw6_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw6_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw6_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw6_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw7_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw7_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw7_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw7_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw7_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw7_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw7_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw7_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw8_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw8_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw8_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw8_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw8_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw8_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw8_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw8_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw9_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw9_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw9_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw9_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw9_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw9_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw9_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw9_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw10_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw10_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw10_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw10_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw10_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw10_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw10_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw10_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw11_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw11_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw11_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw11_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw11_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw11_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw11_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw11_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw12_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw12_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw12_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw12_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw12_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw12_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw12_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw12_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw13_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw13_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw13_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw13_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw13_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw13_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw13_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw13_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw14_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw14_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw14_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw14_op_en();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw14_op_en(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw14_op_en(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw14_op_en(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw14_op_en();
}

/* For Multi-user HW CFG API */
unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw0_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw0_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw0_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw0_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw0_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw0_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw0_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw0_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw1_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw1_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw1_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw1_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw1_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw1_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw1_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw1_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw2_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw2_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw2_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw2_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw2_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw2_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw2_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw2_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw3_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw3_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw3_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw3_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw3_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw3_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw3_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw3_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw4_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw4_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw4_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw4_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw4_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw4_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw4_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw4_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw5_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw5_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw5_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw5_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw5_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw5_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw5_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw5_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw6_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw6_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw6_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw6_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw6_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw6_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw6_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw6_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw7_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw7_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw7_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw7_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw7_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw7_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw7_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw7_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw8_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw8_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw8_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw8_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw8_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw8_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw8_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw8_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw9_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw9_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw9_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw9_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw9_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw9_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw9_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw9_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw10_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw10_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw10_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw10_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw10_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw10_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw10_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw10_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw11_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw11_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw11_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw11_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw11_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw11_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw11_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw11_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw12_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw12_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw12_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw12_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw12_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw12_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw12_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw12_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw13_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw13_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw13_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw13_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw13_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw13_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw13_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw13_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_bt_hw14_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw14_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_bt_hw14_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw14_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_1_wifi_hw14_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_1_hw14_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_1_wifi_hw14_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_1_hw14_op_cfg();
}

/* For Multi-user HW CFG API */
unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw0_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw0_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw0_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw0_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw0_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw0_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw0_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw0_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw1_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw1_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw1_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw1_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw1_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw1_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw1_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw1_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw2_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw2_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw2_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw2_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw2_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw2_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw2_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw2_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw3_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw3_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw3_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw3_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw3_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw3_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw3_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw3_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw4_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw4_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw4_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw4_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw4_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw4_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw4_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw4_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw5_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw5_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw5_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw5_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw5_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw5_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw5_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw5_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw6_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw6_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw6_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw6_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw6_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw6_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw6_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw6_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw7_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw7_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw7_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw7_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw7_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw7_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw7_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw7_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw8_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw8_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw8_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw8_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw8_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw8_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw8_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw8_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw9_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw9_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw9_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw9_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw9_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw9_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw9_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw9_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw10_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw10_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw10_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw10_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw10_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw10_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw10_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw10_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw11_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw11_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw11_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw11_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw11_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw11_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw11_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw11_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw12_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw12_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw12_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw12_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw12_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw12_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw12_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw12_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw13_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw13_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw13_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw13_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw13_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw13_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw13_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw13_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_bt_hw14_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw14_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_bt_hw14_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw14_op_cfg();
}

unsigned int mt6359_upmu_set_rg_ldo_vcn33_2_wifi_hw14_op_cfg(
	unsigned int val)
{
	return mt6359_upmu_set_rg_ldo_vcn33_2_hw14_op_cfg(val);
}

unsigned int mt6359_upmu_get_rg_ldo_vcn33_2_wifi_hw14_op_cfg(void)
{
	return mt6359_upmu_get_rg_ldo_vcn33_2_hw14_op_cfg();
}

/* For Multi-user DA EN API */
unsigned int mt6359_upmu_get_da_vcn33_1_bt_b_en(void)
{
	return mt6359_upmu_get_da_vcn33_1_b_en();
}

unsigned int mt6359_upmu_get_da_vcn33_1_wifi_b_en(void)
{
	return mt6359_upmu_get_da_vcn33_1_b_en();
}

unsigned int mt6359_upmu_get_da_vcn33_1_bt_b_stb(void)
{
	return mt6359_upmu_get_da_vcn33_1_b_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_1_wifi_b_stb(void)
{
	return mt6359_upmu_get_da_vcn33_1_b_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_1_bt_b_lp(void)
{
	return mt6359_upmu_get_da_vcn33_1_b_lp();
}

unsigned int mt6359_upmu_get_da_vcn33_1_wifi_b_lp(void)
{
	return mt6359_upmu_get_da_vcn33_1_b_lp();
}

unsigned int mt6359_upmu_get_da_vcn33_1_bt_l_en(void)
{
	return mt6359_upmu_get_da_vcn33_1_l_en();
}

unsigned int mt6359_upmu_get_da_vcn33_1_wifi_l_en(void)
{
	return mt6359_upmu_get_da_vcn33_1_l_en();
}

unsigned int mt6359_upmu_get_da_vcn33_1_bt_l_stb(void)
{
	return mt6359_upmu_get_da_vcn33_1_l_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_1_wifi_l_stb(void)
{
	return mt6359_upmu_get_da_vcn33_1_l_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_1_bt_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_1_dummy_load();
}

unsigned int mt6359_upmu_get_da_vcn33_1_wifi_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_1_dummy_load();
}

unsigned int mt6359_upmu_get_da_vcn33_2_bt_b_en(void)
{
	return mt6359_upmu_get_da_vcn33_2_b_en();
}

unsigned int mt6359_upmu_get_da_vcn33_2_wifi_b_en(void)
{
	return mt6359_upmu_get_da_vcn33_2_b_en();
}

unsigned int mt6359_upmu_get_da_vcn33_2_bt_b_stb(void)
{
	return mt6359_upmu_get_da_vcn33_2_b_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_2_wifi_b_stb(void)
{
	return mt6359_upmu_get_da_vcn33_2_b_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_2_bt_b_lp(void)
{
	return mt6359_upmu_get_da_vcn33_2_b_lp();
}

unsigned int mt6359_upmu_get_da_vcn33_2_wifi_b_lp(void)
{
	return mt6359_upmu_get_da_vcn33_2_b_lp();
}

unsigned int mt6359_upmu_get_da_vcn33_2_bt_l_en(void)
{
	return mt6359_upmu_get_da_vcn33_2_l_en();
}

unsigned int mt6359_upmu_get_da_vcn33_2_wifi_l_en(void)
{
	return mt6359_upmu_get_da_vcn33_2_l_en();
}

unsigned int mt6359_upmu_get_da_vcn33_2_bt_l_stb(void)
{
	return mt6359_upmu_get_da_vcn33_2_l_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_2_wifi_l_stb(void)
{
	return mt6359_upmu_get_da_vcn33_2_l_stb();
}

unsigned int mt6359_upmu_get_da_vcn33_2_bt_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_2_dummy_load();
}

unsigned int mt6359_upmu_get_da_vcn33_2_wifi_dummy_load(void)
{
	return mt6359_upmu_get_da_vcn33_2_dummy_load();
}