727 lines
21 KiB
C
727 lines
21 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2022 Southchip Semiconductor Technology(Shanghai) Co., Ltd.
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*/
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#ifndef __SC8551_HEADER__
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#define __SC8551_HEADER__
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enum {
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/* sc8551 */
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POWER_SUPPLY_PROP_SC_BUS_VOLTAGE = 200,
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POWER_SUPPLY_PROP_SC_BUS_CURRENT,
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POWER_SUPPLY_PROP_SC_BUS_TEMPERATURE,
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POWER_SUPPLY_PROP_SC_VBUS_PRESENT,
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POWER_SUPPLY_PROP_SC_VBUS_ERROR_STATUS,
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POWER_SUPPLY_PROP_SC_BATTERY_PRESENT,
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POWER_SUPPLY_PROP_SC_BATTERY_VOLTAGE,
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POWER_SUPPLY_PROP_SC_BATTERY_CURRENT,
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POWER_SUPPLY_PROP_SC_BATTERY_TEMPERATURE,
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POWER_SUPPLY_PROP_SC_ALARM_STATUS,
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POWER_SUPPLY_PROP_SC_FAULT_STATUS,
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POWER_SUPPLY_PROP_SC_DIE_TEMPERATURE,
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};
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/* Register 00h */
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#define SC8551_REG_00 0x00
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#define SC8551_BAT_OVP_DIS_MASK 0x80
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#define SC8551_BAT_OVP_DIS_SHIFT 7
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#define SC8551_BAT_OVP_ENABLE 0
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#define SC8551_BAT_OVP_DISABLE 1
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#define SC8551_BAT_OVP_MASK 0x3F
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#define SC8551_BAT_OVP_SHIFT 0
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#define SC8551_BAT_OVP_BASE 3500
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#define SC8551_BAT_OVP_LSB 25
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/* Register 01h */
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#define SC8551_REG_01 0x01
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#define SC8551_BAT_OVP_ALM_DIS_MASK 0x80
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#define SC8551_BAT_OVP_ALM_DIS_SHIFT 7
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#define SC8551_BAT_OVP_ALM_ENABLE 0
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#define SC8551_BAT_OVP_ALM_DISABLE 1
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#define SC8551_BAT_OVP_ALM_MASK 0x3F
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#define SC8551_BAT_OVP_ALM_SHIFT 0
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#define SC8551_BAT_OVP_ALM_BASE 3500
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#define SC8551_BAT_OVP_ALM_LSB 25
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/* Register 02h */
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#define SC8551_REG_02 0x02
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#define SC8551_BAT_OCP_DIS_MASK 0x80
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#define SC8551_BAT_OCP_DIS_SHIFT 7
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#define SC8551_BAT_OCP_ENABLE 0
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#define SC8551_BAT_OCP_DISABLE 1
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#define SC8551_BAT_OCP_MASK 0x7F
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#define SC8551_BAT_OCP_SHIFT 0
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#define SC8551_BAT_OCP_BASE 2000
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#define SC8551_BAT_OCP_LSB 100
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/* Register 03h */
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#define SC8551_REG_03 0x03
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#define SC8551_BAT_OCP_ALM_DIS_MASK 0x80
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#define SC8551_BAT_OCP_ALM_DIS_SHIFT 7
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#define SC8551_BAT_OCP_ALM_ENABLE 0
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#define SC8551_BAT_OCP_ALM_DISABLE 1
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#define SC8551_BAT_OCP_ALM_MASK 0x7F
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#define SC8551_BAT_OCP_ALM_SHIFT 0
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#define SC8551_BAT_OCP_ALM_BASE 2000
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#define SC8551_BAT_OCP_ALM_LSB 100
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/* Register 04h */
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#define SC8551_REG_04 0x04
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#define SC8551_BAT_UCP_ALM_DIS_MASK 0x80
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#define SC8551_BAT_UCP_ALM_DIS_SHIFT 7
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#define SC8551_BAT_UCP_ALM_ENABLE 0
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#define SC8551_BAT_UCP_ALM_DISABLE 1
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#define SC8551_BAT_UCP_ALM_MASK 0x7F
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#define SC8551_BAT_UCP_ALM_SHIFT 0
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#define SC8551_BAT_UCP_ALM_BASE 0
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#define SC8551_BAT_UCP_ALM_LSB 50
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/* Register 05h */
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#define SC8551_REG_05 0x05
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#define SC8551_AC_OVP_STAT_MASK 0x80
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#define SC8551_AC_OVP_STAT_SHIFT 7
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#define SC8551_AC_OVP_FLAG_MASK 0x40
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#define SC8551_AC_OVP_FLAG_SHIFT 6
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#define SC8551_AC_OVP_MASK_MASK 0x20
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#define SC8551_AC_OVP_MASK_SHIFT 5
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#define SC8551_VDROP_THRESHOLD_SET_MASK 0x10
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#define SC8551_VDROP_THRESHOLD_SET_SHIFT 4
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#define SC8551_VDROP_THRESHOLD_300MV 0
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#define SC8551_VDROP_THRESHOLD_400MV 1
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#define SC8551_VDROP_DEGLITCH_SET_MASK 0x08
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#define SC8551_VDROP_DEGLITCH_SET_SHIFT 3
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#define SC8551_VDROP_DEGLITCH_8US 0
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#define SC8551_VDROP_DEGLITCH_5MS 1
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#define SC8551_AC_OVP_MASK 0x07
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#define SC8551_AC_OVP_SHIFT 0
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#define SC8551_AC_OVP_BASE 11
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#define SC8551_AC_OVP_LSB 1
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#define SC8551_AC_OVP_6P5V 65
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/* Register 06h */
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#define SC8551_REG_06 0x06
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#define SC8551_VBUS_PD_EN_MASK 0x80
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#define SC8551_VBUS_PD_EN_SHIFT 7
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#define SC8551_VBUS_PD_ENABLE 1
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#define SC8551_VBUS_PD_DISABLE 0
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#define SC8551_BUS_OVP_MASK 0x7F
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#define SC8551_BUS_OVP_SHIFT 0
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#define SC8551_BUS_OVP_BASE 6000
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#define SC8551_BUS_OVP_LSB 50
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/* Register 07h */
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#define SC8551_REG_07 0x07
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#define SC8551_BUS_OVP_ALM_DIS_MASK 0x80
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#define SC8551_BUS_OVP_ALM_DIS_SHIFT 7
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#define SC8551_BUS_OVP_ALM_ENABLE 0
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#define SC8551_BUS_OVP_ALM_DISABLE 1
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#define SC8551_BUS_OVP_ALM_MASK 0x7F
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#define SC8551_BUS_OVP_ALM_SHIFT 0
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#define SC8551_BUS_OVP_ALM_BASE 6000
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#define SC8551_BUS_OVP_ALM_LSB 50
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/* Register 08h */
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#define SC8551_REG_08 0x08
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#define SC8551_BUS_OCP_DIS_MASK 0x80
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#define SC8551_BUS_OCP_DIS_SHIFT 7
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#define SC8551_BUS_OCP_ENABLE 0
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#define SC8551_BUS_OCP_DISABLE 1
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#define SC8551_IBUS_UCP_RISE_FLAG_MASK 0x40
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#define SC8551_IBUS_UCP_RISE_FLAG_SHIFT 6
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#define SC8551_IBUS_UCP_RISE_MASK_MASK 0x20
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#define SC8551_IBUS_UCP_RISE_MASK_SHIFT 5
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#define SC8551_IBUS_UCP_RISE_MASK_ENABLE 1
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#define SC8551_IBUS_UCP_RISE_MASK_DISABLE 0
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#define SC8551_IBUS_UCP_FALL_FLAG_MASK 0x10
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#define SC8551_IBUS_UCP_FALL_FLAG_SHIFT 4
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#define SC8551_BUS_OCP_MASK 0x0F
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#define SC8551_BUS_OCP_SHIFT 0
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#define SC8551_BUS_OCP_BASE 1000
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#define SC8551_BUS_OCP_LSB 250
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/* Register 09h */
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#define SC8551_REG_09 0x09
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#define SC8551_BUS_OCP_ALM_DIS_MASK 0x80
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#define SC8551_BUS_OCP_ALM_DIS_SHIFT 7
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#define SC8551_BUS_OCP_ALM_ENABLE 0
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#define SC8551_BUS_OCP_ALM_DISABLE 1
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#define SC8551_BUS_OCP_ALM_MASK 0x7F
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#define SC8551_BUS_OCP_ALM_SHIFT 0
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#define SC8551_BUS_OCP_ALM_BASE 0
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#define SC8551_BUS_OCP_ALM_LSB 50
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/* Register 0Ah */
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#define SC8551_REG_0A 0x0A
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#define SC8551_TSHUT_FLAG_MASK 0x80
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#define SC8551_TSHUT_FLAG_SHIFT 7
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#define SC8551_TSHUT_STAT_MASK 0x40
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#define SC8551_TSHUT_STAT_SHIFT 6
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#define SC8551_VBUS_ERRORLO_STAT_MASK 0x20
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#define SC8551_VBUS_ERRORLO_STAT_SHIFT 5
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#define SC8551_VBUS_ERRORHI_STAT_MASK 0x10
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#define SC8551_VBUS_ERRORHI_STAT_SHIFT 4
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#define SC8551_SS_TIMEOUT_FLAG_MASK 0x08
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#define SC8551_SS_TIMEOUT_FLAG_SHIFT 3
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#define SC8551_CONV_SWITCHING_STAT_MASK 0x04
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#define SC8551_CONV_SWITCHING_STAT_SHIFT 2
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#define SC8551_CONV_OCP_FLAG_MASK 0x02
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#define SC8551_CONV_OCP_FLAG_SHIFT 1
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#define SC8551_PIN_DIAG_FALL_FLAG_MASK 0x01
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#define SC8551_PIN_DIAG_FALL_FLAG_SHIFT 0
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/* Register 0Bh */
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#define SC8551_REG_0B 0x0B
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#define SC8551_REG_RST_MASK 0x80
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#define SC8551_REG_RST_SHIFT 7
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#define SC8551_REG_RST_ENABLE 1
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#define SC8551_REG_RST_DISABLE 0
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#define SC8551_FSW_SET_MASK 0x70
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#define SC8551_FSW_SET_SHIFT 4
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#define SC8551_FSW_SET_300KHZ 0
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#define SC8551_FSW_SET_350KHZ 1
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#define SC8551_FSW_SET_400KHZ 2
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#define SC8551_FSW_SET_450KHZ 3
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#define SC8551_FSW_SET_500KHZ 4
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#define SC8551_FSW_SET_550KHZ 5
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#define SC8551_FSW_SET_600KHZ 6
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#define SC8551_FSW_SET_750KHZ 7
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#define SC8551_WD_TIMEOUT_FLAG_MASK 0x08
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#define SC8551_WD_TIMEOUT_SHIFT 3
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#define SC8551_WATCHDOG_DIS_MASK 0x04
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#define SC8551_WATCHDOG_DIS_SHIFT 2
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#define SC8551_WATCHDOG_ENABLE 0
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#define SC8551_WATCHDOG_DISABLE 1
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#define SC8551_WATCHDOG_MASK 0x03
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#define SC8551_WATCHDOG_SHIFT 0
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#define SC8551_WATCHDOG_0P5S 0
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#define SC8551_WATCHDOG_1S 1
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#define SC8551_WATCHDOG_5S 2
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#define SC8551_WATCHDOG_30S 3
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/* Register 0Ch */
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#define SC8551_REG_0C 0x0C
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#define SC8551_CHG_EN_MASK 0x80
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#define SC8551_CHG_EN_SHIFT 7
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#define SC8551_CHG_ENABLE 1
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#define SC8551_CHG_DISABLE 0
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#define SC8551_MS_MASK 0x60
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#define SC8551_MS_SHIFT 5
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#define SC8551_MS_STANDALONE 0
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#define SC8551_MS_SLAVE 1
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#define SC8551_MS_MASTER 2
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#define SC8551_FREQ_SHIFT_MASK 0x18
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#define SC8551_FREQ_SHIFT_SHIFT 3
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#define SC8551_FREQ_SHIFT_NORMINAL 0
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#define SC8551_FREQ_SHIFT_POSITIVE10 1
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#define SC8551_FREQ_SHIFT_NEGATIVE10 2
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#define SC8551_FREQ_SHIFT_SPREAD_SPECTRUM 3
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#define SC8551_TSBUS_DIS_MASK 0x04
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#define SC8551_TSBUS_DIS_SHIFT 2
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#define SC8551_TSBUS_ENABLE 0
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#define SC8551_TSBUS_DISABLE 1
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#define SC8551_TSBAT_DIS_MASK 0x02
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#define SC8551_TSBAT_DIS_SHIFT 1
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#define SC8551_TSBAT_ENABLE 0
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#define SC8551_TSBAT_DISABLE 1
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/* Register 0Dh */
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#define SC8551_REG_0D 0x0D
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#define SC8551_BAT_OVP_ALM_STAT_MASK 0x80
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#define SC8551_BAT_OVP_ALM_STAT_SHIFT 7
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#define SC8551_BAT_OCP_ALM_STAT_MASK 0x40
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#define SC8551_BAT_OCP_ALM_STAT_SHIFT 6
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#define SC8551_BUS_OVP_ALM_STAT_MASK 0x20
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#define SC8551_BUS_OVP_ALM_STAT_SHIFT 5
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#define SC8551_BUS_OCP_ALM_STAT_MASK 0x10
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#define SC8551_BUS_OCP_ALM_STAT_SHIFT 4
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#define SC8551_BAT_UCP_ALM_STAT_MASK 0x08
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#define SC8551_BAT_UCP_ALM_STAT_SHIFT 3
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#define SC8551_ADAPTER_INSERT_STAT_MASK 0x04
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#define SC8551_ADAPTER_INSERT_STAT_SHIFT 2
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#define SC8551_VBAT_INSERT_STAT_MASK 0x02
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#define SC8551_VBAT_INSERT_STAT_SHIFT 1
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#define SC8551_ADC_DONE_STAT_MASK 0x01
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#define SC8551_ADC_DONE_STAT_SHIFT 0
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#define SC8551_ADC_DONE_STAT_COMPLETE 1
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#define SC8551_ADC_DONE_STAT_NOTCOMPLETE 0
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/* Register 0Eh */
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#define SC8551_REG_0E 0x0E
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#define SC8551_BAT_OVP_ALM_FLAG_MASK 0x80
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#define SC8551_BAT_OVP_ALM_FLAG_SHIFT 7
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#define SC8551_BAT_OCP_ALM_FLAG_MASK 0x40
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#define SC8551_BAT_OCP_ALM_FLAG_SHIFT 6
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#define SC8551_BUS_OVP_ALM_FLAG_MASK 0x20
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#define SC8551_BUS_OVP_ALM_FLAG_SHIFT 5
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#define SC8551_BUS_OCP_ALM_FLAG_MASK 0x10
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#define SC8551_BUS_OCP_ALM_FLAG_SHIFT 4
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#define SC8551_BAT_UCP_ALM_FLAG_MASK 0x08
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#define SC8551_BAT_UCP_ALM_FLAG_SHIFT 3
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#define SC8551_ADAPTER_INSERT_FLAG_MASK 0x04
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#define SC8551_ADAPTER_INSERT_FLAG_SHIFT 2
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#define SC8551_VBAT_INSERT_FLAG_MASK 0x02
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#define SC8551_VBAT_INSERT_FLAG_SHIFT 1
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#define SC8551_ADC_DONE_FLAG_MASK 0x01
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#define SC8551_ADC_DONE_FLAG_SHIFT 0
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#define SC8551_ADC_DONE_FLAG_COMPLETE 1
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#define SC8551_ADC_DONE_FLAG_NOTCOMPLETE 0
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/* Register 0Fh */
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#define SC8551_REG_0F 0x0F
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#define SC8551_BAT_OVP_ALM_MASK_MASK 0x80
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#define SC8551_BAT_OVP_ALM_MASK_SHIFT 7
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#define SC8551_BAT_OVP_ALM_MASK_ENABLE 1
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#define SC8551_BAT_OVP_ALM_MASK_DISABLE 0
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#define SC8551_BAT_OCP_ALM_MASK_MASK 0x40
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#define SC8551_BAT_OCP_ALM_MASK_SHIFT 6
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#define SC8551_BAT_OCP_ALM_MASK_ENABLE 1
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#define SC8551_BAT_OCP_ALM_MASK_DISABLE 0
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#define SC8551_BUS_OVP_ALM_MASK_MASK 0x20
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#define SC8551_BUS_OVP_ALM_MASK_SHIFT 5
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#define SC8551_BUS_OVP_ALM_MASK_ENABLE 1
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#define SC8551_BUS_OVP_ALM_MASK_DISABLE 0
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#define SC8551_BUS_OCP_ALM_MASK_MASK 0x10
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#define SC8551_BUS_OCP_ALM_MASK_SHIFT 4
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#define SC8551_BUS_OCP_ALM_MASK_ENABLE 1
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#define SC8551_BUS_OCP_ALM_MASK_DISABLE 0
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#define SC8551_BAT_UCP_ALM_MASK_MASK 0x08
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#define SC8551_BAT_UCP_ALM_MASK_SHIFT 3
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#define SC8551_BAT_UCP_ALM_MASK_ENABLE 1
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#define SC8551_BAT_UCP_ALM_MASK_DISABLE 0
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#define SC8551_ADAPTER_INSERT_MASK_MASK 0x04
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#define SC8551_ADAPTER_INSERT_MASK_SHIFT 2
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#define SC8551_ADAPTER_INSERT_MASK_ENABLE 1
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#define SC8551_ADAPTER_INSERT_MASK_DISABLE 0
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#define SC8551_VBAT_INSERT_MASK_MASK 0x02
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#define SC8551_VBAT_INSERT_MASK_SHIFT 1
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#define SC8551_VBAT_INSERT_MASK_ENABLE 1
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#define SC8551_VBAT_INSERT_MASK_DISABLE 0
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#define SC8551_ADC_DONE_MASK_MASK 0x01
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#define SC8551_ADC_DONE_MASK_SHIFT 0
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#define SC8551_ADC_DONE_MASK_ENABLE 1
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#define SC8551_ADC_DONE_MASK_DISABLE 0
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/* Register 10h */
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#define SC8551_REG_10 0x10
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#define SC8551_BAT_OVP_FLT_STAT_MASK 0x80
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#define SC8551_BAT_OVP_FLT_STAT_SHIFT 7
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#define SC8551_BAT_OCP_FLT_STAT_MASK 0x40
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#define SC8551_BAT_OCP_FLT_STAT_SHIFT 6
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#define SC8551_BUS_OVP_FLT_STAT_MASK 0x20
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#define SC8551_BUS_OVP_FLT_STAT_SHIFT 5
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#define SC8551_BUS_OCP_FLT_STAT_MASK 0x10
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#define SC8551_BUS_OCP_FLT_STAT_SHIFT 4
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#define SC8551_TSBUS_TSBAT_ALM_STAT_MASK 0x08
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#define SC8551_TSBUS_TSBAT_ALM_STAT_SHIFT 3
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#define SC8551_TSBAT_FLT_STAT_MASK 0x04
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#define SC8551_TSBAT_FLT_STAT_SHIFT 2
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#define SC8551_TSBUS_FLT_STAT_MASK 0x02
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#define SC8551_TSBUS_FLT_STAT_SHIFT 1
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#define SC8551_TDIE_ALM_STAT_MASK 0x01
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#define SC8551_TDIE_ALM_STAT_SHIFT 0
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/* Register 11h */
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#define SC8551_REG_11 0x11
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#define SC8551_BAT_OVP_FLT_FLAG_MASK 0x80
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#define SC8551_BAT_OVP_FLT_FLAG_SHIFT 7
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#define SC8551_BAT_OCP_FLT_FLAG_MASK 0x40
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#define SC8551_BAT_OCP_FLT_FLAG_SHIFT 6
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#define SC8551_BUS_OVP_FLT_FLAG_MASK 0x20
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#define SC8551_BUS_OVP_FLT_FLAG_SHIFT 5
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#define SC8551_BUS_OCP_FLT_FLAG_MASK 0x10
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#define SC8551_BUS_OCP_FLT_FLAG_SHIFT 4
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#define SC8551_TSBUS_TSBAT_ALM_FLAG_MASK 0x08
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#define SC8551_TSBUS_TSBAT_ALM_FLAG_SHIFT 3
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#define SC8551_TSBAT_FLT_FLAG_MASK 0x04
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#define SC8551_TSBAT_FLT_FLAG_SHIFT 2
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#define SC8551_TSBUS_FLT_FLAG_MASK 0x02
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#define SC8551_TSBUS_FLT_FLAG_SHIFT 1
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#define SC8551_TDIE_ALM_FLAG_MASK 0x01
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#define SC8551_TDIE_ALM_FLAG_SHIFT 0
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/* Register 12h */
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#define SC8551_REG_12 0x12
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#define SC8551_BAT_OVP_FLT_MASK_MASK 0x80
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#define SC8551_BAT_OVP_FLT_MASK_SHIFT 7
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#define SC8551_BAT_OVP_FLT_MASK_ENABLE 1
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#define SC8551_BAT_OVP_FLT_MASK_DISABLE 0
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#define SC8551_BAT_OCP_FLT_MASK_MASK 0x40
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#define SC8551_BAT_OCP_FLT_MASK_SHIFT 6
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#define SC8551_BAT_OCP_FLT_MASK_ENABLE 1
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#define SC8551_BAT_OCP_FLT_MASK_DISABLE 0
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#define SC8551_BUS_OVP_FLT_MASK_MASK 0x20
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#define SC8551_BUS_OVP_FLT_MASK_SHIFT 5
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#define SC8551_BUS_OVP_FLT_MASK_ENABLE 1
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#define SC8551_BUS_OVP_FLT_MASK_DISABLE 0
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#define SC8551_BUS_OCP_FLT_MASK_MASK 0x10
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#define SC8551_BUS_OCP_FLT_MASK_SHIFT 4
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#define SC8551_BUS_OCP_FLT_MASK_ENABLE 1
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#define SC8551_BUS_OCP_FLT_MASK_DISABLE 0
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#define SC8551_TSBUS_TSBAT_ALM_MASK_MASK 0x08
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#define SC8551_TSBUS_TSBAT_ALM_MASK_SHIFT 3
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#define SC8551_TSBUS_TSBAT_ALM_MASK_ENABLE 1
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#define SC8551_TSBUS_TSBAT_ALM_MASK_DISABLE 0
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#define SC8551_TSBAT_FLT_MASK_MASK 0x04
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#define SC8551_TSBAT_FLT_MASK_SHIFT 2
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#define SC8551_TSBAT_FLT_MASK_ENABLE 1
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#define SC8551_TSBAT_FLT_MASK_DISABLE 0
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#define SC8551_TSBUS_FLT_MASK_MASK 0x02
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#define SC8551_TSBUS_FLT_MASK_SHIFT 1
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#define SC8551_TSBUS_FLT_MASK_ENABLE 1
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#define SC8551_TSBUS_FLT_MASK_DISABLE 0
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#define SC8551_TDIE_ALM_MASK_MASK 0x01
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#define SC8551_TDIE_ALM_MASK_SHIFT 0
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#define SC8551_TDIE_ALM_MASK_ENABLE 1
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#define SC8551_TDIE_ALM_MASK_DISABLE 0
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/* Register 13h */
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#define SC8551_REG_13 0x13
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#define SC8551_DEV_ID_MASK 0x0F
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#define SC8551_DEV_ID_SHIFT 0
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/* Register 14h */
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#define SC8551_REG_14 0x14
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#define SC8551_ADC_EN_MASK 0x80
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#define SC8551_ADC_EN_SHIFT 7
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#define SC8551_ADC_ENABLE 1
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#define SC8551_ADC_DISABLE 0
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#define SC8551_ADC_RATE_MASK 0x40
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#define SC8551_ADC_RATE_SHIFT 6
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#define SC8551_ADC_RATE_CONTINUOUS 0
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#define SC8551_ADC_RATE_ONESHOT 1
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#define SC8551_IBUS_ADC_DIS_MASK 0x01
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#define SC8551_IBUS_ADC_DIS_SHIFT 0
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#define SC8551_IBUS_ADC_ENABLE 0
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#define SC8551_IBUS_ADC_DISABLE 1
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/* Register 15h */
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#define SC8551_REG_15 0x15
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#define SC8551_VBUS_ADC_DIS_MASK 0x80
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#define SC8551_VBUS_ADC_DIS_SHIFT 7
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#define SC8551_VBUS_ADC_ENABLE 0
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#define SC8551_VBUS_ADC_DISABLE 1
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#define SC8551_VAC_ADC_DIS_MASK 0x40
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#define SC8551_VAC_ADC_DIS_SHIFT 6
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#define SC8551_VAC_ADC_ENABLE 0
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#define SC8551_VAC_ADC_DISABLE 1
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#define SC8551_VOUT_ADC_DIS_MASK 0x20
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#define SC8551_VOUT_ADC_DIS_SHIFT 5
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#define SC8551_VOUT_ADC_ENABLE 0
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#define SC8551_VOUT_ADC_DISABLE 1
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#define SC8551_VBAT_ADC_DIS_MASK 0x10
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#define SC8551_VBAT_ADC_DIS_SHIFT 4
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#define SC8551_VBAT_ADC_ENABLE 0
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#define SC8551_VBAT_ADC_DISABLE 1
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#define SC8551_IBAT_ADC_DIS_MASK 0x08
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#define SC8551_IBAT_ADC_DIS_SHIFT 3
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#define SC8551_IBAT_ADC_ENABLE 0
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#define SC8551_IBAT_ADC_DISABLE 1
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#define SC8551_TSBUS_ADC_DIS_MASK 0x04
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#define SC8551_TSBUS_ADC_DIS_SHIFT 2
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#define SC8551_TSBUS_ADC_ENABLE 0
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#define SC8551_TSBUS_ADC_DISABLE 1
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#define SC8551_TSBAT_ADC_DIS_MASK 0x02
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#define SC8551_TSBAT_ADC_DIS_SHIFT 1
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#define SC8551_TSBAT_ADC_ENABLE 0
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#define SC8551_TSBAT_ADC_DISABLE 1
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#define SC8551_TDIE_ADC_DIS_MASK 0x01
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#define SC8551_TDIE_ADC_DIS_SHIFT 0
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#define SC8551_TDIE_ADC_ENABLE 0
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#define SC8551_TDIE_ADC_DISABLE 1
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/* Register 16h */
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#define SC8551_REG_16 0x16
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#define SC8551_IBUS_POL_H_MASK 0x0F
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#define SC8551_IBUS_ADC_LSB (15625 / 10000)
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/* Register 17h */
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#define SC8551_REG_17 0x17
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#define SC8551_IBUS_POL_L_MASK 0xFF
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/* Register 18h */
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#define SC8551_REG_18 0x18
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#define SC8551_VBUS_POL_H_MASK 0x0F
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#define SC8551_VBUS_ADC_LSB (375 / 100)
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/* Register 19h */
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#define SC8551_REG_19 0x19
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#define SC8551_VBUS_POL_L_MASK 0xFF
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/* Register 1Ah */
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#define SC8551_REG_1A 0x1A
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#define SC8551_VAC_POL_H_MASK 0x0F
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#define SC8551_VAC_ADC_LSB 5
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/* Register 1Bh */
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#define SC8551_REG_1B 0x1B
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#define SC8551_VAC_POL_L_MASK 0xFF
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/* Register 1Ch */
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#define SC8551_REG_1C 0x1C
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#define SC8551_VOUT_POL_H_MASK 0x0F
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#define SC8551_VOUT_ADC_LSB (125 / 100)
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/* Register 1Dh */
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#define SC8551_REG_1D 0x1D
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#define SC8551_VOUT_POL_L_MASK 0x0F
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/* Register 1Eh */
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#define SC8551_REG_1E 0x1E
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#define SC8551_VBAT_POL_H_MASK 0x0F
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#define SC8551_VBAT_ADC_LSB (125 / 100)
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/* Register 1Fh */
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#define SC8551_REG_1F 0x1F
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#define SC8551_VBAT_POL_L_MASK 0xFF
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/* Register 20h */
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#define SC8551_REG_20 0x20
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#define SC8551_IBAT_POL_H_MASK 0x0F
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#define SC8551_IBAT_ADC_LSB (3125 / 1000)
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/* Register 21h */
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#define SC8551_REG_21 0x21
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#define SC8551_IBAT_POL_L_MASK 0xFF
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/* Register 22h */
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#define SC8551_REG_22 0x22
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#define SC8551_TSBUS_POL_H_MASK 0x03
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#define SC8551_TSBUS_ADC_LSB (9766 / 100000)
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/* Register 23h */
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#define SC8551_REG_23 0x23
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#define SC8551_TSBUS_POL_L_MASK 0xFF
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/* Register 24h */
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#define SC8551_REG_24 0x24
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#define SC8551_TSBAT_POL_H_MASK 0x03
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#define SC8551_TSBAT_ADC_LSB (9766 / 100000)
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/* Register 25h */
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#define SC8551_REG_25 0x25
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#define SC8551_TSBAT_POL_L_MASK 0xFF
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/* Register 26h */
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#define SC8551_REG_26 0x26
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#define SC8551_TDIE_POL_H_MASK 0x01
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#define SC8551_TDIE_ADC_LSB (5 / 10)
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/* Register 27h */
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#define SC8551_REG_27 0x27
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#define SC8551_TDIE_POL_L_MASK 0xFF
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/* Register 28h */
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#define SC8551_REG_28 0x28
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#define SC8551_TSBUS_FLT1_MASK 0xFF
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#define SC8551_TSBUS_FLT1_SHIFT 0
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#define SC8551_TSBUS_FLT1_BASE 0
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#define SC8551_TSBUS_FLT1_LSB 0.19531
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/* Register 29h */
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#define SC8551_REG_29 0x29
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#define SC8551_TSBAT_FLT0_MASK 0xFF
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#define SC8551_TSBAT_FLT0_SHIFT 0
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#define SC8551_TSBAT_FLT0_BASE 0
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#define SC8551_TSBAT_FLT0_LSB 0.19531
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/* Register 2Ah */
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#define SC8551_REG_2A 0x2A
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#define SC8551_TDIE_ALM_MASK 0xFF
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#define SC8551_TDIE_ALM_SHIFT 0
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#define SC8551_TDIE_ALM_BASE 25
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/*careful multiply is used for calc*/
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#define SC8551_TDIE_ALM_LSB 5
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/* Register 2Bh */
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#define SC8551_REG_2B 0x2B
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#define SC8551_SS_TIMEOUT_SET_MASK 0xE0
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#define SC8551_SS_TIMEOUT_SET_SHIFT 5
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#define SC8551_SS_TIMEOUT_DISABLE 0
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#define SC8551_SS_TIMEOUT_12P5MS 1
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#define SC8551_SS_TIMEOUT_25MS 2
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#define SC8551_SS_TIMEOUT_50MS 3
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#define SC8551_SS_TIMEOUT_100MS 4
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#define SC8551_SS_TIMEOUT_400MS 5
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#define SC8551_SS_TIMEOUT_1500MS 6
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#define SC8551_SS_TIMEOUT_100000MS 7
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#define SC8551_EN_REGULATION_MASK 0x10
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#define SC8551_EN_REGULATION_SHIFT 4
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#define SC8551_EN_REGULATION_ENABLE 1
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#define SC8551_EN_REGULATION_DISABLE 0
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#define SC8551_VOUT_OVP_DIS_MASK 0x08
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#define SC8551_VOUT_OVP_DIS_SHIFT 3
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#define SC8551_VOUT_OVP_ENABLE 1
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#define SC8551_VOUT_OVP_DISABLE 0
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#define SC8551_IBUS_UCP_RISE_TH_MASK 0x04
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#define SC8551_IBUS_UCP_RISE_TH_SHIFT 2
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#define SC8551_IBUS_UCP_RISE_150MA 0
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#define SC8551_IBUS_UCP_RISE_250MA 1
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#define SC8551_SET_IBAT_SNS_RES_MASK 0x02
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#define SC8551_SET_IBAT_SNS_RES_SHIFT 1
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#define SC8551_SET_IBAT_SNS_RES_2MHM 0
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#define SC8551_SET_IBAT_SNS_RES_5MHM 1
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#define SC8551_VAC_PD_EN_MASK 0x01
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#define SC8551_VAC_PD_EN_SHIFT 0
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#define SC8551_VAC_PD_ENABLE 1
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#define SC8551_VAC_PD_DISABLE 0
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/* Register 2Ch */
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#define SC8551_REG_2C 0x2C
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#define SC8551_IBAT_REG_MASK 0xC0
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#define SC8551_IBAT_REG_SHIFT 6
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#define SC8551_IBAT_REG_200MA 0
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#define SC8551_IBAT_REG_300MA 1
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#define SC8551_IBAT_REG_400MA 2
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#define SC8551_IBAT_REG_500MA 3
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#define SC8551_VBAT_REG_MASK 0x30
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#define SC8551_VBAT_REG_SHIFT 4
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#define SC8551_VBAT_REG_50MV 0
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#define SC8551_VBAT_REG_100MV 1
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#define SC8551_VBAT_REG_150MV 2
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#define SC8551_VBAT_REG_200MV 3
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#define SC8551_VBAT_REG_ACTIVE_STAT_MASK 0x08
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#define SC8551_IBAT_REG_ACTIVE_STAT_MASK 0x04
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#define SC8551_VDROP_OVP_ACTIVE_STAT_MASK 0x02
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#define SC8551_VOUT_OVP_ACTIVE_STAT_MASK 0x01
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#define SC8551_REG_2D 0x2D
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#define SC8551_VBAT_REG_ACTIVE_FLAG_MASK 0x80
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#define SC8551_IBAT_REG_ACTIVE_FLAG_MASK 0x40
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#define SC8551_VDROP_OVP_FLAG_MASK 0x20
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#define SC8551_VOUT_OVP_FLAG_MASK 0x10
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#define SC8551_VBAT_REG_ACTIVE_MASK_MASK 0x08
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#define SC8551_IBAT_REG_ACTIVE_MASK_MASK 0x04
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#define SC8551_VDROP_OVP_MASK_MASK 0x02
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#define SC8551_VOUT_OVP_MASK_MASK 0x01
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#define SC8551_REG_2E 0x2E
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#define SC8551_IBUS_LOW_DG_MASK 0x08
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#define SC8551_IBUS_LOW_DG_SHIFT 3
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#define SC8551_IBUS_LOW_DG_10US 0
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#define SC8551_IBUS_LOW_DG_5MS 1
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#define SC8551_REG_2F 0x2F
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#define SC8551_PMID2OUT_UVP_FLAG_MASK 0x08
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#define SC8551_PMID2OUT_OVP_FLAG_MASK 0x04
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#define SC8551_PMID2OUT_UVP_STAT_MASK 0x02
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#define SC8551_PMID2OUT_OVP_STAT_MASK 0x01
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#define SC8551_REG_30 0x30
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#define SC8551_IBUS_REG_EN_MASK 0x80
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#define SC8551_IBUS_REG_EN_SHIFT 7
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#define SC8551_IBUS_REG_ENABLE 1
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#define SC8551_IBUS_REG_DISABLE 0
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#define SC8551_IBUS_REG_ACTIVE_STAT_MASK 0x40
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#define SC8551_IBUS_REG_ACTIVE_FLAG_MASK 0x20
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#define SC8551_IBUS_REG_ACTIVE_MASK_MASK 0x10
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#define SC8551_IBUS_REG_ACTIVE_MASK_SHIFT 4
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#define SC8551_IBUS_REG_ACTIVE_NOT_MASK 0
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#define SC8551_IBUS_REG_ACTIVE_MASK 1
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#define SC8551_IBUS_REG_MASK 0x0F
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#define SC8551_IBUS_REG_SHIFT 0
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#define SC8551_IBUS_REG_BASE 1000
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#define SC8551_IBUS_REG_LSB 250
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#define SC8551_REG_31 0x31
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#define SC8551_CHARGE_MODE_MASK 0x01
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#define SC8551_CHARGE_MODE_SHIFT 0
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#define SC8551_CHARGE_MODE_2_1 0
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#define SC8551_CHARGE_MODE_1_1 1
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#define SC8551_REG_34 0x34
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#endif
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