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unplugged-kernel/arch/arm64/boot/dts/mediatek/cust_mt6779_camera.dtsi

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2019 MediaTek Inc.
*
*/
/* CAMERA GPIO standardization */
&pio {
camera0_rst_low: camera0_rst_output_low@gpio118 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO118__FUNC_GPIO118>;
output-low;
};
};
camera0_rst_high: camera0_rst_output_high@gpio118 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO118__FUNC_GPIO118>;
output-high;
};
};
camera0_pdn_low: camera0_pdn_output_low@gpio114 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO114__FUNC_GPIO114>;
output-low;
};
};
camera0_pdn_high: camera0_pdn_output_high@gpio114 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO114__FUNC_GPIO114>;
output-high;
};
};
camera1_rst_low: camera1_rst_output_low@gpio124 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO124__FUNC_GPIO124>;
output-low;
};
};
camera1_rst_high: camera1_rst_output_high@gpio124 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO124__FUNC_GPIO124>;
output-high;
};
};
camera1_pdn_low: camera1_pdn_output_low@gpio122 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO122__FUNC_GPIO122>;
output-low;
};
};
camera1_pdn_high: camera1_pdn_output_high@gpio122 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO122__FUNC_GPIO122>;
output-high;
};
};
camera2_rst_low: camera2_rst_output_low@gpio119 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
output-low;
};
};
camera2_rst_high: camera2_rst_output_high@gpio119 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
output-high;
};
};
camera2_pdn_low: camera2_pdn_output_low@gpio115 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO115__FUNC_GPIO115>;
output-low;
};
};
camera2_pdn_high: camera2_pdn_output_high@gpio115 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO115__FUNC_GPIO115>;
output-high;
};
};
camera0_vcama_off: camera0_vcama_output_low@gpio15 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
output-low;
};
};
camera0_vcama_on: camera0_vcama_output_high@gpio15 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
output-high;
};
};
camera0_vcamd_off: camera0_vcamd_output_low@gpio12 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO12__FUNC_GPIO12>;
slew-rate = <1>;
output-low;
};
};
camera0_vcamd_on: camera0_vcamd_output_high@gpio12 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO12__FUNC_GPIO12>;
output-high;
};
};
camera1_vcama_off: camera1_vcama_output_low@gpio197 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO197__FUNC_GPIO197>;
output-low;
};
};
camera1_vcama_on: camera1_vcama_output_hgigh@gpio197 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO197__FUNC_GPIO197>;
output-high;
};
};
camera1_vcamd_off: camera1_vcamd_output_low@gpio13 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO13__FUNC_GPIO13>;
slew-rate = <1>;
output-low;
};
};
camera1_vcamd_on: camera1_vcamd_output_high@gpio13 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO13__FUNC_GPIO13>;
output-high;
};
};
camera2_vcama_off: camera2_vcama_output_low@gpio195 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO195__FUNC_GPIO195>;
output-low;
};
};
camera2_vcama_on: camera2_vcama_output_high@gpio195 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO195__FUNC_GPIO195>;
output-high;
};
};
camera2_vcamd_off: camera2_vcamd_output_low@gpio14 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO14__FUNC_GPIO14>;
output-low;
};
};
camera2_vcamd_on: camera2_vcamd_output_high@gpio14 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO14__FUNC_GPIO14>;
output-high;
};
};
camera0_mclk_2ma: camera0_mclk_2ma@gpio116 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO116__FUNC_CMMCLK0>;
drive-strength = <0>;
};
};
camera0_mclk_4ma: camera0_mclk_4ma@gpio116 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO116__FUNC_CMMCLK0>;
drive-strength = <1>;
};
};
camera0_mclk_6ma: camera0_mclk_6ma@gpio116 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO116__FUNC_CMMCLK0>;
drive-strength = <2>;
};
};
camera0_mclk_8ma: camera0_mclk_8ma@gpio116 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO116__FUNC_CMMCLK0>;
drive-strength = <3>;
};
};
camera0_mclk_off: camera0_mclk_gpio_mode@gpio116 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO116__FUNC_GPIO116>;
drive-strength = <1>;
};
};
camera2_mclk_2ma: camera2_mclk_2ma@gpio117 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO117__FUNC_CMMCLK1>;
drive-strength = <0>;
};
};
camera2_mclk_4ma: camera2_mclk_4ma@gpio117 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO117__FUNC_CMMCLK1>;
drive-strength = <1>;
};
};
camera2_mclk_6ma: camera2_mclk_6ma@gpio117 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO117__FUNC_CMMCLK1>;
drive-strength = <2>;
};
};
camera2_mclk_8ma: camera2_mclk_8ma@gpio117 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO117__FUNC_CMMCLK1>;
drive-strength = <3>;
};
};
camera2_mclk_off: camera2_mclk_gpio_mode@gpio117 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO117__FUNC_GPIO117>;
drive-strength = <1>;
};
};
camera1_mclk_2ma: camera1_mclk_2ma@gpio120 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO120__FUNC_CMMCLK2>;
drive-strength = <0>;
};
};
camera1_mclk_4ma: camera1_mclk_4ma@gpio120 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO120__FUNC_CMMCLK2>;
drive-strength = <1>;
};
};
camera1_mclk_6ma: camera1_mclk_6ma@gpio120 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO120__FUNC_CMMCLK2>;
drive-strength = <2>;
};
};
camera1_mclk_8ma: camera1_mclk_8ma@gpio120 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO120__FUNC_CMMCLK2>;
drive-strength = <3>;
};
};
camera1_mclk_off: camera1_mclk_gpio_mode@gpio120 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
drive-strength = <1>;
};
};
camera_pins_default: camdefault {
};
};
&kd_camera_hw1 {
pinctrl-names = "default",
"cam0_rst0", "cam0_rst1",
"cam0_pnd0", "cam0_pnd1",
"cam1_rst0", "cam1_rst1",
"cam1_pnd0", "cam1_pnd1",
"cam2_rst0", "cam2_rst1",
"cam2_pnd0", "cam2_pnd1",
"cam0_ldo_vcama_0", "cam0_ldo_vcama_1",
"cam0_ldo_vcamd_0", "cam0_ldo_vcamd_1",
"cam1_ldo_vcama_0", "cam1_ldo_vcama_1",
"cam1_ldo_vcamd_0", "cam1_ldo_vcamd_1",
"cam2_ldo_vcama_0", "cam2_ldo_vcama_1",
"cam2_ldo_vcamd_0", "cam2_ldo_vcamd_1",
"cam0_mclk_off",
"cam0_mclk_2mA", "cam0_mclk_4mA",
"cam0_mclk_6mA", "cam0_mclk_8mA",
"cam1_mclk_off",
"cam1_mclk_2mA", "cam1_mclk_4mA",
"cam1_mclk_6mA", "cam1_mclk_8mA",
"cam2_mclk_off",
"cam2_mclk_2mA", "cam2_mclk_4mA",
"cam2_mclk_6mA", "cam2_mclk_8mA";
pinctrl-0 = <&camera_pins_default>;
pinctrl-1 = <&camera0_rst_low>;
pinctrl-2 = <&camera0_rst_high>;
pinctrl-3 = <&camera0_pdn_low>;
pinctrl-4 = <&camera0_pdn_high>;
pinctrl-5 = <&camera1_rst_low>;
pinctrl-6 = <&camera1_rst_high>;
pinctrl-7 = <&camera1_pdn_low>;
pinctrl-8 = <&camera1_pdn_high>;
pinctrl-9 = <&camera2_rst_low>;
pinctrl-10 = <&camera2_rst_high>;
pinctrl-11 = <&camera2_pdn_low>;
pinctrl-12 = <&camera2_pdn_high>;
pinctrl-13 = <&camera0_vcama_off>;
pinctrl-14 = <&camera0_vcama_on>;
pinctrl-15 = <&camera0_vcamd_off>;
pinctrl-16 = <&camera0_vcamd_on>;
pinctrl-17 = <&camera1_vcama_off>;
pinctrl-18 = <&camera1_vcama_on>;
pinctrl-19 = <&camera1_vcamd_off>;
pinctrl-20 = <&camera1_vcamd_on>;
pinctrl-21 = <&camera2_vcama_off>;
pinctrl-22 = <&camera2_vcama_on>;
pinctrl-23 = <&camera2_vcamd_off>;
pinctrl-24 = <&camera2_vcamd_on>;
pinctrl-25 = <&camera0_mclk_off>;
pinctrl-26 = <&camera0_mclk_2ma>;
pinctrl-27 = <&camera0_mclk_4ma>;
pinctrl-28 = <&camera0_mclk_6ma>;
pinctrl-29 = <&camera0_mclk_8ma>;
pinctrl-30 = <&camera1_mclk_off>;
pinctrl-31 = <&camera1_mclk_2ma>;
pinctrl-32 = <&camera1_mclk_4ma>;
pinctrl-33 = <&camera1_mclk_6ma>;
pinctrl-34 = <&camera1_mclk_8ma>;
pinctrl-35 = <&camera2_mclk_off>;
pinctrl-36 = <&camera2_mclk_2ma>;
pinctrl-37 = <&camera2_mclk_4ma>;
pinctrl-38 = <&camera2_mclk_6ma>;
pinctrl-39 = <&camera2_mclk_8ma>;
cam0_vcamio-supply = <&mt_pmic_vcamio_ldo_reg>;
cam1_vcamio-supply = <&mt_pmic_vcamio_ldo_reg>;
cam2_vcamio-supply = <&mt_pmic_vcamio_ldo_reg>;
status = "okay";
};
/* CAMERA GPIO end */
/* CAMERA AF */
&camera_af_hw_node {
camaf_m1_pmic-supply = <&mt_pmic_vcamio_ldo_reg>;
camaf_m2_pmic-supply = <&mt_pmic_vcamio_ldo_reg>;
camaf_m3_pmic-supply = <&mt_pmic_vcamio_ldo_reg>;
status = "okay";
};
/* CAMERA AF end */
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