unplugged-kernel/arch/arm64/boot/dts/mediatek/cust_mt6785_msdc.dtsi

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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 MediaTek Inc.
*/
/********************************************
* MT6785 MSDC DTSI File
********************************************/
#include <dt-bindings/gpio/gpio.h>
&mmc0 {
status = "okay";
host-index = <0>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
no-sd;
no-sdio;
non-removable;
hs400-ds-delay = <0x12814>;
mediatek,cqhci;
vmmc-supply = <&mt_pmic_vemc_ldo_reg>;
};
&pio {
mmc0_pins_default: mmc0default {
pins_cmd_dat {
pinmux = <PINMUX_GPIO168__FUNC_MSDC0_DAT0>,
<PINMUX_GPIO172__FUNC_MSDC0_DAT1>,
<PINMUX_GPIO169__FUNC_MSDC0_DAT2>,
<PINMUX_GPIO177__FUNC_MSDC0_DAT3>,
<PINMUX_GPIO170__FUNC_MSDC0_DAT4>,
<PINMUX_GPIO173__FUNC_MSDC0_DAT5>,
<PINMUX_GPIO171__FUNC_MSDC0_DAT6>,
<PINMUX_GPIO174__FUNC_MSDC0_DAT7>,
<PINMUX_GPIO167__FUNC_MSDC0_CMD>;
input-enable;
};
pins_clk {
pinmux = <PINMUX_GPIO176__FUNC_MSDC0_CLK>;
};
pins_rst {
pinmux = <PINMUX_GPIO178__FUNC_MSDC0_RSTB>;
};
};
mmc0_pins_uhs: mmc0@0{
pins_cmd_dat {
pinmux = <PINMUX_GPIO168__FUNC_MSDC0_DAT0>,
<PINMUX_GPIO172__FUNC_MSDC0_DAT1>,
<PINMUX_GPIO169__FUNC_MSDC0_DAT2>,
<PINMUX_GPIO177__FUNC_MSDC0_DAT3>,
<PINMUX_GPIO170__FUNC_MSDC0_DAT4>,
<PINMUX_GPIO173__FUNC_MSDC0_DAT5>,
<PINMUX_GPIO171__FUNC_MSDC0_DAT6>,
<PINMUX_GPIO174__FUNC_MSDC0_DAT7>,
<PINMUX_GPIO167__FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <4>;
};
pins_clk {
pinmux = <PINMUX_GPIO176__FUNC_MSDC0_CLK>;
drive-strength = <4>;
};
pins_ds {
pinmux = <PINMUX_GPIO175__FUNC_MSDC0_DSL>;
drive-strength = <4>;
};
pins_rst {
pinmux = <PINMUX_GPIO178__FUNC_MSDC0_RSTB>;
drive-strength = <4>;
};
};
};
&mmc1 {
status = "okay";
host-index = <1>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_uhs>;
bus-width = <4>;
max-frequency = <200000000>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
sd-uhs-ddr50;
cd-gpios = <&pio 8 GPIO_ACTIVE_LOW>;
vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
no-mmc;
no-sdio;
};
&pio {
mmc1_pins_default: mmc1default {
pins_cmd_dat {
pinmux = <PINMUX_GPIO137__FUNC_MSDC1_DAT0>,
<PINMUX_GPIO139__FUNC_MSDC1_DAT1>,
<PINMUX_GPIO138__FUNC_MSDC1_DAT2>,
<PINMUX_GPIO136__FUNC_MSDC1_DAT3>,
<PINMUX_GPIO135__FUNC_MSDC1_CMD>;
input-enable;
drive-strength = <3>;
};
pins_clk {
pinmux = <PINMUX_GPIO134__FUNC_MSDC1_CLK>;
drive-strength = <3>;
};
pins_insert {
pinmux = <PINMUX_GPIO8__FUNC_GPIO8>;
bias-pull-up;
};
};
mmc1_pins_uhs: mmc1@0{
pins_cmd_dat {
pinmux = <PINMUX_GPIO137__FUNC_MSDC1_DAT0>,
<PINMUX_GPIO139__FUNC_MSDC1_DAT1>,
<PINMUX_GPIO138__FUNC_MSDC1_DAT2>,
<PINMUX_GPIO136__FUNC_MSDC1_DAT3>,
<PINMUX_GPIO135__FUNC_MSDC1_CMD>;
input-enable;
drive-strength = <3>;
};
pins_clk {
pinmux = <PINMUX_GPIO134__FUNC_MSDC1_CLK>;
drive-strength = <3>;
};
};
};