741 lines
18 KiB
C
741 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// adsp_dvfs.c -- Mediatek ADSP DVFS control
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//
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// Copyright (c) 2018 MediaTek Inc.
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// Author: Celine Liu <Celine.liu@mediatek.com>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/proc_fs.h>
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#include <linux/miscdevice.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/kthread.h>
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#include <linux/vmalloc.h> /* needed by vmalloc */
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#include <linux/hrtimer.h>
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#include <linux/ktime.h>
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#include <linux/jiffies.h>
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#include <linux/fs.h>
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#include <linux/seq_file.h>
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#include <linux/input.h>
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#ifdef wakelock
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#include <linux/wakelock.h>
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#endif
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#include <linux/io.h>
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//#include <mt-plat/upmu_common.h>
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#include <mtk_spm_sleep.h>
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#ifdef CONFIG_OF
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#include <linux/of.h>
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#include <linux/of_address.h>
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#endif
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#ifdef CONFIG_MTK_AEE_FEATURE
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#include <mt-plat/aee.h>
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#endif
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#include <linux/uaccess.h>
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#include "adsp_ipi.h"
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#include <adsp_ipi_queue.h>
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#include <audio_ipi_platform.h>
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#include "adsp_helper.h"
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#include "adsp_excep.h"
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#include "adsp_dvfs.h"
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#include "adsp_clk.h"
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#include "adsp_reg.h"
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#include <adsp_timesync.h>
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#ifdef CONFIG_MTK_CLKMGR
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#include <mach/mt_clkmgr.h>
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#else
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#include <linux/clk.h>
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#endif
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#ifdef pr_fmt
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#undef pr_fmt
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#endif
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#define pr_fmt(fmt) "[adsp_dvfs]: " fmt
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#define ADSP_DBG(fmt, arg...) pr_debug(fmt, ##arg)
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#define ADSP_INFO(fmt, arg...) pr_info(fmt, ##arg)
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#define DRV_Reg32(addr) readl(addr)
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#define DRV_WriteReg32(addr, val) writel(val, addr)
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#define DRV_SetReg32(addr, val) DRV_WriteReg32(addr, DRV_Reg32(addr) | (val))
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#define DRV_ClrReg32(addr, val) DRV_WriteReg32(addr, DRV_Reg32(addr) & ~(val))
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/* new implement for adsp */
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static DEFINE_MUTEX(adsp_timer_mutex);
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DEFINE_MUTEX(adsp_suspend_mutex);
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static struct timer_list adsp_suspend_timer;
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static struct adsp_work_t adsp_suspend_work;
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int adsp_is_suspend;
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static int adsp_is_force_freq;
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static int adsp_is_force_trigger_latmon;
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#define ADSP_DELAY_OFF_TIMEOUT (1 * HZ) /* 1 second */
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#define ADSP_DELAY_TIMER (0)
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#define FORCE_ADSPPLL_BASE (0x10000000)
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#define SPM_REQ_BASE (0x20000000)
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#define ADSPPLL_ON_BASE (0x30000000)
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#define ADD_FREQ_CMD (0x11110000)
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#define DEL_FREQ_CMD (0x22220000)
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#define QUERY_FREQ_CMD (0xFFFFFFFF)
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#define ADSP_FREQ_MAX_VALUE (630) /* 0.725V 70MCPS for sys */
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#define TRIGGER_LATMON_IRQ_CMD (0x00010000)
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/* Private Macro ---------------------------------------------------------*/
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/* The register must sync with ctrl-boards.S in Tinysys */
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#define CREG_BOOTUP_MARK (ADSP_CFGREG_RSV_RW_REG0)
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/* if equal, bypass clear bss and some init */
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#define MAGIC_PATTERN (0xfafafafa)
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struct wakeup_source *adsp_suspend_lock;
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static inline ssize_t adsp_force_adsppll_store(struct device *kobj,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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uint32_t value = 0, param = 0;
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enum adsp_ipi_status ret;
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if (kstrtoint(buf, 10, &value))
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return -EINVAL;
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switch (value) {
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case 480:
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param = FORCE_ADSPPLL_BASE+0x01E0;
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break;
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case 694:
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param = FORCE_ADSPPLL_BASE+0x02B6;
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break;
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case 800:
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param = FORCE_ADSPPLL_BASE+0x0320;
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break;
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default:
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break;
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}
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pr_debug("[%s]force in %d(%x)\n", __func__, value, param);
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if (is_adsp_ready(ADSP_A_ID) == 1) {
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ret = adsp_ipi_send(ADSP_IPI_DVFS_SLEEP, ¶m,
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sizeof(param), 0, ADSP_A_ID);
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}
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return count;
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}
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static inline ssize_t adsp_spm_req_store(struct device *kobj,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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uint32_t value = 0, param;
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enum adsp_ipi_status ret;
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if (kstrtoint(buf, 10, &value))
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return -EINVAL;
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param = SPM_REQ_BASE + value;
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pr_debug("[%s]set SPM req in %d(%x)\n", __func__, value, param);
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if (is_adsp_ready(ADSP_A_ID) == 1) {
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ret = adsp_ipi_send(ADSP_IPI_DVFS_SLEEP, ¶m,
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sizeof(param), 0, ADSP_A_ID);
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}
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return count;
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}
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static inline ssize_t adsp_keep_adsppll_on_store(struct device *kobj,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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uint32_t value = 0, param;
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enum adsp_ipi_status ret;
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if (kstrtoint(buf, 10, &value))
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return -EINVAL;
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param = ADSPPLL_ON_BASE + value;
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pr_debug("[%s] %d(%x)\n", __func__, value, param);
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if (is_adsp_ready(ADSP_A_ID) == 1) {
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ret = adsp_ipi_send(ADSP_IPI_DVFS_SLEEP, ¶m,
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sizeof(param), 0, ADSP_A_ID);
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}
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return count;
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}
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static inline ssize_t adsp_dvfs_force_opp_show(struct device *kobj,
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struct device_attribute *attr,
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char *buf)
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{
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return scnprintf(buf, PAGE_SIZE, "force freq status = %d\n",
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adsp_is_force_freq);
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}
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static inline ssize_t adsp_dvfs_force_opp_store(struct device *kobj,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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unsigned int value = 0;
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enum adsp_ipi_status ret = ADSP_IPI_ERROR;
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if (kstrtoint(buf, 10, &value))
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return -EINVAL;
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if (is_adsp_ready(ADSP_A_ID) == 1) {
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if (value == 255) {
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/* release force freq mode */
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adsp_is_force_freq = 0;
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ret = adsp_ipi_send(ADSP_IPI_DVFS_FIX_OPP_SET, &value,
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sizeof(value), 0, ADSP_A_ID);
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} else if (value == 0 || value == 1) {
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/* force adsp freq at specific value */
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adsp_is_force_freq = 1;
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ret = adsp_ipi_send(ADSP_IPI_DVFS_FIX_OPP_SET, &value,
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sizeof(value), 0, ADSP_A_ID);
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}
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}
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return count;
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}
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static inline ssize_t adsp_dvfs_set_freq_show(struct device *kobj,
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struct device_attribute *attr,
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char *buf)
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{
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unsigned int value = QUERY_FREQ_CMD;
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enum adsp_ipi_status ret;
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ret = adsp_ipi_send(ADSP_IPI_DVFS_SET_FREQ, &value,
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sizeof(value), 0, ADSP_A_ID);
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/* FIXME: ToDo, get MCPS and freq result from ADSP */
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return scnprintf(buf, PAGE_SIZE, "Running on level %d, Total MCPS=%d\n",
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0xFF, 0xFF);
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}
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static inline ssize_t adsp_dvfs_set_freq_store(struct device *kobj,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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char *temp = NULL, *token1 = NULL, *token2 = NULL;
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char *pin = NULL;
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char delim[] = " ,";
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unsigned int value = 0;
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enum adsp_ipi_status ret;
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temp = kstrdup(buf, GFP_KERNEL);
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pin = temp;
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token1 = strsep(&pin, delim);
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if (token1 == NULL)
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return -EINVAL;
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token2 = strsep(&pin, delim);
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if (token2 == NULL)
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return -EINVAL;
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if (kstrtoint(token2, 10, &value))
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return -EINVAL;
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if (value >= ADSP_FREQ_MAX_VALUE)
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return -EINVAL;
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if (strcmp(token1, "add") == 0)
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value |= ADD_FREQ_CMD;
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if (strcmp(token1, "del") == 0)
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value |= DEL_FREQ_CMD;
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ret = adsp_ipi_send(ADSP_IPI_DVFS_SET_FREQ, &value,
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sizeof(value), 0, ADSP_A_ID);
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kfree(temp);
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return count;
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}
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static inline ssize_t adsp_dvfs_trigger_latmon_show(struct device *kobj,
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struct device_attribute *attr,
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char *buf)
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{
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return scnprintf(buf, PAGE_SIZE, "force trigger latmon irq = %d\n",
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adsp_is_force_trigger_latmon);
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}
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static inline ssize_t adsp_dvfs_trigger_latmon_store(struct device *kobj,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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unsigned int value = 0;
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enum adsp_ipi_status ret = ADSP_IPI_ERROR;
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if (kstrtoint(buf, 10, &value))
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return -EINVAL;
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value |= TRIGGER_LATMON_IRQ_CMD;
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if (is_adsp_ready(ADSP_A_ID) == 1) {
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if (value == (TRIGGER_LATMON_IRQ_CMD | 0x0)) {
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/* release force freq mode */
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adsp_is_force_trigger_latmon = 0;
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ret = adsp_ipi_send(ADSP_IPI_DVFS_FIX_OPP_SET, &value,
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sizeof(value), 0, ADSP_A_ID);
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} else if (value == (TRIGGER_LATMON_IRQ_CMD | 0x1)) {
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/* force adsp freq at specific value */
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adsp_is_force_trigger_latmon = 1;
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ret = adsp_ipi_send(ADSP_IPI_DVFS_FIX_OPP_SET, &value,
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sizeof(value), 0, ADSP_A_ID);
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}
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}
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return count;
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}
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DEVICE_ATTR_WO(adsp_force_adsppll);
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DEVICE_ATTR_WO(adsp_spm_req);
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DEVICE_ATTR_WO(adsp_keep_adsppll_on);
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DEVICE_ATTR_RW(adsp_dvfs_force_opp);
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DEVICE_ATTR_RW(adsp_dvfs_set_freq);
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DEVICE_ATTR_RW(adsp_dvfs_trigger_latmon);
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static struct attribute *adsp_dvfs_attrs[] = {
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#if ADSP_SLEEP_ENABLE
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&dev_attr_adsp_force_adsppll.attr,
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&dev_attr_adsp_spm_req.attr,
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&dev_attr_adsp_keep_adsppll_on.attr,
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#endif
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&dev_attr_adsp_dvfs_force_opp.attr,
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&dev_attr_adsp_dvfs_set_freq.attr,
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&dev_attr_adsp_dvfs_trigger_latmon.attr,
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NULL,
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};
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struct attribute_group adsp_dvfs_attr_group = {
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.attrs = adsp_dvfs_attrs,
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};
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static bool is_adsp_suspend(void)
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{
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return (readl(ADSP_A_SYS_STATUS) == ADSP_STATUS_SUSPEND)
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&& (readl(ADSP_SLEEP_STATUS_REG) & ADSP_A_IS_WFI)
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&& (readl(ADSP_SLEEP_STATUS_REG) & ADSP_A_AXI_BUS_IS_IDLE);
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}
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DEFINE_MUTEX(adsp_sw_reset_mutex);
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static DEFINE_SPINLOCK(adsp_sw_reset_spinlock);
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void adsp_sw_reset(void)
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{
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unsigned long flags;
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mutex_lock(&adsp_sw_reset_mutex);
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spin_lock_irqsave(&adsp_sw_reset_spinlock, flags);
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writel((ADSP_A_SW_RSTN | ADSP_A_SW_DBG_RSTN), ADSP_A_REBOOT);
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udelay(1);
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writel(0, ADSP_A_REBOOT);
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spin_unlock_irqrestore(&adsp_sw_reset_spinlock, flags);
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mutex_unlock(&adsp_sw_reset_mutex);
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}
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void adsp_release_runstall(uint32_t release)
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{
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uint32_t reg_value;
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reg_value = readl(ADSP_HIFI3_IO_CONFIG);
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if (release) {
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writel(reg_value & ~(ADSP_RELEASE_RUNSTALL),
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ADSP_HIFI3_IO_CONFIG);
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} else {
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writel(reg_value | (ADSP_RELEASE_RUNSTALL),
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ADSP_HIFI3_IO_CONFIG);
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}
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}
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void adsp_set_clock_freq(enum adsp_clk clk)
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{
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switch (clk) {
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case CLK_ADSP_CLK26M:
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case CLK_TOP_MMPLL_D4:
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case CLK_TOP_ADSPPLL_D6:
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adsp_set_top_mux(clk);
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break;
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case CLK_TOP_ADSPPLL_D4:
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adsp_set_top_mux(clk);
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break;
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default:
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break;
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}
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}
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void adsp_A_send_spm_request(uint32_t enable)
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{
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int timeout = 1000;
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pr_debug("req spm source & ddr enable(%d)\n", enable);
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if (enable) {
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/* request infra/26M/apsrc/v18/ ddr resource */
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writel(readl(ADSP_A_SPM_REQ) | ADSP_A_SPM_SRC_BITS,
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ADSP_A_SPM_REQ);
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/* hw auto on/off ddren, disable now due to latency concern */
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// writel(ADSP_A_DDR_REQ_SEL, ADSP_A_DDREN_REQ);
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writel(readl(ADSP_A_DDREN_REQ) | ADSP_A_DDR_ENABLE,
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ADSP_A_DDREN_REQ);
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/*make sure SPM return ack*/
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while (--timeout) {
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if (readl(ADSP_A_SPM_ACK) ==
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((ADSP_A_DDR_ENABLE << 4) | ADSP_A_SPM_SRC_BITS))
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/* hw auto on/off ddren */
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// if (readl(ADSP_A_SPM_ACK) == (ADSP_A_SPM_SRC_BITS))
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break;
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udelay(10);
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if (timeout == 0)
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pr_err("[ADSP] timeout: cannot get SPM ack\n");
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}
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} else {
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writel(readl(ADSP_A_DDREN_REQ) & ~(ADSP_A_DDR_ENABLE),
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ADSP_A_DDREN_REQ);
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writel(readl(ADSP_A_SPM_REQ) & ~ADSP_A_SPM_SRC_BITS,
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ADSP_A_SPM_REQ);
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/*make sure SPM return ack*/
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while (--timeout) {
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if (readl(ADSP_A_SPM_ACK) == 0x0)
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break;
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udelay(10);
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if (timeout == 0)
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pr_err("[ADSP] timeout: cannot get SPM ack\n");
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}
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}
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}
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static void adsp_delay_off_handler(struct timer_list *list)
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{
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if (!adsp_feature_is_active())
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queue_work(adsp_workqueue, &adsp_suspend_work.work);
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__pm_relax(adsp_suspend_lock);
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}
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void adsp_start_suspend_timer(void)
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{
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mutex_lock(&adsp_timer_mutex);
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adsp_suspend_timer.function = adsp_delay_off_handler;
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//adsp_suspend_timer.data = (unsigned long)ADSP_DELAY_TIMER;
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adsp_suspend_timer.expires =
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jiffies + ADSP_DELAY_OFF_TIMEOUT;
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if (timer_pending(&adsp_suspend_timer))
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pr_debug("adsp_suspend_timer has set\n");
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else {
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__pm_stay_awake(adsp_suspend_lock); /* wake lock AP */
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add_timer(&adsp_suspend_timer);
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}
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mutex_unlock(&adsp_timer_mutex);
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}
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void adsp_stop_suspend_timer(void)
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{
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mutex_lock(&adsp_timer_mutex);
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if (timer_pending(&adsp_suspend_timer)) {
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del_timer(&adsp_suspend_timer);
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__pm_relax(adsp_suspend_lock);
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}
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mutex_unlock(&adsp_timer_mutex);
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}
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/*
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* callback function for work struct
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* @param ws: work struct
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*/
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static void adsp_suspend_ws(struct work_struct *ws)
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{
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struct adsp_work_t *sws = container_of(ws, struct adsp_work_t, work);
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enum adsp_core_id core_id = sws->id;
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mutex_lock(&adsp_feature_mutex);
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if (!adsp_feature_is_active())
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adsp_suspend(core_id);
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mutex_unlock(&adsp_feature_mutex);
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}
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#if ADSP_ITCM_MONITOR
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static unsigned int adsp_itcm_gtable[9216]; //ADSP_A_ITCM_SIZE/4
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#endif
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#if ADSP_DTCM_MONITOR
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static unsigned int adsp_dtcm_gtable[8192]; //ADPS_A_DTCM_SIZE/4
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#endif
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void adsp_sram_reset_init(void)
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{
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#if ADSP_ITCM_MONITOR
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memcpy((void *)(ADSP_A_ITCM),
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(void *)adsp_itcm_gtable,
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(size_t)ADSP_A_ITCM_SIZE);
|
|
#endif
|
|
#if ADSP_DTCM_MONITOR
|
|
memcpy((void *)(ADSP_A_DTCM),
|
|
(void *)adsp_dtcm_gtable,
|
|
(size_t)(ADSP_A_DTCM_SIZE - ADSP_A_DTCM_SHARE_SIZE));
|
|
#endif
|
|
}
|
|
|
|
|
|
void adsp_sram_gtable_init(void)
|
|
{
|
|
#if ADSP_ITCM_MONITOR
|
|
memcpy((void *)adsp_itcm_gtable,
|
|
(void *)(ADSP_A_ITCM),
|
|
(size_t)ADSP_A_ITCM_SIZE);
|
|
#endif
|
|
#if ADSP_DTCM_MONITOR
|
|
memcpy((void *)adsp_dtcm_gtable,
|
|
(void *)(ADSP_A_DTCM),
|
|
(size_t)ADSP_A_DTCM_SIZE);
|
|
#endif
|
|
|
|
}
|
|
|
|
void adsp_sram_gtable_backup(void)
|
|
{
|
|
#if ADSP_DTCM_MONITOR
|
|
memcpy((void *)adsp_dtcm_gtable,
|
|
(void *)(ADSP_A_DTCM),
|
|
(size_t)ADSP_A_DTCM_SIZE);
|
|
#endif
|
|
}
|
|
|
|
int adsp_sram_gtable_check(void)
|
|
{
|
|
int ret = 0;
|
|
int need_assert = 0;
|
|
#if (ADSP_ITCM_MONITOR || ADSP_DTCM_MONITOR)
|
|
int i;
|
|
u32 __iomem *s;
|
|
void *tcm_src = NULL;
|
|
#endif
|
|
|
|
|
|
#if ADSP_ITCM_MONITOR
|
|
tcm_src = vmalloc(sizeof(adsp_itcm_gtable));
|
|
if (!tcm_src)
|
|
return -1;
|
|
|
|
memcpy_fromio(tcm_src, (void *)(ADSP_A_ITCM),
|
|
(size_t)ADSP_A_ITCM_SIZE);
|
|
ret = memcmp((void *)adsp_itcm_gtable,
|
|
(void *)tcm_src,
|
|
sizeof(adsp_itcm_gtable));
|
|
if (ret) {
|
|
pr_notice("[%s]memcmp adsp_itcm_gtable != ITCM, ret %d\n",
|
|
__func__, ret);
|
|
s = (void *)(ADSP_A_ITCM);
|
|
for (i = 0; i < ADSP_A_ITCM_SIZE / 4; i++) {
|
|
if (adsp_itcm_gtable[i] != *s) {
|
|
pr_notice("[%s]adsp_itcm_gtable[%d](0x%x) != ITCM(0x%x)\n",
|
|
__func__, i, adsp_itcm_gtable[i], *s);
|
|
*s = adsp_itcm_gtable[i];
|
|
}
|
|
s++;
|
|
}
|
|
need_assert = 1;
|
|
}
|
|
if (tcm_src != NULL) {
|
|
vfree(tcm_src);
|
|
tcm_src = NULL;
|
|
}
|
|
#endif
|
|
#if ADSP_DTCM_MONITOR
|
|
tcm_src = vmalloc(sizeof(adsp_dtcm_gtable));
|
|
if (!tcm_src)
|
|
return -1;
|
|
|
|
memcpy_fromio(tcm_src, (void *)(ADSP_A_DTCM),
|
|
(size_t)ADSP_A_DTCM_SIZE);
|
|
ret = memcmp((void *)adsp_dtcm_gtable,
|
|
(void *)tcm_src,
|
|
(size_t)ADSP_A_DTCM_SIZE - ADSP_A_DTCM_SHARE_SIZE);
|
|
if (ret) {
|
|
pr_notice("[%s]memcmp adsp_dtcm_gtable != DTCM, ret %d\n",
|
|
__func__, ret);
|
|
s = (void *)(ADSP_A_DTCM);
|
|
for (i = 0;
|
|
i < (ADSP_A_DTCM_SIZE - ADSP_A_DTCM_SHARE_SIZE) / 4;
|
|
i++) {
|
|
if (adsp_dtcm_gtable[i] != *s) {
|
|
pr_notice("[%s]adsp_dtcm_gtable[%d](0x%x) != DTCM(0x%x)\n",
|
|
__func__, i, adsp_dtcm_gtable[i], *s);
|
|
*s = adsp_dtcm_gtable[i];
|
|
}
|
|
s++;
|
|
}
|
|
need_assert = 1;
|
|
}
|
|
if (tcm_src != NULL) {
|
|
vfree(tcm_src);
|
|
tcm_src = NULL;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_MTK_AEE_FEATURE
|
|
if (need_assert)
|
|
aee_kernel_exception_api(__FILE__,
|
|
__LINE__,
|
|
DB_OPT_DEFAULT,
|
|
"[ADSP]",
|
|
"ASSERT: adsp tcm check fail!!");
|
|
#endif
|
|
return ret;
|
|
}
|
|
|
|
int adsp_suspend_init(void)
|
|
{
|
|
INIT_WORK(&adsp_suspend_work.work, adsp_suspend_ws);
|
|
adsp_suspend_lock = wakeup_source_register(NULL,
|
|
"adsp suspend wakelock");
|
|
timer_setup(&adsp_suspend_timer, adsp_delay_off_handler, 0);
|
|
adsp_is_suspend = 0;
|
|
adsp_sram_gtable_init();
|
|
adsp_sram_gtable_backup();
|
|
return 0;
|
|
}
|
|
|
|
/* actually execute suspend flow, which cannot be disabled.
|
|
* retry the resume flow after adsp_ready = 0.
|
|
*/
|
|
void adsp_suspend(enum adsp_core_id core_id)
|
|
{
|
|
enum adsp_ipi_status ret;
|
|
int value = 0;
|
|
int timeout = 20000;
|
|
#if ADSP_DVFS_PROFILE
|
|
ktime_t begin, end;
|
|
#endif
|
|
mutex_lock(&adsp_suspend_mutex);
|
|
if ((is_adsp_ready(core_id) == 1) && !adsp_is_suspend) {
|
|
#if ADSP_DVFS_PROFILE
|
|
begin = ktime_get();
|
|
#endif
|
|
adsp_timesync_suspend(0);
|
|
|
|
ret = scp_send_msg_to_queue(AUDIO_OPENDSP_USE_HIFI3_A,
|
|
ADSP_IPI_DVFS_SUSPEND,
|
|
&value, sizeof(value), 100);
|
|
|
|
while (--timeout && !is_adsp_suspend())
|
|
usleep_range(100, 200);
|
|
|
|
if (!is_adsp_suspend()) {
|
|
pr_info("[%s]wait adsp suspend timeout ret(%d,%d)\n",
|
|
__func__, ret, timeout);
|
|
#ifdef CFG_RECOVERY_SUPPORT
|
|
adsp_send_reset_wq(ADSP_RESET_TYPE_AWAKE, core_id);
|
|
#else
|
|
adsp_aed(EXCEP_KERNEL, core_id);
|
|
#endif
|
|
} else {
|
|
adsp_release_runstall(false);
|
|
adsp_sram_gtable_backup();
|
|
adsp_power_on(false);
|
|
adsp_is_suspend = 1;
|
|
}
|
|
adsp_reset_ready(core_id);
|
|
#if ADSP_DVFS_PROFILE
|
|
end = ktime_get();
|
|
pr_debug("[%s]latency = %lld us, ret(%d)\n",
|
|
__func__, ktime_us_delta(end, begin), ret);
|
|
#endif
|
|
}
|
|
mutex_unlock(&adsp_suspend_mutex);
|
|
}
|
|
|
|
|
|
int adsp_resume(void)
|
|
{
|
|
int retry = 20000;
|
|
int ret = 0;
|
|
int tcm_ret = 0;
|
|
#if ADSP_DVFS_PROFILE
|
|
ktime_t begin, end;
|
|
#endif
|
|
mutex_lock(&adsp_suspend_mutex);
|
|
if ((is_adsp_ready(ADSP_A_ID) == 0) && adsp_is_suspend) {
|
|
#if ADSP_DVFS_PROFILE
|
|
begin = ktime_get();
|
|
#endif
|
|
adsp_power_on(true);
|
|
tcm_ret = adsp_sram_gtable_check();
|
|
/* To indicate only main_lite() is needed. */
|
|
writel(MAGIC_PATTERN, CREG_BOOTUP_MARK);
|
|
DRV_ClrReg32(ADSP_A_WDT_REG, WDT_EN_BIT);
|
|
adsp_release_runstall(true);
|
|
|
|
/* busy waiting until adsp is ready */
|
|
while (--retry && (is_adsp_ready(ADSP_A_ID) != 1))
|
|
usleep_range(100, 200);
|
|
|
|
if (is_adsp_ready(ADSP_A_ID) != 1) {
|
|
pr_warn("[%s]wait for adsp ready timeout\n", __func__);
|
|
/* something wrong , dump adsp */
|
|
#ifdef CFG_RECOVERY_SUPPORT
|
|
adsp_send_reset_wq(ADSP_RESET_TYPE_AWAKE, ADSP_A_ID);
|
|
#else
|
|
adsp_aed(EXCEP_KERNEL, ADSP_A_ID);
|
|
#endif
|
|
ret = -ETIME;
|
|
}
|
|
adsp_timesync_resume();
|
|
adsp_is_suspend = 0;
|
|
#if ADSP_DVFS_PROFILE
|
|
end = ktime_get();
|
|
pr_debug("[%s]latency = %lld us, tcm_check(%d), ret(%d)\n",
|
|
__func__, ktime_us_delta(end, begin), tcm_ret, ret);
|
|
#endif
|
|
}
|
|
mutex_unlock(&adsp_suspend_mutex);
|
|
return ret;
|
|
}
|
|
|
|
void adsp_reset(void)
|
|
{
|
|
uint32_t reg_val = 0;
|
|
#if ADSP_DVFS_PROFILE
|
|
ktime_t begin = ktime_get();
|
|
ktime_t end;
|
|
#endif
|
|
adsp_reset_ready(ADSP_A_ID);
|
|
adsp_release_runstall(false);
|
|
|
|
adsp_power_on(false);
|
|
adsp_power_on(true);
|
|
|
|
writel(0, CREG_BOOTUP_MARK);
|
|
writel(0x0, ADSP_A_IRQ_EN);
|
|
reg_val = readl(ADSP_A_WDT_REG) & ~(WDT_EN_BIT);
|
|
writel(reg_val, ADSP_A_WDT_REG);
|
|
|
|
/** TCM back to initial state **/
|
|
adsp_sram_reset_init();
|
|
|
|
dsb(SY);
|
|
adsp_release_runstall(true);
|
|
adsp_is_suspend = 0;
|
|
#if ADSP_DVFS_PROFILE
|
|
end = ktime_get();
|
|
pr_debug("[%s]latency = %lld us\n",
|
|
__func__, ktime_us_delta(end, begin));
|
|
#endif
|
|
}
|
|
|
|
void mt_adsp_dvfs_ipi_init(void)
|
|
{
|
|
}
|
|
int __init adsp_dvfs_init(void)
|
|
{
|
|
adsp_is_force_freq = 0;
|
|
adsp_is_force_trigger_latmon = 0;
|
|
|
|
adspreg.active_clksrc = CLK_TOP_ADSPPLL_D6;
|
|
|
|
return 0;
|
|
}
|
|
void __exit adsp_dvfs_exit(void)
|
|
{
|
|
}
|
|
|