154 lines
7.7 KiB
C
154 lines
7.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __sleep_def_h__
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#define __sleep_def_h__
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/*
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* Auto generated by DE, please DO NOT modify this file directly.
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*/
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/* --- SPM Flag Define --- */
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#define SPM_FLAG_DIS_CPU_PDN (1U << 0)
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#define SPM_FLAG_DIS_INFRA_PDN (1U << 1)
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#define SPM_FLAG_DIS_DDRPHY_PDN (1U << 2)
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#define SPM_FLAG_DIS_VCORE_DVS (1U << 3)
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#define SPM_FLAG_DIS_VCORE_DFS (1U << 4)
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#define SPM_FLAG_DIS_DPD (1U << 5)
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#define SPM_FLAG_DIS_BUS_CLOCK_OFF (1U << 6)
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#define SPM_FLAG_DIS_ATF_ABORT (1U << 7)
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#define SPM_FLAG_KEEP_CSYSPWRUPACK_HIGH (1U << 8)
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#define SPM_FLAG_DIS_VPROC_VSRAM_DVS (1U << 9)
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#define SPM_FLAG_RUN_COMMON_SCENARIO (1U << 10)
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#define SPM_FLAG_EN_MET_DEBUG_USAGE (1U << 11)
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#define SPM_FLAG_SODI_CG_MODE (1U << 12)
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#define SPM_FLAG_SODI_NO_EVENT (1U << 13)
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#define SPM_FLAG_ENABLE_SODI3 (1U << 14)
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#define SPM_FLAG_ENABLE_SODI2P5 (1U << 15)
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#define SPM_FLAG_DIS_SYSRAM_SLEEP (1U << 16)
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#define SPM_FLAG_DIS_SSPM_SRAM_SLEEP (1U << 17)
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#define SPM_FLAG_DIS_VMODEM_DVS (1U << 18)
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#define SPM_FLAG_SUSPEND_OPTION (1U << 19)
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#define SPM_FLAG_DEEPIDLE_OPTION (1U << 20)
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#define SPM_FLAG_SODI_OPTION (1U << 21)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT22 (1U << 22)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT23 (1U << 23)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT24 (1U << 24)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT25 (1U << 25)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT26 (1U << 26)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT27 (1U << 27)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT28 (1U << 28)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT29 (1U << 29)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT30 (1U << 30)
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#define SPM_FLAG_SPM_FLAG_DONT_TOUCH_BIT31 (1U << 31)
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/* --- SPM Flag1 Define --- */
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#define SPM_FLAG1_ENABLE_VPROC_BY_MT6311 (1U << 0)
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#define SPM_FLAG1_ENABLE_CPU_DORMANT (1U << 1)
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#define SPM_FLAG1_ENABLE_CPU_SLEEP_VOLT (1U << 2)
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#define SPM_FLAG1_DIS_PWRAP_CLK_SWITCH (1U << 3)
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#define SPM_FLAG1_DIS_ULPOSC_OFF (1U << 4)
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#define SPM_FLAG1_EFUSE_ON_0P7V_3200 (1U << 5)
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#define SPM_FLAG1_DISABLE_MCDSR (1U << 6)
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#define SPM_FLAG1_DISABLE_NO_RESUME (1U << 7)
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#define SPM_FLAG1_DIS_ARMPLL_OFF (1U << 8)
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#define SPM_FLAG1_DIS_AXI_BUS_TO_26M (1U << 9)
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#define SPM_FLAG1_DIS_IMP_DIS (1U << 10)
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#define SPM_FLAG1_DIS_IMP_COPY (1U << 11)
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#define SPM_FLAG1_DIS_EMI_TOGGLE_WORKAROUND (1U << 12)
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#define SPM_FLAG1_DIS_DRAM_ENTER_SREF (1U << 13)
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#define SPM_FLAG1_DIS_DRAM_DLL_OFF (1U << 14)
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#define SPM_FLAG1_DIS_PHYPLL_OFF (1U << 15)
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#define SPM_FLAG1_DIS_MPLL_OFF (1U << 16)
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#define SPM_FLAG1_DIS_SYSPLL_OFF (1U << 17)
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#define SPM_FLAG1_DIS_TOP_AXI_CLK_OFF (1U << 18)
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#define SPM_FLAG1_DIS_PCM_26M_SWITCH (1U << 19)
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#define SPM_FLAG1_DIS_CKSQ_OFF (1U << 20)
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#define SPM_FLAG1_DIS_SRCVOLTEN_OFF (1U << 21)
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#define SPM_FLAG1_DIS_CHB_CG_FREE_EN (1U << 22)
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#define SPM_FLAG1_DIS_CHA_DCM_RES (1U << 23)
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#define SPM_FLAG1_DIS_SW_MR4 (1U << 24)
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#define SPM_FLAG1_RESERVED_BIT25 (1U << 25)
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#define SPM_FLAG1_RESERVED_BIT26 (1U << 26)
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#define SPM_FLAG1_RESERVED_BIT27 (1U << 27)
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#define SPM_FLAG1_RESERVED_BIT28 (1U << 28)
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#define SPM_FLAG1_RESERVED_BIT29 (1U << 29)
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#define SPM_FLAG1_RESERVED_BIT30 (1U << 30)
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#define SPM_FLAG1_RESERVED_BIT31 (1U << 31)
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/* --- SPM DEBUG Define --- */
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#define SPM_DBG_DEBUG_IDX_26M_WAKE (1U << 0)
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#define SPM_DBG_DEBUG_IDX_26M_SLEEP (1U << 1)
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#define SPM_DBG_DEBUG_IDX_INFRA_WAKE (1U << 2)
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#define SPM_DBG_DEBUG_IDX_INFRA_SLEEP (1U << 3)
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#define SPM_DBG_DEBUG_IDX_APSRC_WAKE (1U << 4)
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#define SPM_DBG_DEBUG_IDX_APSRC_SLEEP (1U << 5)
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#define SPM_DBG_DEBUG_IDX_VRF18_WAKE (1U << 6)
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#define SPM_DBG_DEBUG_IDX_VRF18_SLEEP (1U << 7)
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#define SPM_DBG_DEBUG_IDX_DDREN_WAKE (1U << 8)
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#define SPM_DBG_DEBUG_IDX_DDREN_SLEEP (1U << 9)
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#define SPM_DBG_DEBUG_IDX_NFC_CKBUF_ON (1U << 10)
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#define SPM_DBG_DEBUG_IDX_NFC_CKBUF_OFF (1U << 11)
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#define SPM_DBG_DEBUG_IDX_CPU_PDN (1U << 12)
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#define SPM_DBG_DEBUG_IDX_DPD (1U << 13)
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#define SPM_DBG_DEBUG_IDX_CONN_CKBUF_ON (1U << 14)
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#define SPM_DBG_DEBUG_IDX_CONN_CKBUF_OFF (1U << 15)
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#define SPM_DBG_DEBUG_IDX_VCORE_DVFS_START (1U << 16)
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#define SPM_DBG_DEBUG_IDX_DDREN2_WAKE (1U << 17)
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#define SPM_DBG_DEBUG_IDX_DDREN2_SLEEP (1U << 18)
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#define SPM_DBG_DEBUG_IDX_SSPM_WFI (1U << 19)
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#define SPM_DBG_DEBUG_IDX_SSPM_SRAM_SLP (1U << 20)
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#define SPM_DBG_RESERVED_BIT21 (1U << 21)
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#define SPM_DBG_RESERVED_BIT22 (1U << 22)
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#define SPM_DBG_RESERVED_BIT23 (1U << 23)
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#define SPM_DBG_RESERVED_BIT24 (1U << 24)
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#define SPM_DBG_RESERVED_BIT25 (1U << 25)
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#define SPM_DBG_RESERVED_BIT26 (1U << 26)
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#define SPM_DBG_SODI1_FLAG (1U << 27)
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#define SPM_DBG_SODI3_FLAG (1U << 28)
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#define SPM_DBG_VCORE_DVFS_FLAG (1U << 29)
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#define SPM_DBG_DEEPIDLE_FLAG (1U << 30)
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#define SPM_DBG_SUSPEND_FLAG (1U << 31)
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/* --- SPM DEBUG1 Define --- */
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#define SPM_DBG1_DRAM_SREF_ACK_TO (1U << 0)
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#define SPM_DBG1_PWRAP_SLEEP_ACK_TO (1U << 1)
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#define SPM_DBG1_PWRAP_SPI_ACK_TO (1U << 2)
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#define SPM_DBG1_DRAM_GATE_ERR_DDREN_WAKEUP (1U << 3)
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#define SPM_DBG1_DRAM_GATE_ERR_LEAVE_LP_SCN (1U << 4)
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#define SPM_DBG1_RESERVED_BIT5 (1U << 5)
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#define SPM_DBG1_RESERVED_BIT6 (1U << 6)
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#define SPM_DBG1_RESERVED_BIT7 (1U << 7)
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#define SPM_DBG1_RESERVED_BIT8 (1U << 8)
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#define SPM_DBG1_RESERVED_BIT9 (1U << 9)
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#define SPM_DBG1_RESERVED_BIT10 (1U << 10)
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#define SPM_DBG1_RESERVED_BIT11 (1U << 11)
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#define SPM_DBG1_RESERVED_BIT12 (1U << 12)
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#define SPM_DBG1_RESERVED_BIT13 (1U << 13)
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#define SPM_DBG1_RESERVED_BIT14 (1U << 14)
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#define SPM_DBG1_RESERVED_BIT15 (1U << 15)
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#define SPM_DBG1_RESERVED_BIT16 (1U << 16)
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#define SPM_DBG1_RESERVED_BIT17 (1U << 17)
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#define SPM_DBG1_RESERVED_BIT18 (1U << 18)
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#define SPM_DBG1_RESERVED_BIT19 (1U << 19)
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#define SPM_DBG1_RESERVED_BIT20 (1U << 20)
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#define SPM_DBG1_RESERVED_BIT21 (1U << 21)
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#define SPM_DBG1_RESERVED_BIT22 (1U << 22)
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#define SPM_DBG1_RESERVED_BIT23 (1U << 23)
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#define SPM_DBG1_RESERVED_BIT24 (1U << 24)
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#define SPM_DBG1_RESERVED_BIT25 (1U << 25)
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#define SPM_DBG1_RESERVED_BIT26 (1U << 26)
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#define SPM_DBG1_RESERVED_BIT27 (1U << 27)
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#define SPM_DBG1_RESERVED_BIT28 (1U << 28)
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#define SPM_DBG1_RESERVED_BIT29 (1U << 29)
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#define SPM_DBG1_RESERVED_BIT30 (1U << 30)
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#define SPM_DBG1_RESERVED_BIT31 (1U << 31)
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/*
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* Macro and Inline
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*/
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#define is_cpu_pdn(flags) (!((flags) & SPM_FLAG_DIS_CPU_PDN))
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#define is_infra_pdn(flags) (!((flags) & SPM_FLAG_DIS_INFRA_PDN))
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#define is_ddrphy_pdn(flags) (!((flags) & SPM_FLAG_DIS_DDRPHY_PDN))
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#endif /* __sleep_def_h__ */
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