54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef __MDP_BASE_H__
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#define __MDP_BASE_H__
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#define MDP_HW_CHECK
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static u32 mdp_engine_port[ENGBASE_COUNT] = {
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0, /*ENGBASE_MMSYS_CONFIG*/
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0, /*ENGBASE_MDP_RDMA0*/
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0, /*ENGBASE_MDP_RDMA1*/
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0, /*ENGBASE_MDP_RSZ0*/
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0, /*ENGBASE_MDP_RSZ1*/
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0, /*ENGBASE_MDP_WROT0*/
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0, /*ENGBASE_MDP_WROT1*/
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0, /*ENGBASE_MDP_WDMA*/
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0, /*ENGBASE_MDP_TDSHP0*/
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0, /*ENGBASE_MDP_COLOR0*/
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0, /*ENGBASE_MDP_AAL0*/
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0, /*ENGBASE_MDP_CCORR0*/
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0, /*ENGBASE_MDP_HDR0*/
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0, /*ENGBASE_MMSYS_MUTEX*/
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0, /*ENGBASE_ISP_MFB*/
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0, /*ENGBASE_IMGSYS*/
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0, /*ENGBASE_ISP_DIP1*/
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0, /*ENGBASE_ISP_WPE_A*/
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};
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static u32 mdp_base[] = {
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[ENGBASE_MMSYS_CONFIG] = 0x14000000,
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[ENGBASE_MDP_RDMA0] = 0x14001000,
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[ENGBASE_MDP_RDMA1] = 0x14002000,
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[ENGBASE_MDP_RSZ0] = 0x14003000,
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[ENGBASE_MDP_RSZ1] = 0x14004000,
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[ENGBASE_MDP_WROT0] = 0x14005000,
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[ENGBASE_MDP_WROT1] = 0x14020000,
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[ENGBASE_MDP_WDMA] = 0x1400d000,
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[ENGBASE_MDP_TDSHP0] = 0x14007000,
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[ENGBASE_MDP_COLOR0] = 0x1400e000,
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[ENGBASE_MDP_AAL0] = 0x1401b000,
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[ENGBASE_MDP_CCORR0] = 0x10000000,
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[ENGBASE_MDP_HDR0] = 0x1401c000,
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[ENGBASE_MMSYS_MUTEX] = 0x14016000,
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[ENGBASE_ISP_MFB] = 0x15010000,
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[ENGBASE_IMGSYS] = 0x15020000,
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[ENGBASE_ISP_DIP1] = 0x15021000,
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[ENGBASE_ISP_WPE_A] = 0x15011000,
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[ENGBASE_ISP_DIP2] = 0x15022000,
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};
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#endif
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