32 lines
841 B
C
32 lines
841 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 MediaTek Inc.
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*/
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#ifndef __MODEM_REG_BASE_H__
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#define __MODEM_REG_BASE_H__
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/* ============================================================ */
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/* Modem 1 part */
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/* ============================================================ */
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#define MD_BOOT_VECTOR_EN 0x20000024
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#define INFRA_AO_MD_SRCCLKENA (0xF0C) /* SRC CLK ENA */
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#define MD_PCORE_PCCIF_BASE 0x20510000
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#define CCIF_SRAM_SIZE 512
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/*========== MD Exception dump register list start[ */
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/*MD bootup register*/
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#define MD1_CFG_BASE (0x1020E300)
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#define MD1_BOOT_STATS_SELECT (0x1020E700)
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#define MD1_CFG_BOOT_STATS (MD1_CFG_BASE+0x00)
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/*md l2sram base */
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#define MD_L2SRAM_BASE (0x0D0CF000)
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#define MD_L2SRAM_SIZE (0x1000)
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/* MD Exception dump register list end]======== */
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#endif /* __MODEM_REG_BASE_H__ */
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