168 lines
4.5 KiB
C
168 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2021 MediaTek Inc.
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*/
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#include <generated/autoconf.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/seq_file.h>
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#include <linux/uaccess.h>
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#include <linux/debugfs.h>
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#include <mt-plat/upmu_common.h>
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#include "include/pmic.h"
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#include "include/pmic_debugfs.h"
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/*
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* PMIC debug level
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*/
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unsigned int pmic_dbg_level_set(unsigned int level)
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{
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unsigned char Dlevel = (level & 0x7);
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unsigned char HKlevel = (level & 0x38) >> 3;
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unsigned char COMlevel = (level & 0x1C0) >> 6;
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unsigned char IRQlevel = (level & 0xE00) >> 9;
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unsigned char REGlevel = (level & 0x7000) >> 12;
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gPMICDbgLvl = Dlevel > PMIC_LOG_DBG ? PMIC_LOG_DBG : Dlevel;
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gPMICHKDbgLvl = HKlevel > PMIC_LOG_DBG ? PMIC_LOG_DBG : HKlevel;
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gPMICCOMDbgLvl = COMlevel > PMIC_LOG_DBG ? PMIC_LOG_DBG : COMlevel;
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gPMICIRQDbgLvl = IRQlevel > PMIC_LOG_DBG ? PMIC_LOG_DBG : IRQlevel;
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gPMICREGDbgLvl = REGlevel > PMIC_LOG_DBG ? PMIC_LOG_DBG : REGlevel;
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return 0;
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}
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/*
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* PMIC reg dump log
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*/
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void pmic_dump_register(struct seq_file *m)
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{
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const PMU_FLAG_TABLE_ENTRY *pFlag =
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&pmu_flags_table[PMU_COMMAND_MAX - 1];
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unsigned int i = 0;
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PMICLOG("dump PMIC register\n");
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for (i = 0; i < (pFlag->offset - 10); i = i + 10) {
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PMICLOG(
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"[0x%x]=0x%x [0x%x]=0x%x [0x%x]=0x%x [0x%x]=0x%x [0x%x]=0x%x\n"
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, i, upmu_get_reg_value(i)
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, i + 2, upmu_get_reg_value(i + 2)
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, i + 4, upmu_get_reg_value(i + 4)
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, i + 6, upmu_get_reg_value(i + 6)
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, i + 8, upmu_get_reg_value(i + 8));
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if (m == NULL)
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continue;
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seq_printf(m,
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"R[0x%x]=0x%x [0x%x]=0x%x [0x%x]=0x%x [0x%x]=0x%x [0x%x]=0x%x\n"
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, i, upmu_get_reg_value(i)
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, i + 2, upmu_get_reg_value(i + 2)
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, i + 4, upmu_get_reg_value(i + 4)
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, i + 6, upmu_get_reg_value(i + 6)
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, i + 8, upmu_get_reg_value(i + 8));
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}
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}
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/*
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* PMIC dump exception status
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*/
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/* Kernel dump log */
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void kernel_dump_exception_reg(void)
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{
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/* 1.UVLO off */
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kernel_output_reg(MT6357_TOP_RST_STATUS);
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kernel_output_reg(MT6357_PONSTS);
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kernel_output_reg(MT6357_POFFSTS);
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/* 2.thermal shutdown 150 */
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kernel_output_reg(MT6357_THERMALSTATUS);
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/* 3.power not good */
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kernel_output_reg(MT6357_PG_SDN_STS0);
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/* 4.BUCK OC status */
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kernel_output_reg(MT6357_OC_SDN_STS0);
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kernel_output_reg(MT6357_BUCK_TOP_OC_CON0);
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/* 4.5 BUCK OC shutdown control */
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kernel_output_reg(MT6357_BUCK_TOP_ELR0);
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/* 5.long press shutdown */
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kernel_output_reg(MT6357_STRUP_CON4);
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/* 6.WDTRST */
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kernel_output_reg(MT6357_TOP_RST_MISC);
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/* 7.CLK TRIM */
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kernel_output_reg(MT6357_TOP_CLK_TRIM);
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}
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/* Kernel & UART dump log */
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void both_dump_exception_reg(struct seq_file *s)
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{
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/* 1.UVLO off */
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both_output_reg(MT6357_TOP_RST_STATUS);
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both_output_reg(MT6357_PONSTS);
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both_output_reg(MT6357_POFFSTS);
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/* 2.thermal shutdown 150 */
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both_output_reg(MT6357_THERMALSTATUS);
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/* 3.power not good */
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both_output_reg(MT6357_PG_SDN_STS0);
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/* 4.BUCK OC */
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both_output_reg(MT6357_OC_SDN_STS0);
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both_output_reg(MT6357_BUCK_TOP_OC_CON0);
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/* 4.5 BUCK OC shutdown control */
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both_output_reg(MT6357_BUCK_TOP_ELR0);
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/* 5.long press shutdown */
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both_output_reg(MT6357_STRUP_CON4);
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/* 6.WDTRST */
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both_output_reg(MT6357_TOP_RST_MISC);
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/* 7.CLK TRIM */
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both_output_reg(MT6357_TOP_CLK_TRIM);
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}
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/* dump exception reg in kernel and clean status */
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int pmic_dump_exception_reg(void)
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{
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int ret_val = 0;
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kernel_dump_exception_reg();
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/* clear UVLO off */
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ret_val = pmic_set_register_value(PMIC_TOP_RST_STATUS_CLR, 0xFFFF);
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/* clear thermal shutdown 150 */
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ret_val = pmic_set_register_value(PMIC_RG_STRUP_THR_CLR, 0x1);
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udelay(200);
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ret_val = pmic_set_register_value(PMIC_RG_STRUP_THR_CLR, 0x0);
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/* clear power off status(POFFSTS) and PG status and BUCK OC status */
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ret_val = pmic_set_register_value(PMIC_RG_POFFSTS_CLR, 0x1);
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udelay(200);
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ret_val = pmic_set_register_value(PMIC_RG_POFFSTS_CLR, 0x0);
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/* clear Long press shutdown */
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ret_val = pmic_set_register_value(PMIC_CLR_JUST_RST, 0x1);
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udelay(200);
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ret_val = pmic_set_register_value(PMIC_CLR_JUST_RST, 0x0);
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udelay(200);
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PMICLOG(PMICTAG "[pmic_boot_status] JUST_PWRKEY_RST=0x%x\n",
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pmic_get_register_value(PMIC_JUST_PWRKEY_RST));
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/* clear WDTRSTB_STATUS */
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ret_val = pmic_set_register_value(PMIC_TOP_RST_MISC_SET, 0x8);
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udelay(100);
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ret_val = pmic_set_register_value(PMIC_TOP_RST_MISC_CLR, 0x8);
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/* clear BUCK OC */
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ret_val = pmic_config_interface(MT6357_BUCK_TOP_OC_CON0, 0xFF, 0xFF, 0);
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udelay(200);
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/* clear Additional(TBD) */
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/* add mdelay for output the log in buffer */
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mdelay(500);
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return ret_val;
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}
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