1551 lines
88 KiB
C
1551 lines
88 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#ifndef __PMIC_WRAP_INIT_H__
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#define __PMIC_WRAP_INIT_H__
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/****** SW ENV define *************************************/
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#define PMIC_WRAP_PRELOADER 0
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#define PMIC_WRAP_LK 0
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#define PMIC_WRAP_KERNEL 1
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#define PMIC_WRAP_SCP 0
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#define PMIC_WRAP_CTP 0
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#define PMIC_WRAP_DEBUG
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#define PMIC_WRAP_SUPPORT
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#define PMIC_WRAP_CRC_SUPPORT
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#define PMIC_WRAP_MONITOR_SUPPORT
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/* #define PMIC_WRAP_MATCH_SUPPORT */
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/****** For BringUp. if BringUp doesn't had PMIC, need open this ***********/
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#if (PMIC_WRAP_PRELOADER)
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#if CFG_FPGA_PLATFORM
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#define PMIC_WRAP_NO_PMIC
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#else
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/* #define PWRAP_TIMEOUT */
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#endif
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#elif (PMIC_WRAP_LK)
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#if defined(MACH_FPGA)
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#define PMIC_WRAP_NO_PMIC
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#else
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#define PWRAP_TIMEOUT
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#endif
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#elif (PMIC_WRAP_KERNEL)
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#if defined(CONFIG_MTK_FPGA) || defined(CONFIG_FPGA_EARLY_PORTING)
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#define PMIC_WRAP_NO_PMIC
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#else
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#if defined CONFIG_MTK_PMIC_WRAP
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#define PMIC_WRAP_NO_PMIC
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#endif
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#define PWRAP_TIMEOUT
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#endif
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#elif (PMIC_WRAP_CTP)
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#if defined(CONFIG_MTK_FPGA)
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#define PMIC_WRAP_NO_PMIC
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#else
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/* #define PWRAP_TIMEOUT */
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#endif
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#else
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#define PWRAP_TIMEOUT
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#endif
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#define MTK_PLATFORM_MT6359 1
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#define PMIC_WRAP_ULPOSC_CAL 1
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/****** SW ENV header define *****************************/
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#if (PMIC_WRAP_PRELOADER)
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#include <sync_write.h>
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#include <typedefs.h>
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#include <gpio.h>
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#include <mt6785.h>
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#elif (PMIC_WRAP_LK)
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#include <debug.h>
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#include <platform/mt_typedefs.h>
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#include <platform/mt_reg_base.h>
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#include <platform/mt_gpt.h>
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#include <platform/mt_irq.h>
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#include <sys/types.h>
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#include <platform/sync_write.h>
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#include <platform/upmu_hw.h>
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#elif (PMIC_WRAP_KERNEL)
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#ifndef CONFIG_OF
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#include <mach/mtk_reg_base.h>
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#include <mach/mtk_irq.h>
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#endif
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#include "mt-plat/sync_write.h"
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#elif (PMIC_WRAP_SCP)
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#include "stdio.h"
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#include <string.h>
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#include "FreeRTOS.h"
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#elif (PMIC_WRAP_CTP)
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#include <sync_write.h>
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#include <typedefs.h>
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#include <reg_base.H>
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#else
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### Compile error, check SW ENV define
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#endif
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/*******************macro for regsister@PMIC *******************************/
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#if (PMIC_WRAP_KERNEL)
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#include <mach/upmu_hw.h>
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#else
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#include <upmu_hw.h>
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#endif
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/*******************start ---external API********************************/
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extern signed int pwrap_read(unsigned int adr, unsigned int *rdata);
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extern signed int pwrap_write(unsigned int adr, unsigned int wdata);
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extern signed int pwrap_write_nochk(unsigned int adr, unsigned int wdata);
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extern signed int pwrap_read_nochk(unsigned int adr, unsigned int *rdata);
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extern signed int pwrap_wacs2(unsigned int write, unsigned int adr,
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unsigned int wdata, unsigned int *rdata);
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extern signed int pwrap_wacs2_read(unsigned int adr, unsigned int *rdata);
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extern signed int pwrap_wacs2_write(unsigned int adr, unsigned int wdata);
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extern void pwrap_dump_all_register(void);
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extern signed int pwrap_init_preloader(void);
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extern signed int pwrap_init_lk(void);
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extern signed int pwrap_init_scp(void);
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extern signed int pwrap_init(void);
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/****** DEBUG marco define *******************************/
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#define PWRAPTAG "[PWRAP] "
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#if (PMIC_WRAP_PRELOADER)
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#ifdef PMIC_WRAP_DEBUG
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#define PWRAPFUC(fmt, arg...) print(PWRAPTAG "%s\n", __func__)
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#define PWRAPLOG(fmt, arg...) print(PWRAPTAG fmt, ##arg)
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#define PWRAPERR(fmt, arg...) print(PWRAPTAG "ERR " fmt, ##arg)
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#else
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#define PWRAPFUC(fmt, arg...)
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#define PWRAPLOG(fmt, arg...)
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#define PWRAPERR(fmt, arg...)
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#endif /* end of #ifdef PMIC_WRAP_DEBUG */
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#define PWRAPCRI(fmt, arg...) print(PWRAPTAG fmt, ##arg)
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#elif (PMIC_WRAP_LK)
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#ifdef PMIC_WRAP_DEBUG
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#define PWRAPFUC(fmt, arg...) \
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dprintf(CRITICAL, PWRAPTAG "%s\n", __func__)
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#define PWRAPLOG(fmt, arg...) \
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dprintf(CRITICAL, PWRAPTAG fmt, ##arg)
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#else
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#define PWRAPFUC(fmt, arg...)
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#define PWRAPLOG(fmt, arg...)
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#endif /* end of #ifdef PMIC_WRAP_DEBUG */
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#define PWRAPERR(fmt, arg...) \
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dprintf(CRITICAL, PWRAPTAG "ERR,line=%d " fmt, __LINE__, ##arg)
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#elif (PMIC_WRAP_KERNEL)
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#elif (PMIC_WRAP_SCP)
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#ifdef PMIC_WRAP_DEBUG
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#define PWRAPFUC(fmt, arg...) \
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PRINTF_D(PWRAPTAG "%s\n", __func__)
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#define PWRAPLOG(fmt, arg...) \
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PRINTF_D(PWRAPTAG fmt, ##arg)
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#else
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#define PWRAPFUC(fmt, arg...)
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#define PWRAPLOG(fmt, arg...)
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#endif /* end of #ifdef PMIC_WRAP_DEBUG */
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#define PWRAPERR(fmt, arg...) \
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PRINTF_E(PWRAPTAG "ERR, line=%d " fmt, __LINE__, ##arg)
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#elif (PMIC_WRAP_CTP)
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#ifdef PMIC_WRAP_DEBUG
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#define PWRAPFUC(fmt, arg...) \
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dbg_print(PWRAPTAG "%s\n", __func__)
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#define PWRAPLOG(fmt, arg...) \
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dbg_print(PWRAPTAG fmt, ##arg)
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#else
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#define PWRAPFUC(fmt, arg...) \
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dbg_print(PWRAPTAG "%s\n", __func__)
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#define PWRAPLOG(fmt, arg...) \
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dbg_print(PWRAPTAG fmt, ##arg)
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#endif /* end of #ifdef PMIC_WRAP_DEBUG */
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#define PWRAPERR(fmt, arg...) \
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dbg_print(PWRAPTAG "ERR,line=%d " fmt, __LINE__, ##arg)
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#else
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### Compile error, check SW ENV define
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#endif
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/**********************************************************/
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/*********** platform info, PMIC info ********************/
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#define PMIC_WRAP_REG_RANGE (250)
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#define CLK_26M_PRD (3846)
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#define CLK_ULPOSC_PRD (3846)
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#define DEFAULT_VALUE_READ_TEST (0x5aa5)
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#define DEFAULT_VALUE_WRITE_TEST (0xa55a)
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#define PWRAP_WRITE_TEST_VALUE (0x1234)
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#define PWRAP_EXT_WRITE_TEST_VALUE (0x4321)
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#ifdef CONFIG_OF
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extern void __iomem *pwrap_base;
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#define PMIC_WRAP_BASE (pwrap_base)
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#define MT_PMIC_WRAP_IRQ_ID (pwrap_irq)
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#define INFRACFG_AO_REG_BASE (infracfg_ao_base)
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#define TOPCKGEN_BASE (topckgen_base)
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#define SCP_CLK_CTRL_BASE (scp_clk_ctrl_base)
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#define PMIC_WRAP_P2P_BASE (pwrap_p2p_base)
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#define IOCFG_RM_BASE (0x11C20000)
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#define MODEM_TEMP_SHARE_BASE (modem_temp_share_base)
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#else
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#define PMIC_WRAP_BASE (PWRAP_BASE)
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#define MT_PMIC_WRAP_IRQ_ID (PMIC_WRAP_ERR_IRQ_BIT_ID)
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#define INFRACFG_AO_BASE (0x10001000)
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#define INFRACFG_AO_REG_BASE (INFRACFG_AO_BASE)
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#define CKSYS_BASE (0x10000000)
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#define TOPCKGEN_BASE (CKSYS_BASE)
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#define IOCFG_RM_BASE (0x11C20000)
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#define MODEM_TEMP_SHARE_BASE (0x10018000)
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#endif
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#define UINT32 unsigned int
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#define UINT32P unsigned int *
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/**********************************************************/
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#define DISABLE_ALL (0)
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/* HIPRIS_ARB */
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/*
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* #define MDINF (1 << 0)
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* #define WACS0 (1 << 1)
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* #define WACS1 (1 << 2)
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* #define WACS2 (1 << 4)
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* #define DVFSINF (1 << 3)
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* #define STAUPD (1 << 5)
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* #define GPSINF (1 << 6)
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*/
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/* MUX SEL */
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#define WRAPPER_MODE (0)
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#define MANUAL_MODE (1)
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/* macro for MAN_RDATA FSM */
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#define MAN_FSM_NO_REQ (0x00)
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#define MAN_FSM_IDLE (0x00)
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#define MAN_FSM_REQ (0x02)
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#define MAN_FSM_WFDLE (0x04) /* wait for idle and read data */
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#define MAN_FSM_WFVLDCLR (0x06)
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/* macro for WACS_FSM */
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#define WACS_FSM_IDLE (0x00)
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#define WACS_FSM_REQ (0x02) /* request in process */
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#define WACS_FSM_WFDLE (0x04) /* wait for idle and read data */
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#define WACS_FSM_WFVLDCLR (0x06) /* read done, wait for valid clear */
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#define WACS_INIT_DONE (0x01)
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#define WACS_SYNC_IDLE (0x01)
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#define WACS_SYNC_BUSY (0x00)
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/**** timeout time, unit :us ***********/
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#define TIMEOUT_RESET (0x2710) /* 10000us */
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#define TIMEOUT_READ (0x2710) /* 10000us */
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#define TIMEOUT_WAIT_IDLE (0x2710) /* 10000us */
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/*-----macro for manual commnd ---------------------------------*/
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#define OP_WR (0x1)
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#define OP_RD (0x0)
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#define OP_CSH (0x0)
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#define OP_CSL (0x1)
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#define OP_CK (0x2)
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#define OP_OUTS (0x8)
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#define OP_OUTD (0x9)
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#define OP_OUTQ (0xA)
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#define OP_INS (0xC)
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#define OP_INS0 (0xD)
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#define OP_IND (0xE)
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#define OP_INQ (0xF)
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#define OP_OS2IS (0x10)
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#define OP_OS2ID (0x11)
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#define OP_OS2IQ (0x12)
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#define OP_OD2IS (0x13)
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#define OP_OD2ID (0x14)
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#define OP_OD2IQ (0x15)
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#define OP_OQ2IS (0x16)
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#define OP_OQ2ID (0x17)
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#define OP_OQ2IQ (0x18)
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#define OP_OSNIS (0x19)
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#define OP_ODNID (0x1A)
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/******************Error handle *****************************/
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#define E_PWR_INVALID_ARG (1)
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#define E_PWR_INVALID_RW (2)
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#define E_PWR_INVALID_ADDR (3)
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#define E_PWR_INVALID_WDAT (4)
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#define E_PWR_INVALID_OP_MANUAL (5)
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#define E_PWR_NOT_IDLE_STATE (6)
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#define E_PWR_NOT_INIT_DONE (7)
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#define E_PWR_NOT_INIT_DONE_READ (8)
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#define E_PWR_WAIT_IDLE_TIMEOUT (9)
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#define E_PWR_WAIT_IDLE_TIMEOUT_READ (10)
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#define E_PWR_INIT_SIDLY_FAIL (11)
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#define E_PWR_RESET_TIMEOUT (12)
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#define E_PWR_TIMEOUT (13)
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#define E_PWR_INIT_RESET_SPI (20)
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#define E_PWR_INIT_SIDLY (21)
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#define E_PWR_INIT_REG_CLOCK (22)
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#define E_PWR_INIT_ENABLE_PMIC (23)
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#define E_PWR_INIT_DIO (24)
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#define E_PWR_INIT_CIPHER (25)
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#define E_PWR_INIT_WRITE_TEST (26)
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#define E_PWR_INIT_ENABLE_CRC (27)
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#define E_PWR_INIT_ENABLE_DEWRAP (28)
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#define E_PWR_READ_TEST_FAIL (30)
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#define E_PWR_WRITE_TEST_FAIL (31)
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#define E_PWR_SWITCH_DIO (32)
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/*-----macro for read/write register -------------------------------------*/
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#define WRAP_RD32(addr) __raw_readl((void *)addr)
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#define WRAP_WR32(addr, val) mt_reg_sync_writel((val), ((void *)addr))
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#define WRAP_SET_BIT(BS, REG) \
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mt_reg_sync_writel((__raw_readl((void *)REG) | (u32)(BS)), ((void *)REG))
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#define WRAP_CLR_BIT(BS, REG) \
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mt_reg_sync_writel((__raw_readl((void *)REG) & (~(u32)(BS))), ((void *)REG))
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/**************** end ---external API***********************************/
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/************* macro for spi clock config ******************************/
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#define CLK_CFG_UPDATE (TOPCKGEN_BASE+0x004)
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#define CLK_CFG_4_SET (TOPCKGEN_BASE+0x084)
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#define CLK_CFG_4_CLR (TOPCKGEN_BASE+0x088)
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#define CLK_CFG_5_SET (TOPCKGEN_BASE+0x094)
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#define CLK_CFG_5_CLR (TOPCKGEN_BASE+0x098)
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#define CLK_SPI_CK_26M 0x1
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#define INFRA_GLOBALCON_RST0 (INFRACFG_AO_REG_BASE+0x140)
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#define INFRA_GLOBALCON_RST1 (INFRACFG_AO_REG_BASE+0x144)
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#define PMIC_CLOCK_DCM (INFRACFG_AO_REG_BASE+0x074)
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/* APB Module infracfg_ao */
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#define MODULE_SW_CG_0_SET (INFRACFG_AO_REG_BASE+0x080)
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#define MODULE_SW_CG_0_CLR (INFRACFG_AO_REG_BASE+0x084)
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#define MODULE_CLK_SEL (INFRACFG_AO_REG_BASE+0x098)
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#define PMICW_CLOCK_CTRL (INFRACFG_AO_REG_BASE+0x108)
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#define PMICW_CLOCK_CTRL_SET (INFRACFG_AO_REG_BASE+0x3A8)
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#define PMICW_CLOCK_CTRL_CLR (INFRACFG_AO_REG_BASE+0x3AC)
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#define MODULE_SW_CG_2_SET (INFRACFG_AO_REG_BASE+0x0A4)
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#define MODULE_SW_CG_2_CLR (INFRACFG_AO_REG_BASE+0x0A8)
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#define INFRA_GLOBALCON_RST2_SET (INFRACFG_AO_REG_BASE+0x140)
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#define INFRA_GLOBALCON_RST2_CLR (INFRACFG_AO_REG_BASE+0x144)
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#define APB_CLOCK_GATING (INFRACFG_AO_REG_BASE+0xF0C)
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/************* macro for spi io config ******************************/
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#define IOCFG_LM_DRV_CFG1 (IOCFG_LM_BASE+0x010)
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#define IOCFG_LM_DRV_CFG1_SET (IOCFG_LM_BASE+0x014)
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#define IOCFG_LM_DRV_CFG1_CLR (IOCFG_LM_BASE+0x018)
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#define IOCFG_LM_PD_CFG0_SET (IOCFG_LM_BASE+0x034)
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#define IOCFG_LM_PD_CFG0_CLR (IOCFG_LM_BASE+0x038)
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#define IOCFG_LM_PU_CFG0_SET (IOCFG_LM_BASE+0x044)
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#define IOCFG_LM_PU_CFG0_CLR (IOCFG_LM_BASE+0x048)
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#define IOCFG_RM_DRV_CFG0_SET (IOCFG_RM_BASE+0x004)
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#define IOCFG_RM_DRV_CFG0_CLR (IOCFG_RM_BASE+0x008)
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/************* macro for APB Module modem_temp_share ****************/
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#define MODEM_TEMP_SHARE_CTRL (MODEM_TEMP_SHARE_BASE+0x00)
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/*****************************************************************/
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/* APB Module pmic_wrap */
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#define PMIC_WRAP_MUX_SEL ((UINT32P)(PMIC_WRAP_BASE+0x0))
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#define PMIC_WRAP_WRAP_EN ((UINT32P)(PMIC_WRAP_BASE+0x4))
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#define PMIC_WRAP_DIO_EN ((UINT32P)(PMIC_WRAP_BASE+0x8))
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#define PMIC_WRAP_SI_SAMPLE_CTRL ((UINT32P)(PMIC_WRAP_BASE+0xC))
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#define PMIC_WRAP_SI_SAMPLE_CTRL_1 ((UINT32P)(PMIC_WRAP_BASE+0x10))
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#define PMIC_WRAP_SI_SAMPLE_CTRL_2 ((UINT32P)(PMIC_WRAP_BASE+0x14))
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#define PMIC_WRAP_SI_SAMPLE_CTRL_3 ((UINT32P)(PMIC_WRAP_BASE+0x18))
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#define PMIC_WRAP_SI_SAMPLE_CTRL_ULPOSC ((UINT32P)(PMIC_WRAP_BASE+0x1C))
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#define PMIC_WRAP_RDDMY ((UINT32P)(PMIC_WRAP_BASE+0x20))
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#define PMIC_WRAP_CSHEXT_WRITE ((UINT32P)(PMIC_WRAP_BASE+0x24))
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#define PMIC_WRAP_CSHEXT_READ ((UINT32P)(PMIC_WRAP_BASE+0x28))
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#define PMIC_WRAP_CSLEXT_WRITE ((UINT32P)(PMIC_WRAP_BASE+0x2C))
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#define PMIC_WRAP_CSLEXT_READ ((UINT32P)(PMIC_WRAP_BASE+0x30))
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#define PMIC_WRAP_EXT_CK_WRITE ((UINT32P)(PMIC_WRAP_BASE+0x34))
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#define PMIC_WRAP_EXT_CK_READ ((UINT32P)(PMIC_WRAP_BASE+0x38))
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#define PMIC_WRAP_STAUPD_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x3C))
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#define PMIC_WRAP_STAUPD_GRPEN ((UINT32P)(PMIC_WRAP_BASE+0x40))
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#define PMIC_WRAP_EINT_STA0_ADR ((UINT32P)(PMIC_WRAP_BASE+0x44))
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#define PMIC_WRAP_EINT_STA1_ADR ((UINT32P)(PMIC_WRAP_BASE+0x48))
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#define PMIC_WRAP_EINT_STA ((UINT32P)(PMIC_WRAP_BASE+0x4C))
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#define PMIC_WRAP_EINT_CLR ((UINT32P)(PMIC_WRAP_BASE+0x50))
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#define PMIC_WRAP_EINT_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x54))
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#define PMIC_WRAP_STAUPD_MAN_TRIG ((UINT32P)(PMIC_WRAP_BASE+0x58))
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#define PMIC_WRAP_STAUPD_STA ((UINT32P)(PMIC_WRAP_BASE+0x5C))
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#define PMIC_WRAP_WRAP_STA ((UINT32P)(PMIC_WRAP_BASE+0x60))
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#define PMIC_WRAP_HARB_INIT ((UINT32P)(PMIC_WRAP_BASE+0x64))
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#define PMIC_WRAP_HARB_HPRIO ((UINT32P)(PMIC_WRAP_BASE+0x68))
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#define PMIC_WRAP_HPRIO_ARB_EN ((UINT32P)(PMIC_WRAP_BASE+0x6C))
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#define PMIC_WRAP_HARB_STA0 ((UINT32P)(PMIC_WRAP_BASE+0x70))
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#define PMIC_WRAP_HARB_STA1 ((UINT32P)(PMIC_WRAP_BASE+0x74))
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#define PMIC_WRAP_HARB_STA2 ((UINT32P)(PMIC_WRAP_BASE+0x78))
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#define PMIC_WRAP_MAN_EN ((UINT32P)(PMIC_WRAP_BASE+0x7C))
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#define PMIC_WRAP_MAN_CMD ((UINT32P)(PMIC_WRAP_BASE+0x80))
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#define PMIC_WRAP_MAN_RDATA ((UINT32P)(PMIC_WRAP_BASE+0x84))
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#define PMIC_WRAP_MAN_VLDCLR ((UINT32P)(PMIC_WRAP_BASE+0x88))
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#define PMIC_WRAP_WACS0_EN ((UINT32P)(PMIC_WRAP_BASE+0x8C))
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#define PMIC_WRAP_INIT_DONE0 ((UINT32P)(PMIC_WRAP_BASE+0x90))
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#define PMIC_WRAP_WACS1_EN ((UINT32P)(PMIC_WRAP_BASE+0x94))
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#define PMIC_WRAP_INIT_DONE1 ((UINT32P)(PMIC_WRAP_BASE+0x98))
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#define PMIC_WRAP_WACS2_EN ((UINT32P)(PMIC_WRAP_BASE+0x9C))
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#define PMIC_WRAP_INIT_DONE2 ((UINT32P)(PMIC_WRAP_BASE+0xA0))
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#define PMIC_WRAP_WACS3_EN ((UINT32P)(PMIC_WRAP_BASE+0xA4))
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#define PMIC_WRAP_INIT_DONE3 ((UINT32P)(PMIC_WRAP_BASE+0xA8))
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#define PMIC_WRAP_WACS_P2P_EN ((UINT32P)(PMIC_WRAP_BASE+0xAC))
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#define PMIC_WRAP_INIT_DONE_P2P ((UINT32P)(PMIC_WRAP_BASE+0xB0))
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#define PMIC_WRAP_WACS_MD32_EN ((UINT32P)(PMIC_WRAP_BASE+0xB4))
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#define PMIC_WRAP_INIT_DONE_MD32 ((UINT32P)(PMIC_WRAP_BASE+0xB8))
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#define PMIC_WRAP_INT0_EN ((UINT32P)(PMIC_WRAP_BASE+0xBC))
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#define PMIC_WRAP_INT0_FLG_RAW ((UINT32P)(PMIC_WRAP_BASE+0xC0))
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#define PMIC_WRAP_INT0_FLG ((UINT32P)(PMIC_WRAP_BASE+0xC4))
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#define PMIC_WRAP_INT0_CLR ((UINT32P)(PMIC_WRAP_BASE+0xC8))
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#define PMIC_WRAP_INT1_EN ((UINT32P)(PMIC_WRAP_BASE+0xCC))
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#define PMIC_WRAP_INT1_FLG_RAW ((UINT32P)(PMIC_WRAP_BASE+0xD0))
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#define PMIC_WRAP_INT1_FLG ((UINT32P)(PMIC_WRAP_BASE+0xD4))
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#define PMIC_WRAP_INT1_CLR ((UINT32P)(PMIC_WRAP_BASE+0xD8))
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#define PMIC_WRAP_SIG_ADR ((UINT32P)(PMIC_WRAP_BASE+0xDC))
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#define PMIC_WRAP_SIG_MODE ((UINT32P)(PMIC_WRAP_BASE+0xE0))
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#define PMIC_WRAP_SIG_VALUE ((UINT32P)(PMIC_WRAP_BASE+0xE4))
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#define PMIC_WRAP_SIG_ERRVAL ((UINT32P)(PMIC_WRAP_BASE+0xE8))
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#define PMIC_WRAP_CRC_EN ((UINT32P)(PMIC_WRAP_BASE+0xEC))
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#define PMIC_WRAP_TIMER_CTRL ((UINT32P)(PMIC_WRAP_BASE+0xF0))
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#define PMIC_WRAP_TIMER_STA ((UINT32P)(PMIC_WRAP_BASE+0xF4))
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#define PMIC_WRAP_WDT_CTRL ((UINT32P)(PMIC_WRAP_BASE+0xF8))
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#define PMIC_WRAP_WDT_SRC_EN_0 ((UINT32P)(PMIC_WRAP_BASE+0xFC))
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#define PMIC_WRAP_WDT_SRC_EN_1 ((UINT32P)(PMIC_WRAP_BASE+0x100))
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#define PMIC_WRAP_WDT_FLG_0 ((UINT32P)(PMIC_WRAP_BASE+0x104))
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#define PMIC_WRAP_WDT_FLG_1 ((UINT32P)(PMIC_WRAP_BASE+0x108))
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#define PMIC_WRAP_DEBUG_INT_SEL ((UINT32P)(PMIC_WRAP_BASE+0x10C))
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#define PMIC_WRAP_DVFS_ADR0 ((UINT32P)(PMIC_WRAP_BASE+0x110))
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#define PMIC_WRAP_DVFS_WDATA0 ((UINT32P)(PMIC_WRAP_BASE+0x114))
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#define PMIC_WRAP_DVFS_ADR1 ((UINT32P)(PMIC_WRAP_BASE+0x118))
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#define PMIC_WRAP_DVFS_WDATA1 ((UINT32P)(PMIC_WRAP_BASE+0x11C))
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#define PMIC_WRAP_DVFS_ADR2 ((UINT32P)(PMIC_WRAP_BASE+0x120))
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#define PMIC_WRAP_DVFS_WDATA2 ((UINT32P)(PMIC_WRAP_BASE+0x124))
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#define PMIC_WRAP_DVFS_ADR3 ((UINT32P)(PMIC_WRAP_BASE+0x128))
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#define PMIC_WRAP_DVFS_WDATA3 ((UINT32P)(PMIC_WRAP_BASE+0x12C))
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#define PMIC_WRAP_DVFS_ADR4 ((UINT32P)(PMIC_WRAP_BASE+0x130))
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#define PMIC_WRAP_DVFS_WDATA4 ((UINT32P)(PMIC_WRAP_BASE+0x134))
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#define PMIC_WRAP_DVFS_ADR5 ((UINT32P)(PMIC_WRAP_BASE+0x138))
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#define PMIC_WRAP_DVFS_WDATA5 ((UINT32P)(PMIC_WRAP_BASE+0x13C))
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#define PMIC_WRAP_DVFS_ADR6 ((UINT32P)(PMIC_WRAP_BASE+0x140))
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#define PMIC_WRAP_DVFS_WDATA6 ((UINT32P)(PMIC_WRAP_BASE+0x144))
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#define PMIC_WRAP_DVFS_ADR7 ((UINT32P)(PMIC_WRAP_BASE+0x148))
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#define PMIC_WRAP_DVFS_WDATA7 ((UINT32P)(PMIC_WRAP_BASE+0x14C))
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#define PMIC_WRAP_DVFS_ADR8 ((UINT32P)(PMIC_WRAP_BASE+0x150))
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#define PMIC_WRAP_DVFS_WDATA8 ((UINT32P)(PMIC_WRAP_BASE+0x154))
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#define PMIC_WRAP_DVFS_ADR9 ((UINT32P)(PMIC_WRAP_BASE+0x158))
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#define PMIC_WRAP_DVFS_WDATA9 ((UINT32P)(PMIC_WRAP_BASE+0x15C))
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#define PMIC_WRAP_DVFS_ADR10 ((UINT32P)(PMIC_WRAP_BASE+0x160))
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#define PMIC_WRAP_DVFS_WDATA10 ((UINT32P)(PMIC_WRAP_BASE+0x164))
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#define PMIC_WRAP_DVFS_ADR11 ((UINT32P)(PMIC_WRAP_BASE+0x168))
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#define PMIC_WRAP_DVFS_WDATA11 ((UINT32P)(PMIC_WRAP_BASE+0x16C))
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#define PMIC_WRAP_DVFS_ADR12 ((UINT32P)(PMIC_WRAP_BASE+0x170))
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#define PMIC_WRAP_DVFS_WDATA12 ((UINT32P)(PMIC_WRAP_BASE+0x174))
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#define PMIC_WRAP_DVFS_ADR13 ((UINT32P)(PMIC_WRAP_BASE+0x178))
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#define PMIC_WRAP_DVFS_WDATA13 ((UINT32P)(PMIC_WRAP_BASE+0x17C))
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#define PMIC_WRAP_DVFS_ADR14 ((UINT32P)(PMIC_WRAP_BASE+0x180))
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#define PMIC_WRAP_DVFS_WDATA14 ((UINT32P)(PMIC_WRAP_BASE+0x184))
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#define PMIC_WRAP_DVFS_ADR15 ((UINT32P)(PMIC_WRAP_BASE+0x188))
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#define PMIC_WRAP_DVFS_WDATA15 ((UINT32P)(PMIC_WRAP_BASE+0x18C))
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#define PMIC_WRAP_DCXO_ENABLE ((UINT32P)(PMIC_WRAP_BASE+0x190))
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#define PMIC_WRAP_DCXO_CONN_ADR0 ((UINT32P)(PMIC_WRAP_BASE+0x194))
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#define PMIC_WRAP_DCXO_CONN_WDATA0 ((UINT32P)(PMIC_WRAP_BASE+0x198))
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#define PMIC_WRAP_DCXO_CONN_ADR1 ((UINT32P)(PMIC_WRAP_BASE+0x19C))
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#define PMIC_WRAP_DCXO_CONN_WDATA1 ((UINT32P)(PMIC_WRAP_BASE+0x1A0))
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#define PMIC_WRAP_DCXO_NFC_ADR0 ((UINT32P)(PMIC_WRAP_BASE+0x1A4))
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#define PMIC_WRAP_DCXO_NFC_WDATA0 ((UINT32P)(PMIC_WRAP_BASE+0x1A8))
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#define PMIC_WRAP_DCXO_NFC_ADR1 ((UINT32P)(PMIC_WRAP_BASE+0x1AC))
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#define PMIC_WRAP_DCXO_NFC_WDATA1 ((UINT32P)(PMIC_WRAP_BASE+0x1B0))
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#define PMIC_WRAP_SPMINF_STA_0 ((UINT32P)(PMIC_WRAP_BASE+0x1B4))
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#define PMIC_WRAP_SPMINF_STA_1 ((UINT32P)(PMIC_WRAP_BASE+0x1B8))
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#define PMIC_WRAP_SPMINF_BACKUP_STA ((UINT32P)(PMIC_WRAP_BASE+0x1BC))
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#define PMIC_WRAP_SCPINF_STA ((UINT32P)(PMIC_WRAP_BASE+0x1C0))
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#define PMIC_WRAP_SRCLKEN_RCINF_STA_0 ((UINT32P)(PMIC_WRAP_BASE+0x1C4))
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#define PMIC_WRAP_SRCLKEN_RCINF_STA_1 ((UINT32P)(PMIC_WRAP_BASE+0x1C8))
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#define PMIC_WRAP_MCU_PMINF_STA_0 ((UINT32P)(PMIC_WRAP_BASE+0x1CC))
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#define PMIC_WRAP_MCU_PMINF_STA_1 ((UINT32P)(PMIC_WRAP_BASE+0x1D0))
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#define PMIC_WRAP_CIPHER_KEY_SEL ((UINT32P)(PMIC_WRAP_BASE+0x1D4))
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#define PMIC_WRAP_CIPHER_IV_SEL ((UINT32P)(PMIC_WRAP_BASE+0x1D8))
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#define PMIC_WRAP_CIPHER_EN ((UINT32P)(PMIC_WRAP_BASE+0x1DC))
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#define PMIC_WRAP_CIPHER_RDY ((UINT32P)(PMIC_WRAP_BASE+0x1E0))
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#define PMIC_WRAP_CIPHER_MODE ((UINT32P)(PMIC_WRAP_BASE+0x1E4))
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#define PMIC_WRAP_CIPHER_SWRST ((UINT32P)(PMIC_WRAP_BASE+0x1E8))
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#define PMIC_WRAP_DCM_EN ((UINT32P)(PMIC_WRAP_BASE+0x1EC))
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#define PMIC_WRAP_DCM_DBC_PRD ((UINT32P)(PMIC_WRAP_BASE+0x1F0))
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#define PMIC_WRAP_INT_GPS_AUXADC_CMD_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x1F4))
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#define PMIC_WRAP_INT_GPS_AUXADC_CMD ((UINT32P)(PMIC_WRAP_BASE+0x1F8))
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#define PMIC_WRAP_INT_GPS_AUXADC_RDATA_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x1FC))
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#define PMIC_WRAP_EXT_GPS_AUXADC_RDATA_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x200))
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#define PMIC_WRAP_GPSINF_0_STA ((UINT32P)(PMIC_WRAP_BASE+0x204))
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#define PMIC_WRAP_GPSINF_1_STA ((UINT32P)(PMIC_WRAP_BASE+0x208))
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#define PMIC_WRAP_MD_ADCINF_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x20C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_LATEST_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x210))
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#define PMIC_WRAP_MD_AUXADC_RDATA_WP_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x214))
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#define PMIC_WRAP_MD_AUXADC_RDATA_0_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x218))
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#define PMIC_WRAP_MD_AUXADC_RDATA_1_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x21C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_2_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x220))
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#define PMIC_WRAP_MD_AUXADC_RDATA_3_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x224))
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#define PMIC_WRAP_MD_AUXADC_RDATA_4_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x228))
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#define PMIC_WRAP_MD_AUXADC_RDATA_5_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x22C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_6_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x230))
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#define PMIC_WRAP_MD_AUXADC_RDATA_7_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x234))
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#define PMIC_WRAP_MD_AUXADC_RDATA_8_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x238))
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#define PMIC_WRAP_MD_AUXADC_RDATA_9_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x23C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_10_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x240))
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#define PMIC_WRAP_MD_AUXADC_RDATA_11_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x244))
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#define PMIC_WRAP_MD_AUXADC_RDATA_12_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x248))
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#define PMIC_WRAP_MD_AUXADC_RDATA_13_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x24C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_14_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x250))
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#define PMIC_WRAP_MD_AUXADC_RDATA_15_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x254))
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#define PMIC_WRAP_MD_AUXADC_RDATA_16_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x258))
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#define PMIC_WRAP_MD_AUXADC_RDATA_17_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x25C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_18_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x260))
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#define PMIC_WRAP_MD_AUXADC_RDATA_19_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x264))
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#define PMIC_WRAP_MD_AUXADC_RDATA_20_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x268))
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#define PMIC_WRAP_MD_AUXADC_RDATA_21_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x26C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_22_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x270))
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#define PMIC_WRAP_MD_AUXADC_RDATA_23_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x274))
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#define PMIC_WRAP_MD_AUXADC_RDATA_24_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x278))
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#define PMIC_WRAP_MD_AUXADC_RDATA_25_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x27C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_26_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x280))
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#define PMIC_WRAP_MD_AUXADC_RDATA_27_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x284))
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#define PMIC_WRAP_MD_AUXADC_RDATA_28_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x288))
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#define PMIC_WRAP_MD_AUXADC_RDATA_29_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x28C))
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#define PMIC_WRAP_MD_AUXADC_RDATA_30_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x290))
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#define PMIC_WRAP_MD_AUXADC_RDATA_31_ADDR ((UINT32P)(PMIC_WRAP_BASE+0x294))
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#define PMIC_WRAP_MD_ADCINF_0_STA_0 ((UINT32P)(PMIC_WRAP_BASE+0x298))
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#define PMIC_WRAP_MD_ADCINF_0_STA_1 ((UINT32P)(PMIC_WRAP_BASE+0x29C))
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#define PMIC_WRAP_MD_ADCINF_1_STA_0 ((UINT32P)(PMIC_WRAP_BASE+0x2A0))
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#define PMIC_WRAP_MD_ADCINF_1_STA_1 ((UINT32P)(PMIC_WRAP_BASE+0x2A4))
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#define PMIC_WRAP_SWRST ((UINT32P)(PMIC_WRAP_BASE+0x2A8))
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#define PMIC_WRAP_SLEEP_PROTECTION_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x2AC))
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#define PMIC_WRAP_SPM_SLEEP_GATING_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x2B0))
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#define PMIC_WRAP_SCP_SLEEP_GATING_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x2B4))
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#define PMIC_WRAP_BUSY_STA ((UINT32P)(PMIC_WRAP_BASE+0x2B8))
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#define PMIC_WRAP_BUSY_STA_LATCHED_WDT ((UINT32P)(PMIC_WRAP_BASE+0x2BC))
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#define PMIC_WRAP_PRIORITY_USER_SEL_0 ((UINT32P)(PMIC_WRAP_BASE+0x2C0))
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#define PMIC_WRAP_PRIORITY_USER_SEL_1 ((UINT32P)(PMIC_WRAP_BASE+0x2C4))
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#define PMIC_WRAP_PRIORITY_USER_SEL_2 ((UINT32P)(PMIC_WRAP_BASE+0x2C8))
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#define PMIC_WRAP_PRIORITY_USER_SEL_3 ((UINT32P)(PMIC_WRAP_BASE+0x2CC))
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#define PMIC_WRAP_PRIORITY_USER_SEL_4 ((UINT32P)(PMIC_WRAP_BASE+0x2D0))
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#define PMIC_WRAP_ARBITER_OUT_SEL_0 ((UINT32P)(PMIC_WRAP_BASE+0x2D4))
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#define PMIC_WRAP_ARBITER_OUT_SEL_1 ((UINT32P)(PMIC_WRAP_BASE+0x2D8))
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#define PMIC_WRAP_ARBITER_OUT_SEL_2 ((UINT32P)(PMIC_WRAP_BASE+0x2DC))
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#define PMIC_WRAP_ARBITER_OUT_SEL_3 ((UINT32P)(PMIC_WRAP_BASE+0x2E0))
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#define PMIC_WRAP_ARBITER_OUT_SEL_4 ((UINT32P)(PMIC_WRAP_BASE+0x2E4))
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#define PMIC_WRAP_STARV_COUNTER_0 ((UINT32P)(PMIC_WRAP_BASE+0x2E8))
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#define PMIC_WRAP_STARV_COUNTER_1 ((UINT32P)(PMIC_WRAP_BASE+0x2EC))
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#define PMIC_WRAP_STARV_COUNTER_2 ((UINT32P)(PMIC_WRAP_BASE+0x2F0))
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#define PMIC_WRAP_STARV_COUNTER_3 ((UINT32P)(PMIC_WRAP_BASE+0x2F4))
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#define PMIC_WRAP_STARV_COUNTER_4 ((UINT32P)(PMIC_WRAP_BASE+0x2F8))
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#define PMIC_WRAP_STARV_COUNTER_5 ((UINT32P)(PMIC_WRAP_BASE+0x2FC))
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#define PMIC_WRAP_STARV_COUNTER_6 ((UINT32P)(PMIC_WRAP_BASE+0x300))
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#define PMIC_WRAP_STARV_COUNTER_7 ((UINT32P)(PMIC_WRAP_BASE+0x304))
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#define PMIC_WRAP_STARV_COUNTER_8 ((UINT32P)(PMIC_WRAP_BASE+0x308))
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#define PMIC_WRAP_STARV_COUNTER_9 ((UINT32P)(PMIC_WRAP_BASE+0x30C))
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#define PMIC_WRAP_STARV_COUNTER_10 ((UINT32P)(PMIC_WRAP_BASE+0x310))
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#define PMIC_WRAP_STARV_COUNTER_11 ((UINT32P)(PMIC_WRAP_BASE+0x314))
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#define PMIC_WRAP_STARV_COUNTER_12 ((UINT32P)(PMIC_WRAP_BASE+0x318))
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#define PMIC_WRAP_STARV_COUNTER_13 ((UINT32P)(PMIC_WRAP_BASE+0x31C))
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#define PMIC_WRAP_STARV_COUNTER_14 ((UINT32P)(PMIC_WRAP_BASE+0x320))
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#define PMIC_WRAP_STARV_COUNTER_15 ((UINT32P)(PMIC_WRAP_BASE+0x324))
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#define PMIC_WRAP_STARV_COUNTER_16 ((UINT32P)(PMIC_WRAP_BASE+0x328))
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#define PMIC_WRAP_STARV_INT_EN ((UINT32P)(PMIC_WRAP_BASE+0x32C))
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#define PMIC_WRAP_STARV_COUNTER_0_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x330))
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#define PMIC_WRAP_STARV_COUNTER_1_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x334))
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#define PMIC_WRAP_STARV_COUNTER_2_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x338))
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#define PMIC_WRAP_STARV_COUNTER_3_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x33C))
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#define PMIC_WRAP_STARV_COUNTER_4_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x340))
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#define PMIC_WRAP_STARV_COUNTER_5_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x344))
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#define PMIC_WRAP_STARV_COUNTER_6_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x348))
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#define PMIC_WRAP_STARV_COUNTER_7_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x34C))
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#define PMIC_WRAP_STARV_COUNTER_8_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x350))
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#define PMIC_WRAP_STARV_COUNTER_9_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x354))
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#define PMIC_WRAP_STARV_COUNTER_10_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x358))
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#define PMIC_WRAP_STARV_COUNTER_11_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x35C))
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#define PMIC_WRAP_STARV_COUNTER_12_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x360))
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#define PMIC_WRAP_STARV_COUNTER_13_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x364))
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#define PMIC_WRAP_STARV_COUNTER_14_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x368))
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#define PMIC_WRAP_STARV_COUNTER_15_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x36C))
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#define PMIC_WRAP_STARV_COUNTER_16_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x370))
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#define PMIC_WRAP_STARV_COUNTER_CLR ((UINT32P)(PMIC_WRAP_BASE+0x374))
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#define PMIC_WRAP_STARV_PRIO_STATUS ((UINT32P)(PMIC_WRAP_BASE+0x378))
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#define PMIC_WRAP_MONITOR_CTRL ((UINT32P)(PMIC_WRAP_BASE+0x37C))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_0 ((UINT32P)(PMIC_WRAP_BASE+0x380))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_1 ((UINT32P)(PMIC_WRAP_BASE+0x384))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_2 ((UINT32P)(PMIC_WRAP_BASE+0x388))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_3 ((UINT32P)(PMIC_WRAP_BASE+0x38C))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_4 ((UINT32P)(PMIC_WRAP_BASE+0x390))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_5 ((UINT32P)(PMIC_WRAP_BASE+0x394))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_6 ((UINT32P)(PMIC_WRAP_BASE+0x398))
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#define PMIC_WRAP_MONITOR_TARGET_CHANNEL_7 ((UINT32P)(PMIC_WRAP_BASE+0x39C))
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#define PMIC_WRAP_MONITOR_TARGET_WRITE ((UINT32P)(PMIC_WRAP_BASE+0x3A0))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_0 ((UINT32P)(PMIC_WRAP_BASE+0x3A4))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_1 ((UINT32P)(PMIC_WRAP_BASE+0x3A8))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_2 ((UINT32P)(PMIC_WRAP_BASE+0x3AC))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_3 ((UINT32P)(PMIC_WRAP_BASE+0x3B0))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_4 ((UINT32P)(PMIC_WRAP_BASE+0x3B4))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_5 ((UINT32P)(PMIC_WRAP_BASE+0x3B8))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_6 ((UINT32P)(PMIC_WRAP_BASE+0x3BC))
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#define PMIC_WRAP_MONITOR_TARGET_ADR_7 ((UINT32P)(PMIC_WRAP_BASE+0x3C0))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_0 ((UINT32P)(PMIC_WRAP_BASE+0x3C4))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_1 ((UINT32P)(PMIC_WRAP_BASE+0x3C8))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_2 ((UINT32P)(PMIC_WRAP_BASE+0x3CC))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_3 ((UINT32P)(PMIC_WRAP_BASE+0x3D0))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_4 ((UINT32P)(PMIC_WRAP_BASE+0x3D4))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_5 ((UINT32P)(PMIC_WRAP_BASE+0x3D8))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_6 ((UINT32P)(PMIC_WRAP_BASE+0x3DC))
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#define PMIC_WRAP_MONITOR_TARGET_WDATA_7 ((UINT32P)(PMIC_WRAP_BASE+0x3E0))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_0 ((UINT32P)(PMIC_WRAP_BASE+0x3E4))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_1 ((UINT32P)(PMIC_WRAP_BASE+0x3E8))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_2 ((UINT32P)(PMIC_WRAP_BASE+0x3EC))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_3 ((UINT32P)(PMIC_WRAP_BASE+0x3F0))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_4 ((UINT32P)(PMIC_WRAP_BASE+0x3F4))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_5 ((UINT32P)(PMIC_WRAP_BASE+0x3F8))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_6 ((UINT32P)(PMIC_WRAP_BASE+0x3FC))
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#define PMIC_WRAP_CHANNEL_SEQUENCE_7 ((UINT32P)(PMIC_WRAP_BASE+0x400))
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#define PMIC_WRAP_WRITE_SEQUENCE ((UINT32P)(PMIC_WRAP_BASE+0x404))
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#define PMIC_WRAP_ADR_SEQUENCE_0 ((UINT32P)(PMIC_WRAP_BASE+0x408))
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#define PMIC_WRAP_ADR_SEQUENCE_1 ((UINT32P)(PMIC_WRAP_BASE+0x40C))
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#define PMIC_WRAP_ADR_SEQUENCE_2 ((UINT32P)(PMIC_WRAP_BASE+0x410))
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#define PMIC_WRAP_ADR_SEQUENCE_3 ((UINT32P)(PMIC_WRAP_BASE+0x414))
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#define PMIC_WRAP_ADR_SEQUENCE_4 ((UINT32P)(PMIC_WRAP_BASE+0x418))
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#define PMIC_WRAP_ADR_SEQUENCE_5 ((UINT32P)(PMIC_WRAP_BASE+0x41C))
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#define PMIC_WRAP_ADR_SEQUENCE_6 ((UINT32P)(PMIC_WRAP_BASE+0x420))
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#define PMIC_WRAP_ADR_SEQUENCE_7 ((UINT32P)(PMIC_WRAP_BASE+0x424))
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#define PMIC_WRAP_ADR_SEQUENCE_8 ((UINT32P)(PMIC_WRAP_BASE+0x428))
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#define PMIC_WRAP_ADR_SEQUENCE_9 ((UINT32P)(PMIC_WRAP_BASE+0x42C))
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#define PMIC_WRAP_ADR_SEQUENCE_10 ((UINT32P)(PMIC_WRAP_BASE+0x430))
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#define PMIC_WRAP_ADR_SEQUENCE_11 ((UINT32P)(PMIC_WRAP_BASE+0x434))
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#define PMIC_WRAP_ADR_SEQUENCE_12 ((UINT32P)(PMIC_WRAP_BASE+0x438))
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#define PMIC_WRAP_ADR_SEQUENCE_13 ((UINT32P)(PMIC_WRAP_BASE+0x43C))
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#define PMIC_WRAP_ADR_SEQUENCE_14 ((UINT32P)(PMIC_WRAP_BASE+0x440))
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#define PMIC_WRAP_ADR_SEQUENCE_15 ((UINT32P)(PMIC_WRAP_BASE+0x444))
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#define PMIC_WRAP_WDATA_SEQUENCE_0 ((UINT32P)(PMIC_WRAP_BASE+0x448))
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#define PMIC_WRAP_WDATA_SEQUENCE_1 ((UINT32P)(PMIC_WRAP_BASE+0x44C))
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#define PMIC_WRAP_WDATA_SEQUENCE_2 ((UINT32P)(PMIC_WRAP_BASE+0x450))
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|
#define PMIC_WRAP_WDATA_SEQUENCE_3 ((UINT32P)(PMIC_WRAP_BASE+0x454))
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|
#define PMIC_WRAP_WDATA_SEQUENCE_4 ((UINT32P)(PMIC_WRAP_BASE+0x458))
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#define PMIC_WRAP_WDATA_SEQUENCE_5 ((UINT32P)(PMIC_WRAP_BASE+0x45C))
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|
#define PMIC_WRAP_WDATA_SEQUENCE_6 ((UINT32P)(PMIC_WRAP_BASE+0x460))
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|
#define PMIC_WRAP_WDATA_SEQUENCE_7 ((UINT32P)(PMIC_WRAP_BASE+0x464))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_8 ((UINT32P)(PMIC_WRAP_BASE+0x468))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_9 ((UINT32P)(PMIC_WRAP_BASE+0x46C))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_10 ((UINT32P)(PMIC_WRAP_BASE+0x470))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_11 ((UINT32P)(PMIC_WRAP_BASE+0x474))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_12 ((UINT32P)(PMIC_WRAP_BASE+0x478))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_13 ((UINT32P)(PMIC_WRAP_BASE+0x47C))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_14 ((UINT32P)(PMIC_WRAP_BASE+0x480))
|
|
#define PMIC_WRAP_WDATA_SEQUENCE_15 ((UINT32P)(PMIC_WRAP_BASE+0x484))
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|
#define PMIC_WRAP_BWC_OPTIONS ((UINT32P)(PMIC_WRAP_BASE+0x488))
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|
#define PMIC_WRAP_RESERVED ((UINT32P)(PMIC_WRAP_BASE+0x48C))
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|
#define PMIC_WRAP_WACS0_CMD ((UINT32P)(PMIC_WRAP_BASE+0xC00))
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#define PMIC_WRAP_WACS0_RDATA ((UINT32P)(PMIC_WRAP_BASE+0xC04))
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|
#define PMIC_WRAP_WACS0_VLDCLR ((UINT32P)(PMIC_WRAP_BASE+0xC08))
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#define PMIC_WRAP_WACS1_CMD ((UINT32P)(PMIC_WRAP_BASE+0xC10))
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|
#define PMIC_WRAP_WACS1_RDATA ((UINT32P)(PMIC_WRAP_BASE+0xC14))
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#define PMIC_WRAP_WACS1_VLDCLR ((UINT32P)(PMIC_WRAP_BASE+0xC18))
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#define PMIC_WRAP_WACS2_CMD ((UINT32P)(PMIC_WRAP_BASE+0xC20))
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|
#define PMIC_WRAP_WACS2_RDATA ((UINT32P)(PMIC_WRAP_BASE+0xC24))
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|
#define PMIC_WRAP_WACS2_VLDCLR ((UINT32P)(PMIC_WRAP_BASE+0xC28))
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#define PMIC_WRAP_WACS3_CMD ((UINT32P)(PMIC_WRAP_BASE+0xC30))
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|
#define PMIC_WRAP_WACS3_RDATA ((UINT32P)(PMIC_WRAP_BASE+0xC34))
|
|
#define PMIC_WRAP_WACS3_VLDCLR ((UINT32P)(PMIC_WRAP_BASE+0xC38))
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// APB Module pmic_wrap_mpu
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#define PWRAP_MPU_BASE PMIC_WRAP_BASE
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#define PMIC_WRAP_MPU_CON0 ((UINT32P)(PWRAP_MPU_BASE+0xF00))
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#define PMIC_WRAP_MPU_CON1 ((UINT32P)(PWRAP_MPU_BASE+0xF04))
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#define PMIC_WRAP_MPU_PMIC_RGN_EN ((UINT32P)(PWRAP_MPU_BASE+0xF08))
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#define PMIC_WRAP_MPU_PMIC_RGN0 ((UINT32P)(PWRAP_MPU_BASE+0xF0C))
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#define PMIC_WRAP_MPU_PMIC_RGN1 ((UINT32P)(PWRAP_MPU_BASE+0xF10))
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#define PMIC_WRAP_MPU_PMIC_RGN2 ((UINT32P)(PWRAP_MPU_BASE+0xF14))
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#define PMIC_WRAP_MPU_PMIC_RGN3 ((UINT32P)(PWRAP_MPU_BASE+0xF18))
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#define PMIC_WRAP_MPU_PMIC_RGN0_PER ((UINT32P)(PWRAP_MPU_BASE+0xF1C))
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#define PMIC_WRAP_MPU_PMIC_RGN1_PER ((UINT32P)(PWRAP_MPU_BASE+0xF20))
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#define PMIC_WRAP_MPU_PMIC_RGN2_PER ((UINT32P)(PWRAP_MPU_BASE+0xF24))
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#define PMIC_WRAP_MPU_PMIC_RGN3_PER ((UINT32P)(PWRAP_MPU_BASE+0xF28))
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#define PMIC_WRAP_MPU_PMIC_OTHERS_PER ((UINT32P)(PWRAP_MPU_BASE+0xF2C))
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#define PMIC_WRAP_MPU_PWRAP_WACS0_PER ((UINT32P)(PWRAP_MPU_BASE+0xF30))
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#define PMIC_WRAP_MPU_PWRAP_WACS1_PER ((UINT32P)(PWRAP_MPU_BASE+0xF34))
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#define PMIC_WRAP_MPU_PWRAP_WACS2_PER ((UINT32P)(PWRAP_MPU_BASE+0xF38))
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#define PMIC_WRAP_MPU_PWRAP_WACS3_PER ((UINT32P)(PWRAP_MPU_BASE+0xF3C))
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#define PMIC_WRAP_MPU_PWRAP_OTHERS_PER ((UINT32P)(PWRAP_MPU_BASE+0xF40))
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#define PMIC_WRAP_MPU_PMIC_ACC_VIO_INFO_0 ((UINT32P)(PWRAP_MPU_BASE+0xF44))
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#define PMIC_WRAP_MPU_PMIC_ACC_VIO_INFO_1 ((UINT32P)(PWRAP_MPU_BASE+0xF48))
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#define PMIC_WRAP_MPU_PMIC_ACC_VIO_INFO_2 ((UINT32P)(PWRAP_MPU_BASE+0xF4C))
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#define PMIC_WRAP_MPU_PMIC_ACC_VIO_P2P_INFO_0 ((UINT32P)(PWRAP_MPU_BASE+0xF50))
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#define PMIC_WRAP_MPU_PMIC_ACC_VIO_P2P_INFO_1 ((UINT32P)(PWRAP_MPU_BASE+0xF54))
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#define PMIC_WRAP_MPU_PMIC_ACC_VIO_P2P_INFO_2 ((UINT32P)(PWRAP_MPU_BASE+0xF58))
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#define PMIC_WRAP_MPU_PWRAP_ACC_VIO_INFO_0 ((UINT32P)(PWRAP_MPU_BASE+0xF5C))
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#define PMIC_WRAP_MPU_PWRAP_ACC_VIO_INFO_1 ((UINT32P)(PWRAP_MPU_BASE+0xF60))
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|
|
/*****************************************************************/
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|
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#define GET_MUX_SEL(x) ((x>>0) & 0x00000001)
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#define GET_WRAP_EN(x) ((x>>0) & 0x00000001)
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#define GET_DIO_EN0(x) ((x>>0) & 0x00000001)
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#define GET_DIO_EN1(x) ((x>>1) & 0x00000001)
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#define GET_PMIC_0_SI_DLY_SEL(x) ((x>>0) & 0x0000001f)
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#define GET_PMIC_0_SI_CK_SEL(x) ((x>>5) & 0x00000001)
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#define GET_PMIC_0_SI_EN_SEL(x) ((x>>6) & 0x00000007)
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#define GET_PMIC_1_SI_DLY_SEL(x) ((x>>9) & 0x0000001f)
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#define GET_PMIC_1_SI_CK_SEL(x) ((x>>14) & 0x00000001)
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#define GET_PMIC_1_SI_EN_SEL(x) ((x>>15) & 0x00000007)
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#define GET_DUAL_PMIC_SI_SAMPLE_CTRL_EN(x) ((x>>18) & 0x00000001)
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#define GET_SI_SAMPLING_USING_LOCAL_SI_CK(x) ((x>>19) & 0x00000001)
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#define GET_PMIC_0_SI_DLY_SEL_1(x) ((x>>0) & 0x0000001f)
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#define GET_PMIC_0_SI_CK_SEL_1(x) ((x>>5) & 0x00000001)
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#define GET_PMIC_0_SI_EN_SEL_1(x) ((x>>6) & 0x00000007)
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#define GET_PMIC_1_SI_DLY_SEL_1(x) ((x>>9) & 0x0000001f)
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#define GET_PMIC_1_SI_CK_SEL_1(x) ((x>>14) & 0x00000001)
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#define GET_PMIC_1_SI_EN_SEL_1(x) ((x>>15) & 0x00000007)
|
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#define GET_DUAL_PMIC_SI_SAMPLE_CTRL_1_EN(x) ((x>>18) & 0x00000001)
|
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#define GET_SI_SAMPLE_CTRL_1_EN(x) ((x>>19) & 0x00000001)
|
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#define GET_PMIC_0_SI_DLY_SEL_2(x) ((x>>0) & 0x0000001f)
|
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#define GET_PMIC_0_SI_CK_SEL_2(x) ((x>>5) & 0x00000001)
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#define GET_PMIC_0_SI_EN_SEL_2(x) ((x>>6) & 0x00000007)
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#define GET_PMIC_1_SI_DLY_SEL_2(x) ((x>>9) & 0x0000001f)
|
|
#define GET_PMIC_1_SI_CK_SEL_2(x) ((x>>14) & 0x00000001)
|
|
#define GET_PMIC_1_SI_EN_SEL_2(x) ((x>>15) & 0x00000007)
|
|
#define GET_DUAL_PMIC_SI_SAMPLE_CTRL_2_EN(x) ((x>>18) & 0x00000001)
|
|
#define GET_SI_SAMPLE_CTRL_2_EN(x) ((x>>19) & 0x00000001)
|
|
#define GET_PMIC_0_SI_DLY_SEL_3(x) ((x>>0) & 0x0000001f)
|
|
#define GET_PMIC_0_SI_CK_SEL_3(x) ((x>>5) & 0x00000001)
|
|
#define GET_PMIC_0_SI_EN_SEL_3(x) ((x>>6) & 0x00000007)
|
|
#define GET_PMIC_1_SI_DLY_SEL_3(x) ((x>>9) & 0x0000001f)
|
|
#define GET_PMIC_1_SI_CK_SEL_3(x) ((x>>14) & 0x00000001)
|
|
#define GET_PMIC_1_SI_EN_SEL_3(x) ((x>>15) & 0x00000007)
|
|
#define GET_DUAL_PMIC_SI_SAMPLE_CTRL_3_EN(x) ((x>>18) & 0x00000001)
|
|
#define GET_SI_SAMPLE_CTRL_3_EN(x) ((x>>19) & 0x00000001)
|
|
#define GET_PMIC_0_SI_DLY_SEL_ULPOSC(x) ((x>>0) & 0x0000001f)
|
|
#define GET_PMIC_0_SI_CK_SEL_ULPOSC(x) ((x>>5) & 0x00000001)
|
|
#define GET_PMIC_0_SI_EN_SEL_ULPOSC(x) ((x>>6) & 0x00000007)
|
|
#define GET_PMIC_1_SI_DLY_SEL_ULPOSC(x) ((x>>9) & 0x0000001f)
|
|
#define GET_PMIC_1_SI_CK_SEL_ULPOSC(x) ((x>>14) & 0x00000001)
|
|
#define GET_PMIC_1_SI_EN_SEL_ULPOSC(x) ((x>>15) & 0x00000007)
|
|
#define GET_DUAL_PMIC_SI_SAMPLE_CTRL_ULPOSC_EN(x) ((x>>18) & 0x00000001)
|
|
#define GET_SI_SAMPLE_CTRL_ULPOSC_EN(x) ((x>>19) & 0x00000001)
|
|
#define GET_RDDMY0(x) ((x>>0) & 0x000000ff)
|
|
#define GET_RDDMY1(x) ((x>>8) & 0x000000ff)
|
|
#define GET_CSHEXT_WRITE_START(x) ((x>>0) & 0x000000ff)
|
|
#define GET_CSHEXT_WRITE_END(x) ((x>>8) & 0x000000ff)
|
|
#define GET_CSHEXT_READ_START(x) ((x>>0) & 0x000000ff)
|
|
#define GET_CSHEXT_READ_END(x) ((x>>8) & 0x000000ff)
|
|
#define GET_CSLEXT_WRITE_START(x) ((x>>0) & 0x000000ff)
|
|
#define GET_CSLEXT_WRITE_END(x) ((x>>8) & 0x000000ff)
|
|
#define GET_CSLEXT_READ_START(x) ((x>>0) & 0x000000ff)
|
|
#define GET_CSLEXT_READ_END(x) ((x>>8) & 0x000000ff)
|
|
#define GET_EXT_CK_WRITE(x) ((x>>0) & 0x000000ff)
|
|
#define GET_EXT_CK_READ(x) ((x>>0) & 0x000000ff)
|
|
#define GET_STAUPD_PRD(x) ((x>>0) & 0x0000000f)
|
|
#define GET_STAUPD_FETCH_ALL(x) ((x>>4) & 0x00000001)
|
|
#define GET_STAUPD_GRPEN(x) ((x>>0) & 0x000001ff)
|
|
#define GET_EINT_STA0_ADR(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_EINT_STA1_ADR(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_EINT_STA(x) ((x>>0) & 0x0000000f)
|
|
#define GET_EINT_CLR(x) ((x>>0) & 0x0000000f)
|
|
#define GET_VALID_SRCLK_EN_CTRL(x) ((x>>0) & 0x00000001)
|
|
#define GET_VALID_SRVOL_EN_CTRL(x) ((x>>1) & 0x00000001)
|
|
#define GET_SPI_MODE_CTRL(x) ((x>>2) & 0x0000000f)
|
|
#define GET_HARB_SPI_EINT_MODE_GATING(x) ((x>>6) & 0x00000001)
|
|
#define GET_PMIC_EINT_OUT_0_SRC_SEL_NORMAL(x) ((x>>7) & 0x00000003)
|
|
#define GET_PMIC_EINT_OUT_0_SRC_SEL_SLEEP(x) ((x>>9) & 0x00000001)
|
|
#define GET_PMIC_EINT_OUT_1_SRC_SEL_NORMAL(x) ((x>>10) & 0x00000003)
|
|
#define GET_PMIC_EINT_OUT_1_SRC_SEL_SLEEP(x) ((x>>12) & 0x00000001)
|
|
#define GET_PMIC_EINT_SCP_SRC_SEL_NORMAL(x) ((x>>13) & 0x00000003)
|
|
#define GET_PMIC_EINT_SCP_SRC_SEL_SLEEP(x) ((x>>15) & 0x00000001)
|
|
#define GET_SPM_PMIC_EINT_ACK_STAUPD_NO_SEL(x) ((x>>16) & 0x0000000f)
|
|
#define GET_STAUPD_MAN_TRIG(x) ((x>>0) & 0x00000001)
|
|
#define GET_STAUPD_DLE_CNT(x) ((x>>0) & 0x0000000f)
|
|
#define GET_STAUPD_ALE_CNT(x) ((x>>4) & 0x0000000f)
|
|
#define GET_GRP_REQ_PENDING(x) ((x>>8) & 0x000001ff)
|
|
#define GET_GRP_DATA_PENDING(x) ((x>>17) & 0x000001ff)
|
|
#define GET_STAUPD_FSM(x) ((x>>26) & 0x00000007)
|
|
#define GET_WRAP_CH_DLE_RESTCNT(x) ((x>>0) & 0x00000007)
|
|
#define GET_WRAP_CH_ALE_RESTCNT(x) ((x>>3) & 0x00000003)
|
|
#define GET_WRAP_AG_DLE_RESTCNT(x) ((x>>5) & 0x00000003)
|
|
#define GET_WRAP_CH_W(x) ((x>>7) & 0x00000001)
|
|
#define GET_WRAP_CH_REQ(x) ((x>>8) & 0x00000001)
|
|
#define GET_AG_WRAP_W(x) ((x>>9) & 0x00000001)
|
|
#define GET_AG_WRAP_REQ(x) ((x>>10) & 0x00000001)
|
|
#define GET_WRAP_FSM(x) ((x>>11) & 0x0000000f)
|
|
#define GET_HARB_INIT(x) ((x>>0) & 0x00000001)
|
|
#define GET_HARB_HPRIO(x) ((x>>0) & 0x0001ffff)
|
|
#define GET_WACS0_HARB_EN(x) ((x>>0) & 0x00000001)
|
|
#define GET_WACS1_HARB_EN(x) ((x>>1) & 0x00000001)
|
|
#define GET_WACS2_HARB_EN(x) ((x>>2) & 0x00000001)
|
|
#define GET_WACS3_HARB_EN(x) ((x>>3) & 0x00000001)
|
|
#define GET_WACS_P2P_HARB_EN(x) ((x>>4) & 0x00000001)
|
|
#define GET_WACS_MD32_HARB_EN(x) ((x>>5) & 0x00000001)
|
|
#define GET_MDINF_HARB_EN(x) ((x>>6) & 0x00000001)
|
|
#define GET_C2KINF_HARB_EN(x) ((x>>7) & 0x00000001)
|
|
#define GET_MD_DVFSINF_HARB_EN(x) ((x>>8) & 0x00000001)
|
|
#define GET_SPMINF_HARB_EN(x) ((x>>9) & 0x00000001)
|
|
#define GET_SPMINF_BACKUP_HARB_EN(x) ((x>>10) & 0x00000001)
|
|
#define GET_SRCLKEN_RCINF_HARB_EN(x) ((x>>11) & 0x00000001)
|
|
#define GET_DCXO_CONNINF_HARB_EN(x) ((x>>12) & 0x00000001)
|
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#define GET_DCXO_NFCINF_HARB_EN(x) ((x>>13) & 0x00000001)
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#define GET_MCU_PMINF_HARB_EN(x) ((x>>14) & 0x00000001)
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#define GET_MD_ADCINF_0_HARB_EN(x) ((x>>15) & 0x00000001)
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#define GET_MD_ADCINF_1_HARB_EN(x) ((x>>16) & 0x00000001)
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#define GET_GPSINF_0_HARB_EN(x) ((x>>17) & 0x00000001)
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#define GET_GPSINF_1_HARB_EN(x) ((x>>18) & 0x00000001)
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#define GET_STAUPD_HARB_EN(x) ((x>>19) & 0x00000001)
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#define GET_HARB_WRAP_WDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_HARB_WRAP_ADR(x) ((x>>16) & 0x00007fff)
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#define GET_HARB_WRAP_W(x) ((x>>31) & 0x00000001)
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#define GET_AG_HARB_REQ(x) ((x>>0) & 0x0001ffff)
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#define GET_HARB_WRAP_REQ(x) ((x>>31) & 0x00000001)
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#define GET_HARB_DLE_EMPTY(x) ((x>>0) & 0x00000001)
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#define GET_HARB_DLE_FULL(x) ((x>>1) & 0x00000001)
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#define GET_HARB_VLD(x) ((x>>2) & 0x00000001)
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#define GET_HARB_DLE_OWN(x) ((x>>3) & 0x0000001f)
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#define GET_HARB_OWN(x) ((x>>8) & 0x0000001f)
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#define GET_HARB_DLE_RESTCNT(x) ((x>>13) & 0x0000000f)
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#define GET_MAN_EN(x) ((x>>0) & 0x00000001)
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#define GET_SPI_WDATA(x) ((x>>0) & 0x000000ff)
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#define GET_SPI_OP(x) ((x>>8) & 0x0000001f)
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#define GET_SPI_W(x) ((x>>13) & 0x00000001)
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#define GET_MAN_RDATA(x) ((x>>0) & 0x000000ff)
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#define GET_MAN_FSM(x) ((x>>8) & 0x00000007)
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#define GET_MAN_REQ(x) ((x>>11) & 0x00000001)
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#define GET_MAN_VLDCLR(x) ((x>>0) & 0x00000001)
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#define GET_WACS0_EN(x) ((x>>0) & 0x00000001)
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#define GET_INIT_DONE0(x) ((x>>0) & 0x00000001)
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#define GET_WACS1_EN(x) ((x>>0) & 0x00000001)
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#define GET_INIT_DONE1(x) ((x>>0) & 0x00000001)
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#define GET_WACS2_EN(x) ((x>>0) & 0x00000001)
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#define GET_INIT_DONE2(x) ((x>>0) & 0x00000001)
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#define GET_WACS3_EN(x) ((x>>0) & 0x00000001)
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#define GET_INIT_DONE3(x) ((x>>0) & 0x00000001)
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#define GET_WACS_P2P_EN(x) ((x>>0) & 0x00000001)
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#define GET_INIT_DONE_P2P(x) ((x>>0) & 0x00000001)
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#define GET_WACS_MD32_EN(x) ((x>>0) & 0x00000001)
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#define GET_INIT_DONE_MD32(x) ((x>>0) & 0x00000001)
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#define GET_INT0_EN(x) ((x>>0) & 0x00000000)
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#define GET_INT0_FLG_RAW(x) ((x>>0) & 0x00000000)
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#define GET_INT0_FLG(x) ((x>>0) & 0x00000000)
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#define GET_INT0_CLR(x) ((x>>0) & 0x00000000)
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#define GET_INT1_EN(x) ((x>>0) & 0x00000000)
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#define GET_INT1_FLG_RAW(x) ((x>>0) & 0x00000000)
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#define GET_INT1_FLG(x) ((x>>0) & 0x00000000)
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#define GET_INT1_CLR(x) ((x>>0) & 0x00000000)
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#define GET_SIG_ADR0(x) ((x>>0) & 0x0000ffff)
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#define GET_SIG_ADR1(x) ((x>>16) & 0x0000ffff)
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#define GET_SIG_MODE0(x) ((x>>0) & 0x00000001)
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#define GET_SIG_MODE1(x) ((x>>1) & 0x00000001)
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#define GET_SIG_VALUE0(x) ((x>>0) & 0x0000ffff)
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#define GET_SIG_VALUE1(x) ((x>>16) & 0x0000ffff)
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#define GET_SIG_ERRVAL0(x) ((x>>0) & 0x0000ffff)
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#define GET_SIG_ERRVAL1(x) ((x>>16) & 0x0000ffff)
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#define GET_CRC_EN(x) ((x>>0) & 0x00000001)
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#define GET_TIMER_CLK_EN(x) ((x>>0) & 0x00000001)
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#define GET_TIMER_CLK_AUTO_GATING_EN(x) ((x>>1) & 0x00000001)
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#define GET_TIMER_CLK_AUTO_GATING_CTRL(x) ((x>>2) & 0x00000003)
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#define GET_STAUPD_TIMER_RESET(x) ((x>>4) & 0x00000001)
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#define GET_WDT_TIMER_RESET(x) ((x>>5) & 0x00000001)
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#define GET_STAUPD_TIMER(x) ((x>>0) & 0x00001fff)
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#define GET_WDT_TIMER(x) ((x>>16) & 0x0000ffff)
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#define GET_WDT_UNIT_SEL(x) ((x>>0) & 0x0000000f)
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#define GET_WDT_PRD(x) ((x>>4) & 0x000000ff)
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#define GET_WDT_SRC_EN_0(x) ((x>>0) & 0x00000000)
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#define GET_WDT_SRC_EN_1(x) ((x>>0) & 0x00000000)
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#define GET_WDT_FLG_0(x) ((x>>0) & 0x00000000)
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#define GET_WDT_FLG_1(x) ((x>>0) & 0x00000000)
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#define GET_DEBUG_INT_SEL(x) ((x>>0) & 0x00000007)
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#define GET_DVFS_ADR0(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA0(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR1(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA1(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR2(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA2(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR3(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA3(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR4(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA4(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR5(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA5(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR6(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA6(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR7(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA7(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR8(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA8(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_ADR9(x) ((x>>0) & 0x0000ffff)
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#define GET_DVFS_WDATA9(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR10(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_WDATA10(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR11(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_WDATA11(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR12(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_WDATA12(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR13(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_WDATA13(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR14(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_WDATA14(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_ADR15(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DVFS_WDATA15(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_NFC_ENABLE(x) ((x>>0) & 0x00000001)
|
|
#define GET_DCXO_CONN_ENABLE(x) ((x>>1) & 0x00000001)
|
|
#define GET_DCXO_CONN_ADR0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_DCXO_CONN_WDATA0(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_CONN_ADR1(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_CONN_WDATA1(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_NFC_ADR0(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_NFC_WDATA0(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_NFC_ADR1(x) ((x>>0) & 0x0000ffff)
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|
#define GET_DCXO_NFC_WDATA1(x) ((x>>0) & 0x0000ffff)
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|
#define GET_SPM_PWRAP_REQ(x) ((x>>0) & 0x00000001)
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|
#define GET_PWRAP_SPM_ACK(x) ((x>>1) & 0x00000001)
|
|
#define GET_SPM_PMIC_EINT_REQ(x) ((x>>2) & 0x00000001)
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|
#define GET_SPM_PMIC_EINT_ACK(x) ((x>>3) & 0x00000001)
|
|
#define GET_SPM_SLEEP_REQ(x) ((x>>4) & 0x00000001)
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|
#define GET_SPM_SLEEP_ACK(x) ((x>>5) & 0x00000001)
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|
#define GET_SPM_PWRAP_ADR(x) ((x>>0) & 0x0000ffff)
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|
#define GET_SPM_PWRAP_WDATA(x) ((x>>16) & 0x0000ffff)
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|
#define GET_SPM_PWRAP_DVFS_CTRL_RDY(x) ((x>>0) & 0x00000001)
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|
#define GET_SPM_PWRAP_DVFS_CTRL(x) ((x>>1) & 0x0000000f)
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|
#define GET_PWRAP_SPM_DVFS_CTRL_ACK(x) ((x>>5) & 0x00000001)
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|
#define GET_SCP_SLEEP_REQ(x) ((x>>0) & 0x00000001)
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|
#define GET_SCP_SLEEP_ACK(x) ((x>>1) & 0x00000001)
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|
#define GET_PMIC_EINT_SCP(x) ((x>>2) & 0x00000001)
|
|
#define GET_SRCLKEN_RC_PWRAP_REQ(x) ((x>>0) & 0x00000001)
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|
#define GET_PWRAP_SRCLKEN_RC_ACK(x) ((x>>1) & 0x00000001)
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|
#define GET_SRCLKEN_RC_PWRAP_ADR(x) ((x>>0) & 0x0000ffff)
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#define GET_SRCLKEN_RC_PWRAP_WDATA(x) ((x>>16) & 0x0000ffff)
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|
#define GET_MCU_PM_PWRAP_REQ(x) ((x>>0) & 0x00000001)
|
|
#define GET_PWRAP_MCU_PM_ACK(x) ((x>>1) & 0x00000001)
|
|
#define GET_MCU_PM_PWRAP_ADR(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MCU_PM_PWRAP_WDATA(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_CIPHER_KEY_SEL(x) ((x>>0) & 0x00000003)
|
|
#define GET_CIPHER_IV_SEL(x) ((x>>0) & 0x00000003)
|
|
#define GET_CIPHER_EN(x) ((x>>0) & 0x00000001)
|
|
#define GET_CIPHER_RDY(x) ((x>>0) & 0x00000003)
|
|
#define GET_CIPHER_MODE(x) ((x>>0) & 0x00000001)
|
|
#define GET_CIPHER_SWRST(x) ((x>>0) & 0x00000001)
|
|
#define GET_SYS_CK_DCM_EN(x) ((x>>0) & 0x00000001)
|
|
#define GET_SPI_CK_DCM_EN(x) ((x>>1) & 0x00000001)
|
|
#define GET_PCLK_MPU_EXCEPT_DCM_EN(x) ((x>>2) & 0x00000001)
|
|
#define GET_WACS_CK_DCM_EN(x) ((x>>3) & 0x00000001)
|
|
#define GET_MDINF_CK_DCM_EN(x) ((x>>4) & 0x00000001)
|
|
#define GET_C2KINF_CK_DCM_EN(x) ((x>>5) & 0x00000001)
|
|
#define GET_MD_DVFSINF_CK_DCM_EN(x) ((x>>6) & 0x00000001)
|
|
#define GET_SPMINF_CK_DCM_EN(x) ((x>>7) & 0x00000001)
|
|
#define GET_SPMINF_BACKUP_CK_DCM_EN(x) ((x>>8) & 0x00000001)
|
|
#define GET_SRCLKEN_RCINF_CK_DCM_EN(x) ((x>>9) & 0x00000001)
|
|
#define GET_DCXOINF_CK_DCM_EN(x) ((x>>10) & 0x00000001)
|
|
#define GET_MCU_PMINF_CK_DCM_EN(x) ((x>>11) & 0x00000001)
|
|
#define GET_MD_ADCINF_0_CK_DCM_EN(x) ((x>>12) & 0x00000001)
|
|
#define GET_MD_ADCINF_1_CK_DCM_EN(x) ((x>>13) & 0x00000001)
|
|
#define GET_GPSINF_0_CK_DCM_EN(x) ((x>>14) & 0x00000001)
|
|
#define GET_GPSINF_1_CK_DCM_EN(x) ((x>>15) & 0x00000001)
|
|
#define GET_STAUPD_CK_DCM_EN(x) ((x>>16) & 0x00000001)
|
|
#define GET_MD32INF_CK_DCM_EN(x) ((x>>17) & 0x00000001)
|
|
#define GET_ARBITER_CK_DCM_EN(x) ((x>>18) & 0x00000001)
|
|
#define GET_CRC_CK_DCM_EN(x) ((x>>19) & 0x00000001)
|
|
#define GET_INTCTL_CK_DCM_EN(x) ((x>>20) & 0x00000001)
|
|
#define GET_WDTCTL_CK_DCM_EN(x) ((x>>21) & 0x00000001)
|
|
#define GET_SPICTL_CK_DCM_EN(x) ((x>>22) & 0x00000001)
|
|
#define GET_SYS_CK_DCM_DBC_PRD(x) ((x>>0) & 0x000000ff)
|
|
#define GET_SPI_CK_DCM_DBC_PRD(x) ((x>>8) & 0x000000ff)
|
|
#define GET_INT_GPS_AUXADC_CMD_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_INT_GPS_AUXADC_CMD_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_INT_GPS_AUXADC_CMD_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_INT_GPS_AUXADC_CMD_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_INT_GPS_AUXADC_RDATA_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_INT_GPS_AUXADC_RDATA_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_EXT_GPS_AUXADC_RDATA_ADDR(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_GPS_PWRAP_REQ_0(x) ((x>>0) & 0x00000001)
|
|
#define GET_PWRAP_GPS_ACK_0(x) ((x>>1) & 0x00000001)
|
|
#define GET_PWRAP_GPS_RDATA_0(x) ((x>>2) & 0x00007fff)
|
|
#define GET_PWRAP_GPS_RDATA_VALID_0(x) ((x>>17) & 0x00000001)
|
|
#define GET_GPSINF_0_FSM(x) ((x>>18) & 0x00000007)
|
|
#define GET_GPS_PWRAP_REQ_1(x) ((x>>0) & 0x00000001)
|
|
#define GET_PWRAP_GPS_ACK_1(x) ((x>>1) & 0x00000001)
|
|
#define GET_PWRAP_GPS_RDATA_1(x) ((x>>2) & 0x00007fff)
|
|
#define GET_PWRAP_GPS_RDATA_VALID_1(x) ((x>>17) & 0x00000001)
|
|
#define GET_GPSINF_1_FSM(x) ((x>>18) & 0x00000007)
|
|
#define GET_MD_AUXADC_MODE_LATCH_SEL_0(x) ((x>>0) & 0x00000001)
|
|
#define GET_MD_AUXADC_MODE_LATCH_SEL_1(x) ((x>>1) & 0x00000001)
|
|
#define GET_MD_AUXADC_RDATA_LATEST_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_LATEST_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_WP_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_WP_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_0_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_0_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_1_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_1_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_2_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_2_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_3_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_3_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_4_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_4_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_5_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_5_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_6_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_6_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_7_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_7_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_8_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_8_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_9_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_9_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_10_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_10_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_11_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_11_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_12_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_12_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_13_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_13_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_14_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_14_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_15_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_15_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_16_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_16_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_17_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_17_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_18_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_18_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_19_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_19_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_20_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_20_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_21_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_21_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_22_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_22_ADDR_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_23_ADDR_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MD_AUXADC_RDATA_23_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_24_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_24_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_25_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_25_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_26_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_26_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_27_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_27_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_28_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_28_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_29_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_29_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_30_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_30_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_31_ADDR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MD_AUXADC_RDATA_31_ADDR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MTS_PWRAP_REQ_0(x) ((x>>0) & 0x00000001)
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#define GET_PWRAP_MTS_ACK_0(x) ((x>>1) & 0x00000001)
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#define GET_PWRAP_MTS_RDATA_0(x) ((x>>2) & 0x0000ffff)
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#define GET_PWRAP_MTS_RDATA_VALID_0(x) ((x>>18) & 0x00000001)
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#define GET_MD_ADCINF_0_FSM(x) ((x>>19) & 0x00000007)
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#define GET_MD_ADCINF_0_ALE_CNT(x) ((x>>0) & 0x0000003f)
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#define GET_MD_ADCINF_0_DLE_CNT_REAL(x) ((x>>6) & 0x0000003f)
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#define GET_MD_ADCINF_0_ALE_CNT_FULL(x) ((x>>12) & 0x00000001)
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#define GET_MD_ADCINF_0_DLE_CNT_FULL(x) ((x>>13) & 0x00000001)
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#define GET_MTS_PWRAP_REQ_1(x) ((x>>0) & 0x00000001)
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#define GET_PWRAP_MTS_ACK_1(x) ((x>>1) & 0x00000001)
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#define GET_PWRAP_MTS_RDATA_1(x) ((x>>2) & 0x0000ffff)
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#define GET_PWRAP_MTS_RDATA_VALID_1(x) ((x>>18) & 0x00000001)
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#define GET_MD_ADCINF_1_FSM(x) ((x>>19) & 0x00000007)
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#define GET_MD_ADCINF_1_ALE_CNT(x) ((x>>0) & 0x0000003f)
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#define GET_MD_ADCINF_1_DLE_CNT_REAL(x) ((x>>6) & 0x0000003f)
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#define GET_MD_ADCINF_1_ALE_CNT_FULL(x) ((x>>12) & 0x00000001)
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#define GET_MD_ADCINF_1_DLE_CNT_FULL(x) ((x>>13) & 0x00000001)
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#define GET_SWRST(x) ((x>>0) & 0x00000001)
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#define GET_VALID_SPM_SLEEP_PROTECTION_CTRL(x) ((x>>0) & 0x00000003)
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#define GET_VALID_SCP_SLEEP_PROTECTION_CTRL(x) ((x>>2) & 0x00000003)
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#define GET_SPM_SLEEP_ACK_CONDITION(x) ((x>>4) & 0x00000003)
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#define GET_SCP_SLEEP_ACK_CONDITION(x) ((x>>6) & 0x00000003)
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#define GET_SPM_SLEEP_ACK_AFTER_TIMER_CLK_GATED(x) ((x>>8) & 0x00000001)
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#define GET_SCP_SLEEP_ACK_AFTER_TIMER_CLK_GATED(x) ((x>>9) & 0x00000001)
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#define GET_SPM_SLEEP_ACK_ON_SCP_SLEEP_GATING(x) ((x>>10) & 0x00000001)
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#define GET_SPM_SLEEP_ACK_ON_SPI_EINT_MODE_GATING(x) ((x>>11) & 0x00000001)
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#define GET_SCP_SLEEP_ACK_ON_SPM_SLEEP_GATING(x) ((x>>12) & 0x00000001)
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#define GET_SCP_SLEEP_ACK_ON_SPI_EINT_MODE_GATING(x) ((x>>13) & 0x00000001)
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#define GET_SPM_SLEEP_GATING_CONDITION(x) ((x>>0) & 0x00000001)
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#define GET_HARB_SPM_SLEEP_GATING(x) ((x>>1) & 0x00000001)
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#define GET_WACS0_REQ_SPM_SLEEP_GATING(x) ((x>>2) & 0x00000001)
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#define GET_WACS1_REQ_SPM_SLEEP_GATING(x) ((x>>3) & 0x00000001)
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#define GET_WACS2_REQ_SPM_SLEEP_GATING(x) ((x>>4) & 0x00000001)
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#define GET_WACS3_REQ_SPM_SLEEP_GATING(x) ((x>>5) & 0x00000001)
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#define GET_WACS_P2P_REQ_SPM_SLEEP_GATING(x) ((x>>6) & 0x00000001)
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#define GET_WACS_MD32_REQ_SPM_SLEEP_GATING(x) ((x>>7) & 0x00000001)
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#define GET_MDINF_REQ_SPM_SLEEP_GATING(x) ((x>>8) & 0x00000001)
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#define GET_C2KINF_REQ_SPM_SLEEP_GATING(x) ((x>>9) & 0x00000001)
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#define GET_MD_DVFSINF_REQ_SPM_SLEEP_GATING(x) ((x>>10) & 0x00000001)
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#define GET_SPMINF_REQ_SPM_SLEEP_GATING(x) ((x>>11) & 0x00000001)
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#define GET_SPMINF_BACKUP_REQ_SPM_SLEEP_GATING(x) ((x>>12) & 0x00000001)
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#define GET_SRCLKEN_RCINF_REQ_SPM_SLEEP_GATING(x) ((x>>13) & 0x00000001)
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#define GET_DCXO_CONNINF_REQ_SPM_SLEEP_GATING(x) ((x>>14) & 0x00000001)
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#define GET_DCXO_NFCINF_REQ_SPM_SLEEP_GATING(x) ((x>>15) & 0x00000001)
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#define GET_MCU_PMINF_REQ_SPM_SLEEP_GATING(x) ((x>>16) & 0x00000001)
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#define GET_MD_ADCINF_0_REQ_SPM_SLEEP_GATING(x) ((x>>17) & 0x00000001)
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#define GET_MD_ADCINF_1_REQ_SPM_SLEEP_GATING(x) ((x>>18) & 0x00000001)
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#define GET_GPSINF_0_REQ_SPM_SLEEP_GATING(x) ((x>>19) & 0x00000001)
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#define GET_GPSINF_1_REQ_SPM_SLEEP_GATING(x) ((x>>20) & 0x00000001)
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#define GET_STAUPD_REQ_SPM_SLEEP_GATING(x) ((x>>21) & 0x00000001)
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#define GET_SCP_SLEEP_GATING_CONDITION(x) ((x>>0) & 0x00000001)
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#define GET_HARB_SCP_SLEEP_GATING(x) ((x>>1) & 0x00000001)
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#define GET_WACS0_REQ_SCP_SLEEP_GATING(x) ((x>>2) & 0x00000001)
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#define GET_WACS1_REQ_SCP_SLEEP_GATING(x) ((x>>3) & 0x00000001)
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#define GET_WACS2_REQ_SCP_SLEEP_GATING(x) ((x>>4) & 0x00000001)
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#define GET_WACS3_REQ_SCP_SLEEP_GATING(x) ((x>>5) & 0x00000001)
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#define GET_WACS_P2P_REQ_SCP_SLEEP_GATING(x) ((x>>6) & 0x00000001)
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#define GET_WACS_MD32_REQ_SCP_SLEEP_GATING(x) ((x>>7) & 0x00000001)
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#define GET_MDINF_REQ_SCP_SLEEP_GATING(x) ((x>>8) & 0x00000001)
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#define GET_C2KINF_REQ_SCP_SLEEP_GATING(x) ((x>>9) & 0x00000001)
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#define GET_MD_DVFSINF_REQ_SCP_SLEEP_GATING(x) ((x>>10) & 0x00000001)
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#define GET_SPMINF_REQ_SCP_SLEEP_GATING(x) ((x>>11) & 0x00000001)
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#define GET_SPMINF_BACKUP_REQ_SCP_SLEEP_GATING(x) ((x>>12) & 0x00000001)
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#define GET_DCXO_CONNINF_REQ_SCP_SLEEP_GATING(x) ((x>>13) & 0x00000001)
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#define GET_SRCLKEN_RCINF_REQ_SCP_SLEEP_GATING(x) ((x>>14) & 0x00000001)
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#define GET_DCXO_NFCINF_REQ_SCP_SLEEP_GATING(x) ((x>>15) & 0x00000001)
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#define GET_MCU_PMINF_REQ_SCP_SLEEP_GATING(x) ((x>>16) & 0x00000001)
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#define GET_MD_ADCINF_0_REQ_SCP_SLEEP_GATING(x) ((x>>17) & 0x00000001)
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#define GET_MD_ADCINF_1_REQ_SCP_SLEEP_GATING(x) ((x>>18) & 0x00000001)
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#define GET_GPSINF_0_REQ_SCP_SLEEP_GATING(x) ((x>>19) & 0x00000001)
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#define GET_GPSINF_1_REQ_SCP_SLEEP_GATING(x) ((x>>20) & 0x00000001)
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#define GET_STAUPD_REQ_SCP_SLEEP_GATING(x) ((x>>21) & 0x00000001)
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#define GET_WACS0_BUSY(x) ((x>>0) & 0x00000001)
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#define GET_WACS1_BUSY(x) ((x>>1) & 0x00000001)
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#define GET_WACS2_BUSY(x) ((x>>2) & 0x00000001)
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#define GET_WACS3_BUSY(x) ((x>>3) & 0x00000001)
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#define GET_WACS_P2P_BUSY(x) ((x>>4) & 0x00000001)
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#define GET_WACS_MD32_BUSY(x) ((x>>5) & 0x00000001)
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#define GET_MDINF_BUSY(x) ((x>>6) & 0x00000001)
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#define GET_C2KINF_BUSY(x) ((x>>7) & 0x00000001)
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#define GET_MD_DVFSINF_BUSY(x) ((x>>8) & 0x00000001)
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#define GET_SPMINF_BUSY(x) ((x>>9) & 0x00000001)
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#define GET_SPMINF_BACKUP_BUSY(x) ((x>>10) & 0x00000001)
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#define GET_SRCLKEN_RCINF_BUSY(x) ((x>>11) & 0x00000001)
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#define GET_DCXO_CONNINF_BUSY(x) ((x>>12) & 0x00000001)
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#define GET_DCXO_NFCINF_BUSY(x) ((x>>13) & 0x00000001)
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#define GET_MCU_PMINF_BUSY(x) ((x>>14) & 0x00000001)
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#define GET_MD_ADCINF_0_BUSY(x) ((x>>15) & 0x00000001)
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#define GET_MD_ADCINF_1_BUSY(x) ((x>>16) & 0x00000001)
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#define GET_GPSINF_0_BUSY(x) ((x>>17) & 0x00000001)
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#define GET_GPSINF_1_BUSY(x) ((x>>18) & 0x00000001)
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#define GET_STAUPD_BUSY(x) ((x>>19) & 0x00000001)
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#define GET_MD32INF_BUSY(x) ((x>>20) & 0x00000001)
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#define GET_AG_HARB_REQ_EMPTY(x) ((x>>21) & 0x00000001)
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#define GET_WRAP_MUX_REQ(x) ((x>>22) & 0x00000001)
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#define GET_WRAP_AG_DLE_RESTCNT_EMPTY(x) ((x>>23) & 0x00000001)
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#define GET_MAN_BUSY(x) ((x>>24) & 0x00000001)
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#define GET_SYNC_IDLE(x) ((x>>25) & 0x00000001)
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#define GET_SYS_IDLE_NO_PSEL(x) ((x>>26) & 0x00000001)
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#define GET_SYS_IDLE(x) ((x>>27) & 0x00000001)
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#define GET_SPI_IDLE(x) ((x>>28) & 0x00000001)
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#define GET_PWRAP_IDLE(x) ((x>>29) & 0x00000001)
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#define GET_WACS0_BUSY_LATCHED_WDT(x) ((x>>0) & 0x00000001)
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#define GET_WACS1_BUSY_LATCHED_WDT(x) ((x>>1) & 0x00000001)
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#define GET_WACS2_BUSY_LATCHED_WDT(x) ((x>>2) & 0x00000001)
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#define GET_WACS3_BUSY_LATCHED_WDT(x) ((x>>3) & 0x00000001)
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#define GET_WACS_P2P_BUSY_LATCHED_WDT(x) ((x>>4) & 0x00000001)
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#define GET_WACS_MD32_BUSY_LATCHED_WDT(x) ((x>>5) & 0x00000001)
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#define GET_MDINF_BUSY_LATCHED_WDT(x) ((x>>6) & 0x00000001)
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#define GET_C2KINF_BUSY_LATCHED_WDT(x) ((x>>7) & 0x00000001)
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#define GET_MD_DVFSINF_BUSY_LATCHED_WDT(x) ((x>>8) & 0x00000001)
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#define GET_SPMINF_BUSY_LATCHED_WDT(x) ((x>>9) & 0x00000001)
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#define GET_SPMINF_BACKUP_BUSY_LATCHED_WDT(x) ((x>>10) & 0x00000001)
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#define GET_SRCLKEN_RCINF_BUSY_LATCHED_WDT(x) ((x>>11) & 0x00000001)
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#define GET_DCXO_CONNINF_BUSY_LATCHED_WDT(x) ((x>>12) & 0x00000001)
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#define GET_DCXO_NFCINF_BUSY_LATCHED_WDT(x) ((x>>13) & 0x00000001)
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#define GET_MCU_PMINF_BUSY_LATCHED_WDT(x) ((x>>14) & 0x00000001)
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#define GET_MD_ADCINF_0_BUSY_LATCHED_WDT(x) ((x>>15) & 0x00000001)
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#define GET_MD_ADCINF_1_BUSY_LATCHED_WDT(x) ((x>>16) & 0x00000001)
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#define GET_GPSINF_0_BUSY_LATCHED_WDT(x) ((x>>17) & 0x00000001)
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#define GET_GPSINF_1_BUSY_LATCHED_WDT(x) ((x>>18) & 0x00000001)
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#define GET_STAUPD_BUSY_LATCHED_WDT(x) ((x>>19) & 0x00000001)
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#define GET_MD32INF_BUSY_LATCHED_WDT(x) ((x>>20) & 0x00000001)
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#define GET_AG_HARB_REQ_EMPTY_LATCHED_WDT(x) ((x>>21) & 0x00000001)
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#define GET_WRAP_MUX_REQ_LATCHED_WDT(x) ((x>>22) & 0x00000001)
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#define GET_WRAP_AG_DLE_RESTCNT_EMPTY_LATCHED_WDT(x) ((x>>23) & 0x00000001)
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#define GET_MAN_BUSY_LATCHED_WDT(x) ((x>>24) & 0x00000001)
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#define GET_SYNC_IDLE_LATCHED_WDT(x) ((x>>25) & 0x00000001)
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#define GET_SYS_IDLE_NO_PSEL_LATCHED_WDT(x) ((x>>26) & 0x00000001)
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#define GET_SYS_IDLE_LATCHED_WDT(x) ((x>>27) & 0x00000001)
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#define GET_SPI_IDLE_LATCHED_WDT(x) ((x>>28) & 0x00000001)
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#define GET_PWRAP_IDLE_LATCHED_WDT(x) ((x>>29) & 0x00000001)
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#define GET_ARBITER_SEL_CH0(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_SEL_CH1(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_SEL_CH2(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_SEL_CH3(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_SEL_CH4(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_SEL_CH5(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_SEL_CH6(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_SEL_CH7(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_SEL_CH8(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_SEL_CH9(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_SEL_CH10(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_SEL_CH11(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_SEL_CH12(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_SEL_CH13(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_SEL_CH14(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_SEL_CH15(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_SEL_CH16(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_OUT_MDINF_SEL(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_OUT_MD_DVFSINF_SEL(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_OUT_WACS0_SEL(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_OUT_SPMINF_SEL(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_OUT_WACS_MD32_SEL(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_OUT_SRCLKEN_RCINF_SEL(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_OUT_DCXO_CONNINF_SEL(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_OUT_DCXO_NFCINF_SEL(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_OUT_STAUPD_SEL(x) ((x>>0) & 0x0000001f)
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#define GET_ARBITER_OUT_MD_ADCINF_0_SEL(x) ((x>>8) & 0x0000001f)
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#define GET_ARBITER_OUT_MD_ADCINF_1_SEL(x) ((x>>16) & 0x0000001f)
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#define GET_ARBITER_OUT_GPSINF_0_SEL(x) ((x>>24) & 0x0000001f)
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#define GET_ARBITER_OUT_GPSINF_1_SEL(x) ((x>>0) & 0x0000001f)
|
|
#define GET_ARBITER_OUT_WACS2_SEL(x) ((x>>8) & 0x0000001f)
|
|
#define GET_ARBITER_OUT_WACS1_SEL(x) ((x>>16) & 0x0000001f)
|
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#define GET_ARBITER_OUT_WACS3_SEL(x) ((x>>24) & 0x0000001f)
|
|
#define GET_ARBITER_OUT_WACS_P2P_SEL(x) ((x>>0) & 0x0000001f)
|
|
#define GET_STARV_COUNTER0_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER0_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER1_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER1_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER2_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER2_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER3_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER3_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER4_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER4_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER5_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER5_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER6_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER6_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER7_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER7_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER8_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER8_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER9_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER9_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER10_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER10_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER11_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER11_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER12_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER12_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER13_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER13_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER14_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER14_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER15_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER15_ENABLE(x) ((x>>10) & 0x00000001)
|
|
#define GET_STARV_COUNTER16_TARGET(x) ((x>>0) & 0x000003ff)
|
|
#define GET_STARV_COUNTER16_ENABLE(x) ((x>>10) & 0x00000001)
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#define GET_STARV_INT_EN(x) ((x>>0) & 0x00000001)
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#define GET_STARV_COUNTER0_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER0(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER1_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER1(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER2_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER2(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER3_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER3(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER4_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER4(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER5_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER5(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER6_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER6(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER7_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER7(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER8_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER8(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER9_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER9(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER10_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER10(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER11_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER11(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER12_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER12(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER13_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER13(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER14_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER14(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER15_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER15(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER16_GATED(x) ((x>>0) & 0x000003ff)
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#define GET_STARV_COUNTER16(x) ((x>>10) & 0x000003ff)
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#define GET_STARV_COUNTER0_CLR(x) ((x>>0) & 0x00000001)
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#define GET_STARV_COUNTER1_CLR(x) ((x>>1) & 0x00000001)
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#define GET_STARV_COUNTER2_CLR(x) ((x>>2) & 0x00000001)
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#define GET_STARV_COUNTER3_CLR(x) ((x>>3) & 0x00000001)
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#define GET_STARV_COUNTER4_CLR(x) ((x>>4) & 0x00000001)
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#define GET_STARV_COUNTER5_CLR(x) ((x>>5) & 0x00000001)
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#define GET_STARV_COUNTER6_CLR(x) ((x>>6) & 0x00000001)
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#define GET_STARV_COUNTER7_CLR(x) ((x>>7) & 0x00000001)
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#define GET_STARV_COUNTER8_CLR(x) ((x>>8) & 0x00000001)
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#define GET_STARV_COUNTER9_CLR(x) ((x>>9) & 0x00000001)
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#define GET_STARV_COUNTER10_CLR(x) ((x>>10) & 0x00000001)
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#define GET_STARV_COUNTER11_CLR(x) ((x>>11) & 0x00000001)
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#define GET_STARV_COUNTER12_CLR(x) ((x>>12) & 0x00000001)
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#define GET_STARV_COUNTER13_CLR(x) ((x>>13) & 0x00000001)
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#define GET_STARV_COUNTER14_CLR(x) ((x>>14) & 0x00000001)
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#define GET_STARV_COUNTER15_CLR(x) ((x>>15) & 0x00000001)
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#define GET_STARV_COUNTER16_CLR(x) ((x>>16) & 0x00000001)
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#define GET_AG_ARB_HPRIO_STARV(x) ((x>>0) & 0x0001ffff)
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#define GET_MONITOR_MODE(x) ((x>>0) & 0x00000003)
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#define GET_MONITOR_TARGET_0_EN(x) ((x>>2) & 0x00000001)
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#define GET_MONITOR_TARGET_1_EN(x) ((x>>3) & 0x00000001)
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#define GET_MONITOR_TARGET_2_EN(x) ((x>>4) & 0x00000001)
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#define GET_MONITOR_TARGET_3_EN(x) ((x>>5) & 0x00000001)
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#define GET_MONITOR_TARGET_4_EN(x) ((x>>6) & 0x00000001)
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#define GET_MONITOR_TARGET_5_EN(x) ((x>>7) & 0x00000001)
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#define GET_MONITOR_TARGET_6_EN(x) ((x>>8) & 0x00000001)
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#define GET_MONITOR_TARGET_7_EN(x) ((x>>9) & 0x00000001)
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#define GET_MONITOR_STOP_AFTER_INT(x) ((x>>10) & 0x00000001)
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#define GET_MONITOR_RST(x) ((x>>11) & 0x00000001)
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#define GET_MONITOR_RECORD_CNT(x) ((x>>12) & 0x0000003f)
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#define GET_MONITOR_TARGET_CHANNEL_0(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_1(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_2(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_3(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_4(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_5(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_6(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_CHANNEL_7(x) ((x>>0) & 0x00000000)
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#define GET_MONITOR_TARGET_WRITE_0(x) ((x>>0) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_0_MASK(x) ((x>>1) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_1(x) ((x>>2) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_1_MASK(x) ((x>>3) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_2(x) ((x>>4) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_2_MASK(x) ((x>>5) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_3(x) ((x>>6) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_3_MASK(x) ((x>>7) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_4(x) ((x>>8) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_4_MASK(x) ((x>>9) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_5(x) ((x>>10) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_5_MASK(x) ((x>>11) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_6(x) ((x>>12) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_6_MASK(x) ((x>>13) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_7(x) ((x>>14) & 0x00000001)
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#define GET_MONITOR_TARGET_WRITE_7_MASK(x) ((x>>15) & 0x00000001)
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#define GET_MONITOR_TARGET_ADR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_0_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_1(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_1_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_2(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_2_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_3(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_3_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_4(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_4_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_5(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_5_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_6(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_6_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_7(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_ADR_7_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_0_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_1(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_1_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_2(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_2_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_3(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_3_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_4(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_4_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_5(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_5_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_6(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_6_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_7(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_TARGET_WDATA_7_MASK(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_CHANNEL_0(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_1(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_2(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_3(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_4(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_5(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_6(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_7(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_8(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_9(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_10(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_11(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_12(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_13(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_14(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_15(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_16(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_17(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_18(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_19(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_20(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_21(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_22(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_23(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_24(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_25(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_26(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_27(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_28(x) ((x>>0) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_29(x) ((x>>8) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_30(x) ((x>>16) & 0x0000001f)
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#define GET_MONITOR_CHANNEL_31(x) ((x>>24) & 0x0000001f)
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#define GET_MONITOR_WRITE_0(x) ((x>>0) & 0x00000001)
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#define GET_MONITOR_WRITE_1(x) ((x>>1) & 0x00000001)
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#define GET_MONITOR_WRITE_2(x) ((x>>2) & 0x00000001)
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#define GET_MONITOR_WRITE_3(x) ((x>>3) & 0x00000001)
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#define GET_MONITOR_WRITE_4(x) ((x>>4) & 0x00000001)
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#define GET_MONITOR_WRITE_5(x) ((x>>5) & 0x00000001)
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#define GET_MONITOR_WRITE_6(x) ((x>>6) & 0x00000001)
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#define GET_MONITOR_WRITE_7(x) ((x>>7) & 0x00000001)
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#define GET_MONITOR_WRITE_8(x) ((x>>8) & 0x00000001)
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#define GET_MONITOR_WRITE_9(x) ((x>>9) & 0x00000001)
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#define GET_MONITOR_WRITE_10(x) ((x>>10) & 0x00000001)
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#define GET_MONITOR_WRITE_11(x) ((x>>11) & 0x00000001)
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#define GET_MONITOR_WRITE_12(x) ((x>>12) & 0x00000001)
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#define GET_MONITOR_WRITE_13(x) ((x>>13) & 0x00000001)
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#define GET_MONITOR_WRITE_14(x) ((x>>14) & 0x00000001)
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#define GET_MONITOR_WRITE_15(x) ((x>>15) & 0x00000001)
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#define GET_MONITOR_WRITE_16(x) ((x>>16) & 0x00000001)
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#define GET_MONITOR_WRITE_17(x) ((x>>17) & 0x00000001)
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#define GET_MONITOR_WRITE_18(x) ((x>>18) & 0x00000001)
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#define GET_MONITOR_WRITE_19(x) ((x>>19) & 0x00000001)
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#define GET_MONITOR_WRITE_20(x) ((x>>20) & 0x00000001)
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#define GET_MONITOR_WRITE_21(x) ((x>>21) & 0x00000001)
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#define GET_MONITOR_WRITE_22(x) ((x>>22) & 0x00000001)
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#define GET_MONITOR_WRITE_23(x) ((x>>23) & 0x00000001)
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#define GET_MONITOR_WRITE_24(x) ((x>>24) & 0x00000001)
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#define GET_MONITOR_WRITE_25(x) ((x>>25) & 0x00000001)
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#define GET_MONITOR_WRITE_26(x) ((x>>26) & 0x00000001)
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#define GET_MONITOR_WRITE_27(x) ((x>>27) & 0x00000001)
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#define GET_MONITOR_WRITE_28(x) ((x>>28) & 0x00000001)
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#define GET_MONITOR_WRITE_29(x) ((x>>29) & 0x00000001)
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#define GET_MONITOR_WRITE_30(x) ((x>>30) & 0x00000001)
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#define GET_MONITOR_WRITE_31(x) ((x>>31) & 0x00000001)
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#define GET_MONITOR_ADR_0(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_ADR_1(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_ADR_2(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_ADR_3(x) ((x>>16) & 0x0000ffff)
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|
#define GET_MONITOR_ADR_4(x) ((x>>0) & 0x0000ffff)
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|
#define GET_MONITOR_ADR_5(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_6(x) ((x>>0) & 0x0000ffff)
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|
#define GET_MONITOR_ADR_7(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_8(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_9(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_10(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_11(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_12(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_13(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_14(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_15(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_16(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_17(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_18(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_19(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_20(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_21(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_22(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_23(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_24(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_25(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_26(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_27(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_28(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_29(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_30(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_ADR_31(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_0(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_1(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_2(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_3(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_4(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_5(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_6(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_7(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_8(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_9(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_10(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_11(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_12(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_13(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_14(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_15(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_16(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_17(x) ((x>>16) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_18(x) ((x>>0) & 0x0000ffff)
|
|
#define GET_MONITOR_WDATA_19(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_WDATA_20(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_WDATA_21(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_WDATA_22(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_WDATA_23(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_WDATA_24(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_WDATA_25(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_WDATA_26(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_WDATA_27(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_WDATA_28(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_WDATA_29(x) ((x>>16) & 0x0000ffff)
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#define GET_MONITOR_WDATA_30(x) ((x>>0) & 0x0000ffff)
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#define GET_MONITOR_WDATA_31(x) ((x>>16) & 0x0000ffff)
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#define GET_SYS_IDLE_WITH_PSEL_M(x) ((x>>0) & 0x00000001)
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#define GET_SYS_IDLE_FOR_SLEEP_ACK_WITHOUT_PSEL(x) ((x>>1) & 0x00000001)
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#define GET_GPSINF_BUSY_WITHOUT_SPM_SLEEP_REQ(x) ((x>>2) & 0x00000001)
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#define GET_GPSINF_BUSY_WITHOUT_SCP_SLEEP_REQ(x) ((x>>3) & 0x00000001)
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#define GET_CIPHER_FIFO_RD_RX_MUST_BE_BEFORE_TX(x) ((x>>4) & 0x00000001)
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#define GET_BWC_OPTIONS_RESERVED(x) ((x>>5) & 0x07ffffff)
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#define GET_WACS0_WDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS0_ADR(x) ((x>>16) & 0x00007fff)
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#define GET_WACS0_WRITE(x) ((x>>31) & 0x00000001)
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#define GET_WACS0_RDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS0_FSM(x) ((x>>16) & 0x00000007)
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#define GET_WACS0_REQ(x) ((x>>19) & 0x00000001)
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#define GET_SYNC_IDLE0(x) ((x>>20) & 0x00000001)
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#define GET_WACS0_EN0(x) ((x>>21) & 0x00000001)
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#define GET_WACS0_INIT_DONE0(x) ((x>>22) & 0x00000001)
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#define GET_SYS_IDLE0(x) ((x>>23) & 0x00000001)
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#define GET_WACS0_FIFO_FILLCNT(x) ((x>>24) & 0x0000000f)
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#define GET_WACS0_FIFO_FREECNT(x) ((x>>28) & 0x0000000f)
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#define GET_WACS0_VLDCLR(x) ((x>>0) & 0x00000001)
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#define GET_WACS1_WDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS1_ADR(x) ((x>>16) & 0x00007fff)
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#define GET_WACS1_WRITE(x) ((x>>31) & 0x00000001)
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#define GET_WACS1_RDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS1_FSM(x) ((x>>16) & 0x00000007)
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#define GET_WACS1_REQ(x) ((x>>19) & 0x00000001)
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#define GET_SYNC_IDLE1(x) ((x>>20) & 0x00000001)
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#define GET_WACS1_EN1(x) ((x>>21) & 0x00000001)
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#define GET_WACS1_INIT_DONE1(x) ((x>>22) & 0x00000001)
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#define GET_SYS_IDLE1(x) ((x>>23) & 0x00000001)
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#define GET_WACS1_FIFO_FILLCNT(x) ((x>>24) & 0x0000000f)
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#define GET_WACS1_FIFO_FREECNT(x) ((x>>28) & 0x0000000f)
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#define GET_WACS1_VLDCLR(x) ((x>>0) & 0x00000001)
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#define GET_WACS2_WDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS2_ADR(x) ((x>>16) & 0x00007fff)
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#define GET_WACS2_WRITE(x) ((x>>31) & 0x00000001)
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#define GET_WACS2_RDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS2_FSM(x) ((x>>16) & 0x00000007)
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#define GET_WACS2_REQ(x) ((x>>19) & 0x00000001)
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#define GET_SYNC_IDLE2(x) ((x>>20) & 0x00000001)
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#define GET_WACS2_EN2(x) ((x>>21) & 0x00000001)
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#define GET_WACS2_INIT_DONE2(x) ((x>>22) & 0x00000001)
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#define GET_SYS_IDLE2(x) ((x>>23) & 0x00000001)
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#define GET_WACS2_FIFO_FILLCNT(x) ((x>>24) & 0x0000000f)
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#define GET_WACS2_FIFO_FREECNT(x) ((x>>28) & 0x0000000f)
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#define GET_WACS2_VLDCLR(x) ((x>>0) & 0x00000001)
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#define GET_WACS3_WDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS3_ADR(x) ((x>>16) & 0x00007fff)
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#define GET_WACS3_WRITE(x) ((x>>31) & 0x00000001)
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#define GET_WACS3_RDATA(x) ((x>>0) & 0x0000ffff)
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#define GET_WACS3_FSM(x) ((x>>16) & 0x00000007)
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#define GET_WACS3_REQ(x) ((x>>19) & 0x00000001)
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#define GET_SYNC_IDLE3(x) ((x>>20) & 0x00000001)
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#define GET_WACS3_EN3(x) ((x>>21) & 0x00000001)
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#define GET_WACS3_INIT_DONE3(x) ((x>>22) & 0x00000001)
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#define GET_SYS_IDLE3(x) ((x>>23) & 0x00000001)
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#define GET_WACS3_FIFO_FILLCNT(x) ((x>>24) & 0x0000000f)
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#define GET_WACS3_FIFO_FREECNT(x) ((x>>28) & 0x0000000f)
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#define GET_WACS3_VLDCLR(x) ((x>>0) & 0x00000001)
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#endif
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