138 lines
3.1 KiB
C
138 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 MediaTek Inc.
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*/
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#ifndef MTK_FMT_H
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#define MTK_FMT_H
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#include <mt-plat/sync_write.h>
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#include <linux/time.h>
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#define FMT_CMDQ_CMD_MAX (2048)
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#define VDEC_FMT_DEVNAME "vdec-fmt"
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#define FMT_CORE_NUM 2
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#define GCE_EVENT_MAX 8
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#define FMT_MAP_HW_REG_NUM 6
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#define FMT_INST_MAX 64
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#define GCE_PENDING_CNT 10
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#define MAP_PA_BASE_1GB 0x40000000 /* < 1GB registers */
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#define SUSPEND_TIMEOUT_CNT 5000
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#define FMT_REG_GET32(addr) (readl((void *)addr) & 0xFFFFFFFF)
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#define FMT_REG_SET32(addr, val) mt_reg_sync_writel(val, (addr))
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struct gce_cmds {
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u8 cmd[FMT_CMDQ_CMD_MAX];
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u64 addr[FMT_CMDQ_CMD_MAX];
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u64 data[FMT_CMDQ_CMD_MAX];
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u32 mask[FMT_CMDQ_CMD_MAX];
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u32 dma_offset[FMT_CMDQ_CMD_MAX];
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u32 dma_size[FMT_CMDQ_CMD_MAX];
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u32 cmd_cnt;
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};
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struct map_hw_reg {
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unsigned long base;
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unsigned long len;
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unsigned long va;
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};
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struct fmt_pmqos {
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u32 tv_sec;
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u32 tv_usec;
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u32 pixel_size;
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u32 rdma_datasize;
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u32 wdma_datasize;
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};
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struct gce_cmdq_obj {
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u64 cmds_user_ptr;
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u32 identifier;
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u32 secure;
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u32 *taskid;
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struct fmt_pmqos pmqos_param;
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};
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#ifdef CONFIG_COMPAT
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struct compat_gce_cmdq_obj {
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u64 cmds_user_ptr;
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u32 identifier;
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u32 secure;
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compat_uptr_t taskid;
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struct fmt_pmqos pmqos_param;
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};
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#endif
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struct gce_cmdq_task {
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struct gce_cmdq_obj cmdq_buff;
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struct cmdq_pkt *pkt_ptr;
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u32 identifier;
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u32 used;
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};
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enum gce_cmd_id {
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CMD_READ = 0, /* read register */
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CMD_WRITE, /* write register */
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/* polling register until get some value (no timeout, blocking wait) */
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CMD_POLL_REG,
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CMD_WAIT_EVENT, /* gce wait HW done event & clear */
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CMD_CLEAR_EVENT, /* gce clear HW done event */
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CMD_WRITE_FD, /* write file descriptor */
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CMD_MAX
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};
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enum gce_event_id {
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FMT_RDMA0_SW_RST_DONE_ENG,
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FMT_RDMA0_TILE_DONE,
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FMT_WDMA0_SW_RST_DONE_ENG,
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FMT_WDMA0_TILE_DONE,
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FMT_RDMA1_SW_RST_DONE_ENG,
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FMT_RDMA1_TILE_DONE,
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FMT_WDMA1_SW_RST_DONE_ENG,
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FMT_WDMA1_TILE_DONE,
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};
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enum fmt_gce_status {
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GCE_NONE,
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GCE_NORMAL,
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GCE_SECURE
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};
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struct mtk_vdec_fmt {
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dev_t fmt_devno;
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struct cdev *fmt_cdev;
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struct class *fmt_class;
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struct device *fmt_device;
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struct device *dev;
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const char *fmtname;
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struct cmdq_base *clt_base;
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struct cmdq_client *clt_fmt[FMT_CORE_NUM];
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struct cmdq_client *clt_fmt_sec[FMT_CORE_NUM];
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int gce_th_num;
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u16 gce_codec_eid[GCE_EVENT_MAX];
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struct gce_cmds *gce_cmds[FMT_CORE_NUM];
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struct map_hw_reg map_base[FMT_MAP_HW_REG_NUM];
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u32 gce_gpr[FMT_CORE_NUM];
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bool is_entering_suspend;
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struct mutex mux_fmt;
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struct mutex mux_gce_th[FMT_CORE_NUM];
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struct mutex mux_task;
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struct gce_cmdq_task gce_task[FMT_INST_MAX];
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struct semaphore fmt_sem[FMT_CORE_NUM];
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struct notifier_block pm_notifier;
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struct clk *clk_VDEC;
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enum fmt_gce_status gce_status[FMT_CORE_NUM];
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atomic_t gce_job_cnt[FMT_CORE_NUM];
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};
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#define FMT_GCE_SET_CMD_FLUSH _IOW('f', 0, struct gce_cmdq_obj)
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#define FMT_GCE_WAIT_CALLBACK _IOW('f', 1, unsigned int)
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#ifdef CONFIG_COMPAT
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#define COMPAT_FMT_GCE_SET_CMD_FLUSH _IOW('f', 0, struct compat_gce_cmdq_obj)
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#endif
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#endif /* _MTK_FMT_H */
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