101 lines
2.2 KiB
C
101 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Joey Pan <joey.pan@mediatek.com>
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*/
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#ifndef __DDP_CLK_MGR_H__
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#define __DDP_CLK_MGR_H__
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#include "ddp_hal.h"
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#include <linux/clk.h>
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/**
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* display clk id
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* -- by chip
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*/
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enum DDP_CLK_ID {
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/* top clk */
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CLK_MM_MTCMOS = 0,
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CLK_SMI_COMMON,
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CLK_SMI_LARB0,
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CLK_SMI_LARB1,
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CLK_GALS_COMM0,
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CLK_GALS_COMM1,
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/* module clk */
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CLK_DISP_OVL0,
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CLK_DISP_OVL0_2L,
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CLK_DISP_OVL1_2L,
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CLK_DISP_RDMA0,
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CLK_DISP_RDMA1,
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CLK_DISP_WDMA0,
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CLK_DISP_COLOR0,
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CLK_DISP_CCORR0,
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CLK_DISP_AAL0,
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CLK_DISP_GAMMA0,
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CLK_DISP_DITHER0,
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CLK_DSI0_MM_CK,
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CLK_DSI0_IF_CK,
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CLK_DPI_MM_CK,
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CLK_DPI_IF_CK,
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CLK_MM_26M,
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CLK_DISP_RSZ,
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CLK_MUX_MM,
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CLK_MUX_DISP_PWM,
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CLK_DISP_PWM,
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CLK_26M,
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CLK_DISP_POSTMASK,
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CLK_DISP_OVL_FBDC,
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/* DPI */
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CLK_UNIVPLL_D3_D2,
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CLK_UNIVPLL_D3_D4,
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CLK_OSC_D2,
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CLK_OSC_D4,
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CLK_OSC_D16,
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CLK_MUX_DPI0,
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CLK_TVDPLL_D2,
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CLK_TVDPLL_D4,
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CLK_TVDPLL_D8,
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CLK_TVDPLL_D16,
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CLK_TVDPLL_CK,
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CLK_MIPID0_26M,
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MAX_DISP_CLK_CNT
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};
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struct ddp_clk {
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struct clk *pclk;
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/* clk_name: it should be synchronized with DT */
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const char *clk_name;
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int refcnt;
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/* bit 0: main display , bit 1: second display */
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unsigned int belong_to;
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enum DISP_MODULE_ENUM module_id;
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};
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const char *ddp_get_clk_name(unsigned int n);
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int ddp_clk_set_handle(struct clk *pclk, unsigned int n);
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int ddp_clk_prepare_enable(enum DDP_CLK_ID id);
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int ddp_clk_disable_unprepare(enum DDP_CLK_ID id);
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int ddp_clk_set_parent(enum DDP_CLK_ID id, enum DDP_CLK_ID parent);
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int ddp_clk_set_mipi26m(enum DISP_MODULE_ENUM module, int en);
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int ddp_parse_apmixed_base(void);
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int ddp_main_modules_clk_on(void);
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int ddp_main_modules_clk_off(void);
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int ddp_ext_modules_clk_on(void);
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int ddp_ext_modules_clk_off(void);
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int ddp_ovl2mem_modules_clk_on(void);
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int ddp_ovl2mem_modules_clk_off(void);
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int ddp_module_clk_enable(enum DISP_MODULE_TYPE_ENUM module_t);
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int ddp_module_clk_disable(enum DISP_MODULE_TYPE_ENUM module_t);
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enum DDP_CLK_ID ddp_get_module_clk_id(enum DISP_MODULE_ENUM module_id);
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void ddp_clk_top_clk_switch(bool on);
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int ddp_clk_check(void);
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int ddp_ovl_dcm_reset(void);
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int ddp_clk_enable_by_module(enum DISP_MODULE_ENUM module);
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int ddp_clk_disable_by_module(enum DISP_MODULE_ENUM module);
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#endif /* __DDP_CLK_MGR_H__ */
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