124 lines
3.6 KiB
C
124 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Joey Pan <joey.pan@mediatek.com>
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*/
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#ifndef __DSI_M4U_H__
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#define __DSI_M4U_H__
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#include <linux/types.h>
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#if defined(CONFIG_MTK_M4U)
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#include "m4u.h"
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#include "m4u_port.h"
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#endif
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#include "ddp_hal.h"
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#if defined(CONFIG_MTK_ION)
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#include "mtk_ion.h"
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#include "ion_drv.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* display m4u port wrapper
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* -- by chip
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*/
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#if defined(CONFIG_MTK_M4U)
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/* larb 0 */
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/* TODO: PVRIC, postmask, fake engine */
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#define DISP_M4U_PORT_DISP_OVL0 M4U_PORT_DISP_OVL0
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#define DISP_M4U_PORT_DISP_RDMA0 M4U_PORT_DISP_RDMA0
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#define DISP_M4U_PORT_DISP_WDMA0 M4U_PORT_DISP_WDMA0
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#define DISP_M4U_PORT_DISP_POSTMASK M4U_PORT_DISP_POSTMASK0
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#define DISP_M4U_PORT_DISP_OVL0_HDR M4U_PORT_DISP_OVL0_HDR
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/* larb 1 */
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#define DISP_M4U_PORT_DISP_OVL0_2L M4U_PORT_DISP_OVL0_2L
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#define DISP_M4U_PORT_DISP_OVL1_2L M4U_PORT_DISP_OVL1_2L
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#define DISP_M4U_PORT_DISP_RDMA1 M4U_PORT_DISP_RDMA1
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#define DISP_M4U_PORT_DISP_OVL0_2L_HDR M4U_PORT_DISP_OVL0_2L_HDR
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#else
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/* larb 0 */
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/* TODO: PVRIC, postmask, fake engine */
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#define DISP_M4U_PORT_DISP_OVL0 0
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#define DISP_M4U_PORT_DISP_RDMA0 0
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#define DISP_M4U_PORT_DISP_WDMA0 0
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#define DISP_M4U_PORT_DISP_POSTMASK 0
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#define DISP_M4U_PORT_DISP_OVL0_HDR 0
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/* larb 1 */
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#define DISP_M4U_PORT_DISP_OVL0_2L 0
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#define DISP_M4U_PORT_DISP_OVL1_2L 0
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#define DISP_M4U_PORT_DISP_RDMA1 0
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#define DISP_M4U_PORT_DISP_OVL0_2L_HDR 0
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#endif
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struct module_to_m4u_port_t {
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enum DISP_MODULE_ENUM module;
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int larb;
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int port;
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};
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int module_to_m4u_port(enum DISP_MODULE_ENUM module);
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enum DISP_MODULE_ENUM m4u_port_to_module(int port);
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int disp_m4u_callback(int port, unsigned long mva,
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void *data);
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void disp_m4u_init(void);
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int config_display_m4u_port(void);
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int disp_mva_map_kernel(enum DISP_MODULE_ENUM module, unsigned int mva,
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unsigned int size, unsigned long *map_va,
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unsigned int *map_size);
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int disp_mva_unmap_kernel(unsigned int mva, unsigned int size,
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unsigned long map_va);
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struct ion_client *disp_ion_create(const char *name);
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struct ion_handle *disp_ion_alloc(struct ion_client *client,
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unsigned int heap_id_mask, size_t align,
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unsigned int size);
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int *disp_aosp_ion_alloc(unsigned int heap_id_mask,
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unsigned int size);
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int disp_ion_get_mva(struct ion_client *client, struct ion_handle *handle,
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unsigned int *mva, int port);
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int disp_aosp_ion_get_iova(struct device *dev, int fd,
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dma_addr_t *iova);
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struct ion_handle *disp_ion_import_handle(struct ion_client *client, int fd);
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void disp_ion_free_handle(struct ion_client *client, struct ion_handle *handle);
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#if defined(MTK_FB_ION_SUPPORT)
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void disp_ion_cache_flush(struct ion_client *client, struct ion_handle *handle,
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enum ION_CACHE_SYNC_TYPE sync_type);
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#endif
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void disp_ion_destroy(struct ion_client *client);
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int disp_hal_allocate_framebuffer(phys_addr_t pa_start, phys_addr_t pa_end,
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unsigned long *va, unsigned long *mva);
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#ifdef MTKFB_M4U_SUPPORT
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int disp_allocate_mva(struct m4u_client_t *client, enum DISP_MODULE_ENUM module,
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unsigned long va, struct sg_table *sg_table,
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unsigned int size, unsigned int prot, unsigned int flags,
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unsigned int *pMva);
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#endif
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#ifdef CONFIG_MTK_IOMMU_V2
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int disp_aosp_set_dev(struct device *dev);
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int disp_aosp_release_reserved_area(phys_addr_t pa_start,
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phys_addr_t pa_end);
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int disp_aosp_alloc_iova(struct device *dev, phys_addr_t pa_start,
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phys_addr_t pa_end,
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unsigned long *va,
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dma_addr_t *iova);
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int disp_aosp_mmap(struct vm_area_struct *vma, unsigned long va,
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unsigned long mva, unsigned int size);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DSI_M4U_H__ */
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