132 lines
3.9 KiB
C
132 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef _DDP_DISP_BDG_H_
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#define _DDP_DISP_BDG_H_
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#include "../../../spi_slave_drv/spi_slave.h"
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#include "ddp_hal.h"
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#include "ddp_info.h"
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#include "lcm_drv.h"
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#include <linux/interrupt.h>
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#define HW_NUM (2)
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#define RX_V12 (1700)
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#ifdef CONFIG_MTK_MT6382_VDO_MODE
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#define _VDO_120FPS_
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#endif
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#ifdef CONFIG_MTK_MT6382_CMD_MODE
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#define _CMD_120FPS_
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#endif
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//#define _90HZ_
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#ifdef _VDO_120FPS_ //for vdo mode 120Hz
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#define RXTX_RATIO (230)
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#endif
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#ifdef _CMD_120FPS_ //for cmd mode 120Hz
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#define RXTX_RATIO (300)
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#define _LINE_BACK_TO_LP_ //only for cmd mode
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#endif
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#ifdef _90HZ_
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#define _Disable_HS_DCO_
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#define _Disable_LP_TX_L023_
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#else
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#define _G_MODE_EN_
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#endif
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enum DISP_BDG_ENUM {
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DISP_BDG_DSI0 = 0,
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DISP_BDG_DSI1,
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DISP_BDG_DSIDUAL,
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DISP_BDG_NUM
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};
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enum MIPI_TX_PAD_VALUE {
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PAD_D2P = 0,
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PAD_D2N,
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PAD_D0P,
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PAD_D0N,
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PAD_CKP,
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PAD_CKN,
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PAD_D1P,
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PAD_D1N,
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PAD_D3P,
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PAD_D3N,
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PAD_MAX_NUM
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};
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#define TX_DCS_SHORT_PACKET_ID_0 (0x05)
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#define TX_DCS_SHORT_PACKET_ID_1 (0x15)
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#define TX_DCS_LONG_PACKET_ID (0x39)
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#define TX_DCS_READ_PACKET_ID (0x06)
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#define TX_GERNERIC_SHORT_PACKET_ID_1 (0x13)
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#define TX_GERNERIC_SHORT_PACKET_ID_2 (0x23)
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#define TX_GERNERIC_LONG_PACKET_ID (0x29)
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#define TX_GERNERIC_READ_LONG_PACKET_ID (0x14)
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#define REG_FLAG_ESCAPE_ID (0x00)
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#define REG_FLAG_DELAY_MS_V3 (0xFF)
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int bdg_is_bdg_connected(void);
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int bdg_tx_init(enum DISP_BDG_ENUM module,
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struct disp_ddp_path_config *config, void *cmdq);
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int bdg_tx_deinit(enum DISP_BDG_ENUM module, void *cmdq);
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void bdg_register_init(void);
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int bdg_common_init(enum DISP_BDG_ENUM module,
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struct disp_ddp_path_config *config, void *cmdq);
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int bdg_common_deinit(enum DISP_BDG_ENUM module, void *cmdq);
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int bdg_common_init_for_rx_pat(enum DISP_BDG_ENUM module,
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struct disp_ddp_path_config *config, void *cmdq);
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int mipi_dsi_rx_mac_init(enum DISP_BDG_ENUM module,
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struct disp_ddp_path_config *config, void *cmdq);
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void bdg_tx_pull_6382_reset_pin(void);
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void bdg_tx_set_6382_reset_pin(unsigned int value);
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int bdg_tx_bist_pattern(enum DISP_BDG_ENUM module,
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void *cmdq, bool enable, unsigned int sel,
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unsigned int red, unsigned int green,
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unsigned int blue);
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int bdg_tx_set_mode(enum DISP_BDG_ENUM module,
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void *cmdq, unsigned int mode);
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int bdg_mipi_clk_change(int msg, int en);
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int bdg_tx_start(enum DISP_BDG_ENUM module, void *cmdq);
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int bdg_tx_stop(enum DISP_BDG_ENUM module, void *cmdq);
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int bdg_tx_cmd_mode(enum DISP_BDG_ENUM module, void *cmdq);
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int bdg_mutex_trigger(enum DISP_BDG_ENUM module, void *cmdq);
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int bdg_tx_reset(enum DISP_BDG_ENUM module, void *cmdq);
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int bdg_vm_mode_set(enum DISP_BDG_ENUM module, bool enable,
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unsigned int long_pkt, void *cmdq);
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int bdg_tx_wait_for_idle(enum DISP_BDG_ENUM module);
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int bdg_dsi_dump_reg(enum DISP_BDG_ENUM module, unsigned int level);
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int bdg_set_dcs_read_cmd(bool enable, void *cmdq);
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unsigned int get_ap_data_rate(void);
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unsigned int get_ap_dyn_data_rate(int en);
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unsigned int get_bdg_dyn_data_rate(int en);
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unsigned int get_bdg_data_rate(void);
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int set_bdg_data_rate(unsigned int data_rate);
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unsigned int get_bdg_line_cycle(void);
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unsigned int get_dsc_state(void);
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void set_mt6382_init(unsigned int value);
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unsigned int get_mt6382_init(void);
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unsigned int get_bdg_tx_mode(void);
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void set_bdg_tx_mode(unsigned int value);
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int check_stopstate(void *cmdq);
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int polling_status(void);
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void bdg_clk_buf_nfc(bool onoff);
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unsigned int mtk_spi_read(u32 addr);
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int mtk_spi_write(u32 addr, unsigned int regval);
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int mtk_spi_mask_write(u32 addr, u32 msk, u32 value);
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//irqreturn_t bdg_eint_irq_handler(int irq, void *data);
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irqreturn_t bdg_eint_thread_handler(int irq, void *data);
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void bdg_request_eint_irq(void);
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//void bdg_free_eint_irq(void);
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/***** NFC SRCLKENAI0 Interrupt Handler +++ *****/
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irqreturn_t nfc_eint_thread_handler(int irq, void *data);
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void nfc_request_eint_irq(void);
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/***** NFC SRCLKENAI0 Interrupt Handler --- *****/
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#endif
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