409 lines
11 KiB
C
409 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __M4U_PRIV_H__
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#define __M4U_PRIV_H__
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#include <linux/ioctl.h>
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#include <linux/fs.h>
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#include <linux/debugfs.h>
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#include <linux/platform_device.h>
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#include <linux/miscdevice.h>
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#include "m4u.h"
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#include "m4u_reg.h"
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#include "../2.4/m4u_pgtable.h"
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#include <aee.h>
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#define M4UMSG(string, args...) pr_notice("[M4U][ERR] "string, ##args)
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#define M4UINFO(string, args...) pr_debug("[M4U] "string, ##args)
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#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT)
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#define M4U_TEE_SERVICE_ENABLE
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#endif
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#include "m4u_hw.h"
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#ifdef CONFIG_FPGA_EARLY_PORTING
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#define M4U_FPGAPORTING
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#endif
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#define M4U_PROFILE
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#define M4U_DVT 0
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#ifndef M4U_PROFILE
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#define MMProfileLogEx(...)
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#define MMProfileEnable(...)
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#define MMProfileStart(...)
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#define MMProfileEnableEvent(...)
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#define MMP_Event unsigned int
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#define mmprofile_log_ex(...)
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#else
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#include <mmprofile.h>
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extern void MMProfileEnable(int enable);
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extern void MMProfileStart(int start);
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#endif
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#ifdef CONFIG_PM
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extern void mt_irq_set_sens(unsigned int irq, unsigned int sens);
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extern void mt_irq_set_polarity(unsigned int irq, unsigned int polarity);
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#endif
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#ifdef M4U_TEE_SERVICE_ENABLE
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extern int gM4U_L2_enable;
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#endif
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extern void show_pte(struct mm_struct *mm, unsigned long addr);
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#ifndef dmac_map_area
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#define dmac_map_area __dma_map_area
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#endif
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#ifndef dmac_unmap_area
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#define dmac_unmap_area __dma_unmap_area
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#endif
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#ifndef dmac_flush_range
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#define dmac_flush_range __dma_flush_range
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#endif
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#ifndef outer_clean_all
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#define outer_clean_all(...)
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#endif
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#ifndef outer_flush_all
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#define outer_flush_all(...)
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#endif
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#ifndef CONFIG_MTK_CLKMGR
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#define enable_clock(...)
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#define disable_clock(...)
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#endif
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#ifdef M4U_FPGAPORTING
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#define smp_inner_dcache_flush_all(...)
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/* #define register_larb_monitor(...) */
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#if 0
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#define aee_kernel_exception(...)
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#define aee_kernel_warning_api(...)
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#endif
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#else
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extern void smp_inner_dcache_flush_all(void);
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#endif
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#ifdef CONFIG_MTK_CLKMGR
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#include <mach/mt_clkmgr.h>
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#else
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#include <linux/clk.h>
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#endif
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#if !defined(CONFIG_MTK_CLKMGR)
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#if 0
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enum {
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SMI_COMMON,
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SMI_LARB0,
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SMI_LARB1,
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SMI_LARB2,
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SMI_LARB3,
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SMI_LARB4,
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SMI_LARB5,
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SMI_LARB6,
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SMI_LARB7,
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MTCMOS_DIS,
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MTCMOS_VDE,
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MTCMOS_IMG,
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MTCMOS_CAM,
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MTCMOS_VEN,
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SMI_CLK_NUM,
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};
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#endif
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#endif /* !defined(CONFIG_MTK_CLKMGR) */
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struct m4u_device {
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struct miscdevice dev;
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struct proc_dir_entry *m4u_dev_proc_entry;
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struct device *pDev[TOTAL_M4U_NUM];
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struct dentry *debug_root;
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unsigned long m4u_base[TOTAL_M4U_NUM];
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unsigned int irq_num[TOTAL_M4U_NUM];
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struct clk *infra_m4u;
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/*struct clk *smi_clk[SMI_CLK_NUM];*/
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};
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struct m4u_domain {
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struct imu_pgd_t *pgd;
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dma_addr_t pgd_pa;
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struct mutex pgtable_mutex;
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unsigned int pgsize_bitmap;
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};
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struct m4u_buf_info_t {
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struct list_head link;
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unsigned long va;
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unsigned int mva;
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unsigned int size;
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int port;
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unsigned int prot;
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unsigned int flags;
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struct sg_table *sg_table;
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unsigned int mva_align;
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unsigned int size_align;
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int seq_id;
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unsigned long mapped_kernel_va_for_debug;
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};
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struct M4U_MAU_STRUCT {
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int port;
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bool write;
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unsigned int mva;
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unsigned int size;
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bool enable;
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bool force;
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};
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struct M4U_TF_STRUCT {
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int port;
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bool fgEnable;
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};
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/* ================================ */
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/* === define in m4u_mva.c========= */
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typedef int (mva_buf_fn_t)(void *priv,
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unsigned int mva_start, unsigned int mva_end, void *data);
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void m4u_mvaGraph_init(void *priv_reserve);
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void m4u_mvaGraph_dump_raw(void);
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void m4u_mvaGraph_dump(void);
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void *mva_get_priv_ext(unsigned int mva);
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int mva_foreach_priv(mva_buf_fn_t *fn, void *data);
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void *mva_get_priv(unsigned int mva);
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unsigned int m4u_do_mva_alloc(unsigned long va, unsigned int size, void *priv);
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unsigned int m4u_do_mva_alloc_fix(unsigned long va,
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unsigned int mva, unsigned int size, void *priv);
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unsigned int m4u_do_mva_alloc_start_from(unsigned long va,
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unsigned int mva, unsigned int size, void *priv);
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int m4u_do_mva_free(unsigned int mva, unsigned int size);
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/* ================================= */
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/* ==== define in m4u_pgtable.c===== */
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void m4u_dump_pgtable(struct m4u_domain *domain, struct seq_file *seq);
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void m4u_dump_pte_nolock(struct m4u_domain *domain, unsigned int mva);
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void m4u_dump_pte(struct m4u_domain *domain, unsigned int mva);
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int m4u_pgtable_init(struct m4u_device *m4u_dev, struct m4u_domain *m4u_domain);
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int m4u_map_4K(struct m4u_domain *m4u_domain,
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unsigned int mva, phys_addr_t pa, unsigned int prot);
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int m4u_clean_pte(struct m4u_domain *domain,
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unsigned int mva, unsigned int size);
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unsigned long m4u_get_pte(struct m4u_domain *domain, unsigned int mva);
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/* ================================= */
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/* ==== define in m4u_hw.c ===== */
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void m4u_invalid_tlb_by_range(struct m4u_domain *m4u_domain,
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unsigned int mva_start, unsigned int mva_end);
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struct m4u_domain *m4u_get_domain_by_port(int port);
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struct m4u_domain *m4u_get_domain_by_id(int id);
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int m4u_get_domain_nr(void);
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int m4u_reclaim_notify(int port, unsigned int mva, unsigned int size);
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int m4u_hw_init(struct m4u_device *m4u_dev, int m4u_id);
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int m4u_hw_deinit(struct m4u_device *m4u_dev, int m4u_id);
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int m4u_reg_backup(void);
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int m4u_reg_restore(void);
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int m4u_insert_seq_range(int port, unsigned int MVAStart, unsigned int MVAEnd);
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int m4u_invalid_seq_range_by_id(int port, int seq_id);
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void m4u_print_port_status(struct seq_file *seq, int only_print_active);
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int m4u_dump_main_tlb(int m4u_id, int m4u_slave_id);
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int m4u_dump_pfh_tlb(int m4u_id);
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int m4u_dump_victim_tlb(int m4u_id);
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int m4u_domain_init(struct m4u_device *m4u_dev, void *priv_reserve);
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/*int config_mau(struct M4U_MAU_STRUCT mau);*/
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int m4u_enable_tf(unsigned int port, bool fgenable);
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void m4u_dump_pgtable_for_debug(unsigned int mva, unsigned int mva_size);
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void m4u_dump_pgtable_in_range(struct m4u_domain *domain,
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unsigned int mva,
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unsigned int mva_size);
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unsigned int get_first_free_idx(void);
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extern int gM4U_4G_DRAM_Mode;
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/* ================================= */
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/* ==== define in m4u.c ===== */
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int m4u_dump_buf_info(struct seq_file *seq);
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int m4u_map_sgtable(struct m4u_domain *m4u_domain, unsigned int mva,
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struct sg_table *sg_table,
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unsigned int size, unsigned int prot);
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int m4u_unmap(struct m4u_domain *domain, unsigned int mva, unsigned int size);
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void m4u_get_pgd(struct m4u_client_t *client,
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int port, void **pgd_va, void **pgd_pa, unsigned int *size);
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unsigned long m4u_mva_to_pa(struct m4u_client_t *client,
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int port, unsigned int mva);
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int m4u_query_mva_info(unsigned int mva, unsigned int size,
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unsigned int *real_mva, unsigned int *real_size);
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/* ================================= */
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/* ==== define in m4u_debug.c ===== */
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int m4u_debug_init(struct m4u_device *m4u_dev);
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static inline dma_addr_t get_sg_phys(struct scatterlist *sg)
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{
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dma_addr_t pa;
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pa = sg_dma_address(sg);
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if (pa == 0)
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pa = sg_phys(sg);
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return pa;
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}
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#define M4U_PGD_SIZE (16*1024)
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#define M4U_LOG_LEVEL_HIGH 3
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#define M4U_LOG_LEVEL_MID 2
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#define M4U_LOG_LEVEL_LOW 1
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extern int gM4U_log_level;
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extern int gM4U_log_to_uart;
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#define _M4ULOG(level, string, args...) \
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do {\
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if (level > gM4U_log_level) {\
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if (level > gM4U_log_to_uart)\
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pr_notice(string, ##args);\
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else\
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pr_debug("[M4U] "string, ##args);\
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} \
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} while (0)
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#define M4ULOG_LOW(string, args...) _M4ULOG(M4U_LOG_LEVEL_LOW, string, ##args)
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#define M4ULOG_MID(string, args...) _M4ULOG(M4U_LOG_LEVEL_MID, string, ##args)
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#define M4ULOG_HIGH(string, args...) _M4ULOG(M4U_LOG_LEVEL_HIGH, string, ##args)
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#define M4UERR(string, args...) do {\
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pr_notice("[M4U][ERR]:"string, ##args); \
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aee_kernel_exception("M4U", "[M4U] error:"string, ##args); \
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} while (0)
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#define m4u_aee_print(string, args...) do {\
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char m4u_name[100];\
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snprintf(m4u_name, 100, "[M4U]"string, ##args); \
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aee_kernel_warning_api(__FILE__, __LINE__, \
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DB_OPT_MMPROFILE_BUFFER | DB_OPT_DUMP_DISPLAY, \
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m4u_name, "[M4U] error"string, ##args); \
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pr_notice("[M4U] error:"string, ##args); \
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} while (0)
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/*aee_kernel_warning(m4u_name, "[M4U] error:"string,##args); */
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#define M4U_PRINT_LOG_OR_SEQ(seq_file, fmt, args...) \
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do {\
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if (seq_file)\
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seq_printf(seq_file, fmt, ##args);\
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else\
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pr_debug(fmt, ##args);\
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} while (0)
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/* ======================================= */
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/* ==== other macros ============ */
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#define M4U_GET_PAGE_NUM(va, size) \
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((((va)&(PAGE_SIZE-1))+(size)+(PAGE_SIZE-1))>>12)
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#define M4U_PAGE_MASK 0xfffL
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enum M4U_MMP_TYPE {
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M4U_MMP_ALLOC_MVA = 0,
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M4U_MMP_DEALLOC_MVA,
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M4U_MMP_CONFIG_PORT,
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M4U_MMP_M4U_ERROR,
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M4U_MMP_CACHE_SYNC,
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M4U_MMP_TOGGLE_CG,
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M4U_MMP_MAX,
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};
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extern MMP_Event M4U_MMP_Events[M4U_MMP_MAX];
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struct M4U_MOUDLE_STRUCT {
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int port;
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unsigned long BufAddr;
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unsigned int BufSize;
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unsigned int prot;
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unsigned int MVAStart;
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unsigned int MVAEnd;
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unsigned int flags;
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};
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struct M4U_CACHE_STRUCT {
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int port;
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enum M4U_CACHE_SYNC_ENUM eCacheSync;
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unsigned long va;
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unsigned int size;
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unsigned int mva;
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};
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struct M4U_DMA_STRUCT {
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int port;
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enum M4U_DMA_TYPE eDMAType;
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enum M4U_DMA_DIR eDMADir;
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unsigned long va;
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unsigned int size;
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unsigned int mva;
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};
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/* IOCTL commnad */
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#define MTK_M4U_MAGICNO 'g'
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#define MTK_M4U_T_POWER_ON _IOW(MTK_M4U_MAGICNO, 0, int)
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#define MTK_M4U_T_POWER_OFF _IOW(MTK_M4U_MAGICNO, 1, int)
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#define MTK_M4U_T_DUMP_REG _IOW(MTK_M4U_MAGICNO, 2, int)
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#define MTK_M4U_T_DUMP_INFO _IOW(MTK_M4U_MAGICNO, 3, int)
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#define MTK_M4U_T_ALLOC_MVA _IOWR(MTK_M4U_MAGICNO, 4, int)
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#define MTK_M4U_T_DEALLOC_MVA _IOW(MTK_M4U_MAGICNO, 5, int)
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#define MTK_M4U_T_INSERT_TLB_RANGE _IOW(MTK_M4U_MAGICNO, 6, int)
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#define MTK_M4U_T_INVALID_TLB_RANGE _IOW(MTK_M4U_MAGICNO, 7, int)
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#define MTK_M4U_T_INVALID_TLB_ALL _IOW(MTK_M4U_MAGICNO, 8, int)
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#define MTK_M4U_T_MANUAL_INSERT_ENTRY _IOW(MTK_M4U_MAGICNO, 9, int)
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#define MTK_M4U_T_CACHE_SYNC _IOW(MTK_M4U_MAGICNO, 10, int)
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#define MTK_M4U_T_CONFIG_PORT _IOW(MTK_M4U_MAGICNO, 11, int)
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#define MTK_M4U_T_CONFIG_ASSERT _IOW(MTK_M4U_MAGICNO, 12, int)
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#define MTK_M4U_T_INSERT_WRAP_RANGE _IOW(MTK_M4U_MAGICNO, 13, int)
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#define MTK_M4U_T_MONITOR_START _IOW(MTK_M4U_MAGICNO, 14, int)
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#define MTK_M4U_T_MONITOR_STOP _IOW(MTK_M4U_MAGICNO, 15, int)
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#define MTK_M4U_T_RESET_MVA_RELEASE_TLB _IOW(MTK_M4U_MAGICNO, 16, int)
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#define MTK_M4U_T_CONFIG_PORT_ROTATOR _IOW(MTK_M4U_MAGICNO, 17, int)
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#define MTK_M4U_T_QUERY_MVA _IOW(MTK_M4U_MAGICNO, 18, int)
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#define MTK_M4U_T_M4UDrv_CONSTRUCT _IOW(MTK_M4U_MAGICNO, 19, int)
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#define MTK_M4U_T_M4UDrv_DECONSTRUCT _IOW(MTK_M4U_MAGICNO, 20, int)
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#define MTK_M4U_T_DUMP_PAGETABLE _IOW(MTK_M4U_MAGICNO, 21, int)
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#define MTK_M4U_T_REGISTER_BUFFER _IOW(MTK_M4U_MAGICNO, 22, int)
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#define MTK_M4U_T_CACHE_FLUSH_ALL _IOW(MTK_M4U_MAGICNO, 23, int)
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#define MTK_M4U_T_CONFIG_PORT_ARRAY _IOW(MTK_M4U_MAGICNO, 26, int)
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#define MTK_M4U_T_CONFIG_MAU _IOW(MTK_M4U_MAGICNO, 27, int)
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#define MTK_M4U_T_CONFIG_TF _IOW(MTK_M4U_MAGICNO, 28, int)
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#define MTK_M4U_T_DMA_OP _IOW(MTK_M4U_MAGICNO, 29, int)
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#define MTK_M4U_T_SEC_INIT _IOW(MTK_M4U_MAGICNO, 50, int)
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#ifdef CONFIG_MACH_MT6763
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int larb_clock_on(int larb, bool config_mtcmos);
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int larb_clock_off(int larb, bool config_mtcmos);
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#endif
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#ifdef M4U_TEE_SERVICE_ENABLE
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int m4u_config_port_tee(
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struct M4U_PORT_STRUCT *pM4uPort);
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int m4u_larb_backup_sec(unsigned int larb_idx);
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int m4u_larb_restore_sec(unsigned int larb_idx);
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int m4u_config_port_array_tee(unsigned char *port_array);
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int m4u_sec_init(void);
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#endif
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#endif
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