320 lines
13 KiB
C
320 lines
13 KiB
C
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/******************************************************************************
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*
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* Copyright (C) 2022 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*****************************************************************************
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* Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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*/
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/**
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*******************************************************************************
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* @file
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* isvcd_thread_compute_bs.c
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*
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* @brief
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* Contains routines that for multi-thread decoder
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*
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* @author
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* Kishore
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*
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* @remarks
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* None
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*
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*******************************************************************************
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*/
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#include <string.h>
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#include "ih264d_error_handler.h"
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#include "ih264d_debug.h"
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#include "ih264d_defs.h"
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#include "ih264d_debug.h"
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#include "ih264d_tables.h"
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#include "isvcd_structs.h"
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#include "ih264d_defs.h"
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#include "ih264d_mb_utils.h"
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#include "ih264d_thread_compute_bs.h"
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#include "isvcd_thread_compute_bs.h"
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#include "ithread.h"
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#include "ih264d_deblocking.h"
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#include "ih264d_process_pslice.h"
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#include "isvcd_process_epslice.h"
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#include "ih264d_process_intra_mb.h"
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#include "ih264d_mb_utils.h"
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#include "ih264d_tables.h"
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#include "ih264d_format_conv.h"
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#include "ih264d_defs.h"
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UWORD16 ih264d_update_csbp_8x8(UWORD16 u2_luma_csbp);
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void ih264d_fill_bs2_horz_vert(UWORD32 *pu4_bs, /* Base pointer of BS table */
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WORD32 u4_left_mb_csbp, /* csbp of left mb */
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WORD32 u4_top_mb_csbp, /* csbp of top mb */
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WORD32 u4_cur_mb_csbp, /* csbp of current mb */
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const UWORD32 *pu4_packed_bs2, const UWORD16 *pu2_4x4_v2h_reorder);
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void isvcd_fill_bs_ibl(deblk_mb_t *ps_deblk_mb, UWORD8 u1_top_mb_type, UWORD8 u1_left_mb_type,
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dec_mb_info_t *ps_cur_mb_info, UWORD16 *pu2_curr_res_luma_csbp,
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UWORD16 *pu2_left_res_luma_csbp, UWORD16 *pu2_top_res_luma_csbp);
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/*****************************************************************************/
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/* */
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/* Function Name : isvcd_compute_bs_non_mbaff_thread */
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/* */
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/* Description : This function computes the pointers of left,top & current*/
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/* : Nnz, MvPred & deblk_mb_t and supplies to FillBs function
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* for*/
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/* : Boundary Strength Calculation .this function is used */
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/* : BS being calculated in separate thread */
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/* Inputs : pointer to decoder context,cur_mb_info,u4_mb_num */
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/* Processing : */
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/* */
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/* Outputs : Produces the Boundary Strength for Current Mb */
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/* Returns : None */
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/* */
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/* Revision History: */
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/* */
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/* DD MM YYYY Author(s) Changes (Describe the changes made) */
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/* ITTIAM */
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/*****************************************************************************/
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void isvcd_compute_bs_non_mbaff_thread(svc_dec_lyr_struct_t *ps_svc_lyr_dec,
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dec_mb_info_t *ps_cur_mb_info, UWORD32 u4_mb_num)
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{
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dec_struct_t *ps_dec = &ps_svc_lyr_dec->s_dec;
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/* Mvpred and Nnz for top and Courrent */
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mv_pred_t *ps_cur_mv_pred, *ps_top_mv_pred = NULL, *ps_left_mv_pred;
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/* deblk_mb_t Params */
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deblk_mb_t *ps_cur_mb_params; /*< Parameters of current MacroBlock */
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deblkmb_neighbour_t *ps_deblk_top_mb;
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/* Reference Index to POC mapping*/
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void **apv_map_ref_idx_to_poc;
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UWORD32 u4_leftmbtype;
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UWORD16 u2_left_csbp, u2_top_csbp, u2_cur_csbp;
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/* Set of flags */
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UWORD32 u4_cur_mb_intra, u1_top_mb_typ, u4_cur_mb_fld;
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UWORD32 u4_cur_mb_ibl;
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UWORD32 u1_cur_mb_type;
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UWORD32 *pu4_bs_table;
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UWORD16 *pu2_curr_res_luma_csbp;
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UWORD16 *pu2_left_res_luma_csbp;
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UWORD16 *pu2_top_res_luma_csbp;
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/* Neighbour availability */
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/* Initialization */
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const UWORD32 u2_mbx = ps_cur_mb_info->u2_mbx;
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const UWORD32 u2_mby = ps_cur_mb_info->u2_mby;
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const UWORD32 u1_pingpong = u2_mbx & 0x01;
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PROFILE_DISABLE_BOUNDARY_STRENGTH()
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ps_deblk_top_mb = ps_dec->ps_deblk_top_mb + u2_mbx;
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/* Pointer assignment for Current DeblkMB, Current Mv Pred */
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ps_cur_mb_params = ps_dec->ps_deblk_pic + u4_mb_num;
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ps_cur_mv_pred = ps_dec->s_cur_pic.ps_mv + (u4_mb_num << 4);
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/*Pointer assignment for Residual NNZ */
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pu2_curr_res_luma_csbp = ps_svc_lyr_dec->pu2_frm_res_luma_csbp + ps_cur_mb_info->u2_mbx;
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pu2_curr_res_luma_csbp += ps_cur_mb_info->u2_mby * ps_svc_lyr_dec->i4_frm_res_luma_csbp_stride;
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pu2_left_res_luma_csbp = pu2_curr_res_luma_csbp - (ps_cur_mb_info->u2_mbx != 0);
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pu2_top_res_luma_csbp = pu2_curr_res_luma_csbp - ((ps_cur_mb_info->u2_mby != 0) *
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ps_svc_lyr_dec->i4_frm_res_luma_csbp_stride);
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apv_map_ref_idx_to_poc = (void **) ps_dec->ps_computebs_cur_slice->ppv_map_ref_idx_to_poc + 1;
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u1_cur_mb_type = ps_cur_mb_params->u1_mb_type;
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u1_top_mb_typ = ps_deblk_top_mb->u1_mb_type;
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ps_deblk_top_mb->u1_mb_type = u1_cur_mb_type;
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ps_cur_mb_params->u1_topmb_qp = ps_deblk_top_mb->u1_mb_qp;
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ps_deblk_top_mb->u1_mb_qp = ps_cur_mb_params->u1_mb_qp;
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ps_cur_mb_params->u1_left_mb_qp = ps_dec->deblk_left_mb[1].u1_mb_qp;
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ps_dec->deblk_left_mb[1].u1_mb_qp = ps_cur_mb_params->u1_mb_qp;
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/* if no deblocking required for current Mb then continue */
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/* Check next Mbs in Mb group */
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if(ps_cur_mb_params->u1_deblocking_mode & MB_DISABLE_FILTERING)
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{
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void **pu4_map_ref_idx_to_poc_l1 = apv_map_ref_idx_to_poc + POC_LIST_L0_TO_L1_DIFF;
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{
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/* Store Parameter for Top MvPred refernce frame Address */
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void **ppv_top_mv_pred_addr = ps_cur_mb_info->ps_curmb->u4_pic_addrress;
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WORD8 *p1_refTop0 = (ps_cur_mv_pred + 12)->i1_ref_frame;
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WORD8 *p1_refTop1 = (ps_cur_mv_pred + 14)->i1_ref_frame;
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/* Store Left addresses for Next Mb */
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void **ppv_left_mv_pred_addr = ps_dec->ps_left_mvpred_addr[!u1_pingpong][1].u4_add;
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WORD8 *p1_refleft0 = (ps_cur_mv_pred + 3)->i1_ref_frame;
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ppv_top_mv_pred_addr[0] = apv_map_ref_idx_to_poc[p1_refTop0[0]];
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ppv_top_mv_pred_addr[1] = pu4_map_ref_idx_to_poc_l1[p1_refTop0[1]];
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ppv_left_mv_pred_addr[2] = apv_map_ref_idx_to_poc[p1_refTop1[0]];
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ppv_top_mv_pred_addr[2] = apv_map_ref_idx_to_poc[p1_refTop1[0]];
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ppv_left_mv_pred_addr[3] = pu4_map_ref_idx_to_poc_l1[p1_refTop1[1]];
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ppv_top_mv_pred_addr[3] = pu4_map_ref_idx_to_poc_l1[p1_refTop1[1]];
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ppv_left_mv_pred_addr[0] = apv_map_ref_idx_to_poc[p1_refleft0[0]];
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ppv_left_mv_pred_addr[1] = pu4_map_ref_idx_to_poc_l1[p1_refleft0[1]];
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/* Storing the leftMbtype for next Mb */
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ps_dec->deblk_left_mb[1].u1_mb_type = ps_cur_mb_params->u1_mb_type;
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}
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return;
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}
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/* Flag for extra left Edge */
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ps_cur_mb_params->u1_single_call = 1;
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/* Update the Left deblk_mb_t and Left MvPred Parameters */
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if(!u2_mbx)
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{
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u4_leftmbtype = 0;
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/* Initialize the ps_left_mv_pred with Junk but Valid Location */
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/* to avoid invalid memory access */
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/* this is read only pointer */
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ps_left_mv_pred = ps_cur_mv_pred + 3;
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}
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else
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{
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u4_leftmbtype = ps_dec->deblk_left_mb[1].u1_mb_type;
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/* Come to Left Most Edge of the MB */
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ps_left_mv_pred = ps_cur_mv_pred - (1 << 4) + 3;
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}
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if(!u2_mby) u1_top_mb_typ = 0;
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/* MvPred Pointer Calculation */
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ps_top_mv_pred = ps_cur_mv_pred - (ps_dec->u2_frm_wd_in_mbs << 4) + 12;
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u4_cur_mb_intra = u1_cur_mb_type & D_INTRA_MB;
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u4_cur_mb_ibl = u1_cur_mb_type & D_INTRA_IBL;
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u4_cur_mb_fld = !!(u1_cur_mb_type & D_FLD_MB);
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/* Compute BS function */
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pu4_bs_table = ps_cur_mb_params->u4_bs_table;
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u2_cur_csbp = ps_cur_mb_info->ps_curmb->u2_luma_csbp;
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u2_left_csbp = ps_cur_mb_info->ps_left_mb->u2_luma_csbp;
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u2_top_csbp = ps_cur_mb_info->ps_top_mb->u2_luma_csbp;
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/* Compute BS function */
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if((ps_dec->ps_cur_sps->u1_profile_idc == HIGH_PROFILE_IDC) ||
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(ps_dec->ps_cur_sps->u1_profile_idc == HIGH_PROFILE_IDC) ||
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(ps_dec->ps_cur_sps->u1_profile_idc == SCALABLE_HIGH_PROFILE_IDC) ||
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(ps_dec->ps_cur_sps->u1_profile_idc == SCALABLE_BASELINE_PROFILE_IDC))
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{
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if(ps_cur_mb_info->u1_tran_form8x8 == 1)
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{
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u2_cur_csbp = ih264d_update_csbp_8x8(ps_cur_mb_info->ps_curmb->u2_luma_csbp);
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ps_cur_mb_info->ps_curmb->u2_luma_csbp = u2_cur_csbp;
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}
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}
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u2_cur_csbp |= *pu2_curr_res_luma_csbp;
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u2_left_csbp |= *pu2_left_res_luma_csbp;
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u2_top_csbp |= *pu2_top_res_luma_csbp;
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if(u4_cur_mb_intra)
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{
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pu4_bs_table[4] = 0x04040404;
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pu4_bs_table[0] = u4_cur_mb_fld ? 0x03030303 : 0x04040404;
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pu4_bs_table[1] = 0x03030303;
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pu4_bs_table[2] = 0x03030303;
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pu4_bs_table[3] = 0x03030303;
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pu4_bs_table[5] = 0x03030303;
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pu4_bs_table[6] = 0x03030303;
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pu4_bs_table[7] = 0x03030303;
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}
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else
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{
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isvcd_fill_bs_ibl(ps_cur_mb_params, u1_top_mb_typ, u4_leftmbtype, ps_cur_mb_info,
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pu2_curr_res_luma_csbp, pu2_left_res_luma_csbp, pu2_top_res_luma_csbp);
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if(!u4_cur_mb_ibl)
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{
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UWORD32 u4_is_non16x16 = !!(u1_cur_mb_type & D_PRED_NON_16x16);
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UWORD32 u4_is_b = (ps_dec->ps_computebs_cur_slice->slice_type == B_SLICE);
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UWORD32 u4_bs_0, u4_bs_4;
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u4_bs_0 = pu4_bs_table[0];
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u4_bs_4 = pu4_bs_table[4];
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ih264d_fill_bs2_horz_vert(pu4_bs_table, u2_left_csbp, u2_top_csbp, u2_cur_csbp,
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gau4_ih264d_packed_bs2, gau2_ih264d_4x4_v2h_reorder);
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if(u4_leftmbtype & D_INTRA_MB)
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{
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pu4_bs_table[4] = 0x04040404;
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}
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else if(u4_leftmbtype & D_INTRA_IBL)
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{
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pu4_bs_table[4] = u4_bs_4;
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}
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if(u1_top_mb_typ & D_INTRA_MB)
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{
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pu4_bs_table[0] = u4_cur_mb_fld ? 0x03030303 : 0x04040404;
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}
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else if(u1_top_mb_typ & D_INTRA_IBL)
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{
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pu4_bs_table[0] = u4_bs_0;
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}
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ps_dec->pf_fill_bs1[u4_is_b][u4_is_non16x16](
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ps_cur_mv_pred, ps_top_mv_pred, apv_map_ref_idx_to_poc, pu4_bs_table,
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ps_left_mv_pred, &(ps_dec->ps_left_mvpred_addr[u1_pingpong][1]),
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ps_cur_mb_info->ps_top_mb->u4_pic_addrress, (4 >> u4_cur_mb_fld));
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}
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}
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{
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void **pu4_map_ref_idx_to_poc_l1 = apv_map_ref_idx_to_poc + POC_LIST_L0_TO_L1_DIFF;
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{
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/* Store Parameter for Top MvPred refernce frame Address */
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void **ppv_top_mv_pred_addr = ps_cur_mb_info->ps_curmb->u4_pic_addrress;
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WORD8 *p1_refTop0 = (ps_cur_mv_pred + 12)->i1_ref_frame;
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WORD8 *p1_refTop1 = (ps_cur_mv_pred + 14)->i1_ref_frame;
|
||
|
|
|
||
|
|
/* Store Left addresses for Next Mb */
|
||
|
|
void **ppv_left_mv_pred_addr = ps_dec->ps_left_mvpred_addr[!u1_pingpong][1].u4_add;
|
||
|
|
WORD8 *p1_refleft0 = (ps_cur_mv_pred + 3)->i1_ref_frame;
|
||
|
|
|
||
|
|
ppv_top_mv_pred_addr[0] = apv_map_ref_idx_to_poc[p1_refTop0[0]];
|
||
|
|
ppv_top_mv_pred_addr[1] = pu4_map_ref_idx_to_poc_l1[p1_refTop0[1]];
|
||
|
|
|
||
|
|
ppv_left_mv_pred_addr[2] = apv_map_ref_idx_to_poc[p1_refTop1[0]];
|
||
|
|
ppv_top_mv_pred_addr[2] = apv_map_ref_idx_to_poc[p1_refTop1[0]];
|
||
|
|
ppv_left_mv_pred_addr[3] = pu4_map_ref_idx_to_poc_l1[p1_refTop1[1]];
|
||
|
|
ppv_top_mv_pred_addr[3] = pu4_map_ref_idx_to_poc_l1[p1_refTop1[1]];
|
||
|
|
|
||
|
|
ppv_left_mv_pred_addr[0] = apv_map_ref_idx_to_poc[p1_refleft0[0]];
|
||
|
|
ppv_left_mv_pred_addr[1] = pu4_map_ref_idx_to_poc_l1[p1_refleft0[1]];
|
||
|
|
|
||
|
|
/* Storing the leftMbtype for next Mb */
|
||
|
|
ps_dec->deblk_left_mb[1].u1_mb_type = ps_cur_mb_params->u1_mb_type;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* For transform 8x8 disable deblocking of the intrernal edges of a 8x8 block */
|
||
|
|
if(ps_cur_mb_info->u1_tran_form8x8)
|
||
|
|
{
|
||
|
|
pu4_bs_table[1] = 0;
|
||
|
|
pu4_bs_table[3] = 0;
|
||
|
|
pu4_bs_table[5] = 0;
|
||
|
|
pu4_bs_table[7] = 0;
|
||
|
|
}
|
||
|
|
}
|