95 lines
3.0 KiB
Plaintext
95 lines
3.0 KiB
Plaintext
|
##This file needs to be pushed into /vendor/etc/libese-nxp.conf
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Log level for SE HAL
|
||
|
|
# LOG_LEVEL_SILENT 0x00
|
||
|
|
# LOG_LEVEL_ERROR 0x01
|
||
|
|
# LOG_LEVEL_WARN 0x02
|
||
|
|
# LOG_LEVEL_INFO 0x03
|
||
|
|
# LOG_LEVEL_DEBUG 0x04
|
||
|
|
|
||
|
|
SE_LOG_LEVEL=0x04
|
||
|
|
|
||
|
|
# Enable/Disable printing TX/RX time duration in logs
|
||
|
|
# Disable 0
|
||
|
|
# Enable 1
|
||
|
|
SE_KPI_MEASUREMENT_ENABLED=0
|
||
|
|
|
||
|
|
#WTX Count in secs
|
||
|
|
NXP_WTX_COUNT_VALUE=30
|
||
|
|
|
||
|
|
#Max WTX Count in OSU mode in secs
|
||
|
|
NXP_OSU_MAX_WTX_COUNT=60
|
||
|
|
|
||
|
|
#Delay(us) to recover if invalid data received
|
||
|
|
RNACK_RETRY_DELAY=7000
|
||
|
|
|
||
|
|
# PN67T_PWR_SCHEME 0x01
|
||
|
|
# PN80T_LEGACY_PWR_SCHEME 0x02
|
||
|
|
# PN80T_EXT_PMU_SCHEME 0x03
|
||
|
|
NXP_POWER_SCHEME=0x02
|
||
|
|
|
||
|
|
# For SOF = 0x5A 0x01
|
||
|
|
# For SOF = 0x00 0x02
|
||
|
|
NXP_SOF_WRITE=0x01
|
||
|
|
|
||
|
|
#SPI Throughput measurement log enabled(1)/disabled(0) in kernel
|
||
|
|
NXP_TP_MEASUREMENT=0x00
|
||
|
|
|
||
|
|
#Enable/Disable interface reset as part of SPI open
|
||
|
|
NXP_SPI_INTF_RST_ENABLE=0x01
|
||
|
|
|
||
|
|
#Wait extension call back notification count to notify(In secs)
|
||
|
|
NXP_WTX_NTF_COUNT=0x03
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# SPI WRITE TIMEOUT for RF event synchronization
|
||
|
|
NXP_SPI_WRITE_TIMEOUT=0x14
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# SPI Device Node name
|
||
|
|
NXP_ESE_DEV_NODE="/dev/p73"
|
||
|
|
|
||
|
|
#MAX NO OF R_NACK RETRY ALLOWED IN CASE OF CRC FAILURE
|
||
|
|
NXP_MAX_RNACK_RETRY=0x03
|
||
|
|
NXP_VISO_DPD_ENABLED=0x01
|
||
|
|
#NXP_NAD_POLL_RETRY_TIME is in 100's of us
|
||
|
|
# e.g. 0x05 --> 500 us delay
|
||
|
|
NXP_NAD_POLL_RETRY_TIME=0x05
|
||
|
|
###############################################################################
|
||
|
|
# IFS adjustment configuration value of IFSD for eSE
|
||
|
|
# Any value set which is greater than IFSC value will be R-NACKed from JCOP
|
||
|
|
# Default IFSC: 0x01FA = (0x0200 - 0x6(header))(As agreed with JCOP)
|
||
|
|
#
|
||
|
|
NXP_ESE_IFSD_VALUE=0x0200
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# IFS adjustment configuration value of IFSD for eUICC
|
||
|
|
# Any value set which is greater than IFSC value will be R-NACKed from JCOP
|
||
|
|
# Default IFSC: 0x01FA = (0x0200 - 0x6(header))(As agreed with JCOP)
|
||
|
|
#
|
||
|
|
NXP_EUICC_IFSD_VALUE=0x0200
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Interface to perform the eSE cold reset
|
||
|
|
# Possible value can be 0x00 or 0x01
|
||
|
|
# 0x00 = ESE_HAL
|
||
|
|
# 0x01 = NFC_HAL
|
||
|
|
NXP_P61_COLD_RESET_INTERFACE=0x00
|
||
|
|
###############################################################################
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Identify the CHIP/OS version for which this config file is targeted
|
||
|
|
# Possible value can be as below
|
||
|
|
# 0x01 = PN8x variant
|
||
|
|
# 0x00 = SNxxx or higher variant derived from ATR info
|
||
|
|
NXP_OS_VERSION=0x00
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Reserve Logical channel for priority access operations such as weaver HAL
|
||
|
|
# for device lock/unlock operation.
|
||
|
|
# 0x00 = Disabled
|
||
|
|
# 0x01 = Enabled
|
||
|
|
NXP_SE_PRIORITY_ACCESS=1
|
||
|
|
|