286 lines
8.8 KiB
C
286 lines
8.8 KiB
C
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/*
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* Copyright (C) 2019 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __LOCAL_POC_H__
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#define __LOCAL_POC_H__
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#define DRM_IOCTL_BASE 'd'
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#define DRM_IOW(nr, type) _IOW(DRM_IOCTL_BASE, nr, type)
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#define DRM_IOWR(nr, type) _IOWR(DRM_IOCTL_BASE, nr, type)
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#define DRM_COMMAND_BASE 0x40
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#define DRM_NOUVEAU_EVENT_NVIF 0x80000000
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/* reserved object handles when using deprecated object APIs - these
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* are here so that libdrm can allow interoperability with the new
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* object APIs
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*/
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#define NOUVEAU_ABI16_CLIENT 0xffffffff
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#define NOUVEAU_ABI16_DEVICE 0xdddddddd
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#define NOUVEAU_ABI16_CHAN(n) (0xcccc0000 | (n))
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#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0)
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#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
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#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
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#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
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#define NOUVEAU_GEM_DOMAIN_COHERENT (1 << 4)
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#define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */
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#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00
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#define NOUVEAU_GEM_TILE_16BPP 0x00000001
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#define NOUVEAU_GEM_TILE_32BPP 0x00000002
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#define NOUVEAU_GEM_TILE_ZETA 0x00000004
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#define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008
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struct drm_nouveau_gem_info {
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uint32_t handle;
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uint32_t domain;
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uint64_t size;
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uint64_t offset;
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uint64_t map_handle;
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uint32_t tile_mode;
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uint32_t tile_flags;
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};
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struct drm_nouveau_gem_new {
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struct drm_nouveau_gem_info info;
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uint32_t channel_hint;
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uint32_t align;
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};
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struct drm_nouveau_gem_set_tiling {
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uint32_t handle;
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uint32_t tile_mode;
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uint32_t tile_flags;
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};
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#define NOUVEAU_GEM_MAX_BUFFERS 1024
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struct drm_nouveau_gem_pushbuf_bo_presumed {
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uint32_t valid;
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uint32_t domain;
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uint64_t offset;
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};
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struct drm_nouveau_gem_pushbuf_bo {
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uint64_t user_priv;
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uint32_t handle;
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uint32_t read_domains;
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uint32_t write_domains;
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uint32_t valid_domains;
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struct drm_nouveau_gem_pushbuf_bo_presumed presumed;
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};
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#define NOUVEAU_GEM_RELOC_LOW (1 << 0)
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#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
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#define NOUVEAU_GEM_RELOC_OR (1 << 2)
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#define NOUVEAU_GEM_MAX_RELOCS 1024
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struct drm_nouveau_gem_pushbuf_reloc {
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uint32_t reloc_bo_index;
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uint32_t reloc_bo_offset;
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uint32_t bo_index;
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uint32_t flags;
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uint32_t data;
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uint32_t vor;
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uint32_t tor;
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};
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#define NOUVEAU_GEM_MAX_PUSH 512
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struct drm_nouveau_gem_pushbuf_push {
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uint32_t bo_index;
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uint32_t pad;
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uint64_t offset;
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uint64_t length;
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};
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struct drm_nouveau_gem_pushbuf {
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uint32_t channel;
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uint32_t nr_buffers;
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uint64_t buffers;
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uint32_t nr_relocs;
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uint32_t nr_push;
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uint64_t relocs;
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uint64_t push;
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uint32_t suffix0;
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uint32_t suffix1;
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uint64_t vram_available;
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uint64_t gart_available;
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};
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#define NOUVEAU_GEM_PUSHBUF_2_FENCE_WAIT 0x00000001
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#define NOUVEAU_GEM_PUSHBUF_2_FENCE_EMIT 0x00000002
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struct drm_nouveau_gem_pushbuf_2 {
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uint32_t channel;
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uint32_t flags;
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uint32_t nr_push;
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uint32_t nr_buffers;
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int32_t fence; /* in/out, depends on flags */
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uint32_t pad;
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uint64_t push; /* in raw hw format */
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uint64_t buffers; /* ptr to drm_nouveau_gem_pushbuf_bo */
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uint64_t vram_available;
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uint64_t gart_available;
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};
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#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001
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#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004
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struct drm_nouveau_gem_cpu_prep {
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uint32_t handle;
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uint32_t flags;
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};
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struct drm_nouveau_gem_cpu_fini {
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uint32_t handle;
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};
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struct drm_nouveau_gem_as_alloc {
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uint64_t pages; /* in, page length */
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uint32_t page_size; /* in, byte page size */
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#define NOUVEAU_GEM_AS_SPARSE 0x1
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uint32_t flags;
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uint64_t align; /* in, requested alignment in bytes */
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uint64_t address; /* in/out, non-zero for fixed address allocation */
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};
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struct drm_nouveau_gem_as_free {
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uint64_t address; /* in, byte address */
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};
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#define NOUVEAU_GEM_CHANNEL_FIFO_ERROR_IDLE_TIMEOUT 8
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#define NOUVEAU_GEM_CHANNEL_GR_ERROR_SW_NOTIFY 13
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#define NOUVEAU_GEM_CHANNEL_FIFO_ERROR_MMU_ERR_FLT 31
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#define NOUVEAU_GEM_CHANNEL_PBDMA_ERROR 32
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struct drm_nouveau_gem_set_error_notifier {
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uint32_t channel;
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uint32_t buffer;
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uint32_t offset; /* bytes, u32-aligned */
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};
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struct drm_nouveau_gem_map {
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uint32_t handle;
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uint32_t domain;
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uint64_t offset;
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uint64_t delta;
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uint64_t length;
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uint32_t tile_mode;
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uint32_t tile_flags;
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};
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struct drm_nouveau_gem_unmap {
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uint32_t handle;
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uint32_t pad;
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uint64_t offset;
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uint64_t delta;
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uint64_t length;
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};
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struct nvif_ioctl_v0 {
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__u8 version;
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#define NVIF_IOCTL_V0_OWNER_NVIF 0x00
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#define NVIF_IOCTL_V0_OWNER_ANY 0xff
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__u8 owner;
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#define NVIF_IOCTL_V0_NOP 0x00
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#define NVIF_IOCTL_V0_SCLASS 0x01
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#define NVIF_IOCTL_V0_NEW 0x02
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#define NVIF_IOCTL_V0_DEL 0x03
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#define NVIF_IOCTL_V0_MTHD 0x04
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#define NVIF_IOCTL_V0_RD 0x05
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#define NVIF_IOCTL_V0_WR 0x06
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#define NVIF_IOCTL_V0_MAP 0x07
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#define NVIF_IOCTL_V0_UNMAP 0x08
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#define NVIF_IOCTL_V0_NTFY_NEW 0x09
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#define NVIF_IOCTL_V0_NTFY_DEL 0x0a
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#define NVIF_IOCTL_V0_NTFY_GET 0x0b
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#define NVIF_IOCTL_V0_NTFY_PUT 0x0c
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__u8 type;
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__u8 path_nr;
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#define NVIF_IOCTL_V0_ROUTE_NVIF 0x00
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#define NVIF_IOCTL_V0_ROUTE_HIDDEN 0xff
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__u8 pad04[3];
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__u8 route;
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__u64 token;
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__u32 path[8]; /* in reverse */
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__u8 data[]; /* ioctl data (below) */
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};
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#define DRM_NOUVEAU_GETPARAM 0x00 /* deprecated */
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#define DRM_NOUVEAU_SETPARAM 0x01 /* deprecated */
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#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 /* deprecated */
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#define DRM_NOUVEAU_CHANNEL_FREE 0x03 /* deprecated */
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#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 /* deprecated */
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#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 /* deprecated */
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#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 /* deprecated */
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#define DRM_NOUVEAU_NVIF 0x07
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#define DRM_NOUVEAU_GEM_NEW 0x40
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#define DRM_NOUVEAU_GEM_PUSHBUF 0x41
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#define DRM_NOUVEAU_GEM_CPU_PREP 0x42
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#define DRM_NOUVEAU_GEM_CPU_FINI 0x43
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#define DRM_NOUVEAU_GEM_INFO 0x44
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/*
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* range (0x50+DRM_COMMAND_BASE)..DRM_COMMAND_END is reserved for staging,
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* unstable ioctls
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*/
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#define DRM_NOUVEAU_STAGING_IOCTL 0x50
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#define DRM_NOUVEAU_GEM_SET_TILING (DRM_NOUVEAU_STAGING_IOCTL + 0x0)
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#define DRM_NOUVEAU_GEM_PUSHBUF_2 (DRM_NOUVEAU_STAGING_IOCTL + 0x1)
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#define DRM_NOUVEAU_GEM_SET_INFO (DRM_NOUVEAU_STAGING_IOCTL + 0x2)
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#define DRM_NOUVEAU_GEM_AS_ALLOC (DRM_NOUVEAU_STAGING_IOCTL + 0x3)
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#define DRM_NOUVEAU_GEM_AS_FREE (DRM_NOUVEAU_STAGING_IOCTL + 0x4)
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#define DRM_NOUVEAU_GEM_SET_ERROR_NOTIFIER (DRM_NOUVEAU_STAGING_IOCTL + 0x5)
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#define DRM_NOUVEAU_GEM_MAP (DRM_NOUVEAU_STAGING_IOCTL + 0x6)
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#define DRM_NOUVEAU_GEM_UNMAP (DRM_NOUVEAU_STAGING_IOCTL + 0x7)
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#define DRM_IOCTL_NOUVEAU_GEM_NEW \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new)
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#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, \
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struct drm_nouveau_gem_pushbuf)
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#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP \
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DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, \
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struct drm_nouveau_gem_cpu_prep)
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#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI \
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DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, \
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struct drm_nouveau_gem_cpu_fini)
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#define DRM_IOCTL_NOUVEAU_GEM_INFO \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info)
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#define DRM_IOCTL_NOUVEAU_GEM_SET_TILING \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_SET_TILING, \
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struct drm_nouveau_gem_set_tiling)
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#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF_2 \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF_2, \
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struct drm_nouveau_gem_pushbuf_2)
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#define DRM_IOCTL_NOUVEAU_GEM_SET_INFO \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_SET_INFO, \
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struct drm_nouveau_gem_info)
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#define DRM_IOCTL_NOUVEAU_GEM_AS_ALLOC \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_AS_ALLOC, \
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struct drm_nouveau_gem_as_alloc)
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#define DRM_IOCTL_NOUVEAU_GEM_AS_FREE \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_AS_FREE, \
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struct drm_nouveau_gem_as_free)
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#define DRM_IOCTL_NOUVEAU_GEM_SET_ERROR_NOTIFIER \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_SET_ERROR_NOTIFIER, \
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struct drm_nouveau_gem_set_error_notifier)
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#define DRM_IOCTL_NOUVEAU_GEM_MAP \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_MAP, struct drm_nouveau_gem_map)
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#define DRM_IOCTL_NOUVEAU_GEM_UNMAP \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_UNMAP, \
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struct drm_nouveau_gem_unmap)
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#define DRM_IOCTL_NOUVEAU_NVIF \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_NVIF, struct nvif_ioctl_v0)
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#endif
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