141 lines
7.2 KiB
C++
141 lines
7.2 KiB
C++
/*
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* Copyright (C) 2023 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_RUNTIME_ARCH_RISCV64_CALLEE_SAVE_FRAME_RISCV64_H_
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#define ART_RUNTIME_ARCH_RISCV64_CALLEE_SAVE_FRAME_RISCV64_H_
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#include "arch/instruction_set.h"
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#include "base/bit_utils.h"
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#include "base/callee_save_type.h"
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#include "base/enums.h"
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#include "quick/quick_method_frame_info.h"
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#include "registers_riscv64.h"
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#include "runtime_globals.h"
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namespace art {
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namespace riscv64 {
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static constexpr uint32_t kRiscv64CalleeSaveAlwaysSpills =
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(1 << art::riscv64::RA); // Return address
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// Callee-saved registers except for SP and S1 (SP is callee-saved according to RISC-V spec, but
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// it cannot contain object reference, and S1(TR) is excluded as the ART thread register).
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static constexpr uint32_t kRiscv64CalleeSaveRefSpills =
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(1 << art::riscv64::S0) | (1 << art::riscv64::S2) | (1 << art::riscv64::S3) |
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(1 << art::riscv64::S4) | (1 << art::riscv64::S5) | (1 << art::riscv64::S6) |
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(1 << art::riscv64::S7) | (1 << art::riscv64::S8) | (1 << art::riscv64::S9) |
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(1 << art::riscv64::S10) | (1 << art::riscv64::S11);
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// Stack pointer SP is excluded (although it is callee-saved by calling convention) because it is
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// restored by the code logic and not from a stack frame.
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static constexpr uint32_t kRiscv64CalleeSaveAllSpills = 0;
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// Argument registers except X10/A0 (which contains method pointer).
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static constexpr uint32_t kRiscv64CalleeSaveArgSpills =
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(1 << art::riscv64::A1) | (1 << art::riscv64::A2) | (1 << art::riscv64::A3) |
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(1 << art::riscv64::A4) | (1 << art::riscv64::A5) | (1 << art::riscv64::A6) |
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(1 << art::riscv64::A7);
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// All registers except SP, immutable Zero, unallocatable TP and GP, and the ART thread register TR.
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static constexpr uint32_t kRiscv64CalleeSaveEverythingSpills =
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(1 << art::riscv64::T0) | (1 << art::riscv64::T1) | (1 << art::riscv64::T2) |
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(1 << art::riscv64::T3) | (1 << art::riscv64::T4) | (1 << art::riscv64::T5) |
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(1 << art::riscv64::T6) | (1 << art::riscv64::A0) | (1 << art::riscv64::A1) |
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(1 << art::riscv64::A2) | (1 << art::riscv64::A3) | (1 << art::riscv64::A4) |
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(1 << art::riscv64::A5) | (1 << art::riscv64::A6) | (1 << art::riscv64::A7);
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// No references in floating-point registers.
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static constexpr uint32_t kRiscv64CalleeSaveFpSpills = 0;
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// Floating-point argument registers FA0 - FA7.
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static constexpr uint32_t kRiscv64CalleeSaveFpArgSpills =
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(1 << art::riscv64::FA0) | (1 << art::riscv64::FA1) | (1 << art::riscv64::FA2) |
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(1 << art::riscv64::FA3) | (1 << art::riscv64::FA4) | (1 << art::riscv64::FA5) |
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(1 << art::riscv64::FA6) | (1 << art::riscv64::FA7);
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// Floating-point callee-saved registers FS0 - FS11.
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static constexpr uint32_t kRiscv64CalleeSaveFpAllSpills =
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(1 << art::riscv64::FS0) | (1 << art::riscv64::FS1) | (1 << art::riscv64::FS2) |
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(1 << art::riscv64::FS3) | (1 << art::riscv64::FS4) | (1 << art::riscv64::FS5) |
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(1 << art::riscv64::FS6) | (1 << art::riscv64::FS7) | (1 << art::riscv64::FS8) |
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(1 << art::riscv64::FS9) | (1 << art::riscv64::FS10) | (1 << art::riscv64::FS11);
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// All floating-point registers.
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static constexpr uint32_t kRiscv64CalleeSaveFpEverythingSpills =
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(1 << art::riscv64::FT0) | (1 << art::riscv64::FT1) | (1 << art::riscv64::FT2) |
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(1 << art::riscv64::FT3) | (1 << art::riscv64::FT4) | (1 << art::riscv64::FT5) |
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(1 << art::riscv64::FT6) | (1 << art::riscv64::FT7) | (1 << art::riscv64::FT8) |
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(1 << art::riscv64::FT9) | (1 << art::riscv64::FT10) | (1 << art::riscv64::FT11) |
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(1 << art::riscv64::FS0) | (1 << art::riscv64::FS1) | (1 << art::riscv64::FS2) |
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(1 << art::riscv64::FS3) | (1 << art::riscv64::FS4) | (1 << art::riscv64::FS5) |
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(1 << art::riscv64::FS6) | (1 << art::riscv64::FS7) | (1 << art::riscv64::FS8) |
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(1 << art::riscv64::FS9) | (1 << art::riscv64::FS10) | (1 << art::riscv64::FS11) |
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(1 << art::riscv64::FA0) | (1 << art::riscv64::FA1) | (1 << art::riscv64::FA2) |
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(1 << art::riscv64::FA3) | (1 << art::riscv64::FA4) | (1 << art::riscv64::FA5) |
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(1 << art::riscv64::FA6) | (1 << art::riscv64::FA7);
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class Riscv64CalleeSaveFrame {
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public:
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static constexpr uint32_t GetCoreSpills(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return kRiscv64CalleeSaveAlwaysSpills | kRiscv64CalleeSaveRefSpills |
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(type == CalleeSaveType::kSaveRefsAndArgs ? kRiscv64CalleeSaveArgSpills : 0) |
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(type == CalleeSaveType::kSaveAllCalleeSaves ? kRiscv64CalleeSaveAllSpills : 0) |
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(type == CalleeSaveType::kSaveEverything ? kRiscv64CalleeSaveEverythingSpills : 0);
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}
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static constexpr uint32_t GetFpSpills(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return kRiscv64CalleeSaveFpSpills |
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(type == CalleeSaveType::kSaveRefsAndArgs ? kRiscv64CalleeSaveFpArgSpills : 0) |
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(type == CalleeSaveType::kSaveAllCalleeSaves ? kRiscv64CalleeSaveFpAllSpills : 0) |
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(type == CalleeSaveType::kSaveEverything ? kRiscv64CalleeSaveFpEverythingSpills : 0);
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}
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static constexpr uint32_t GetFrameSize(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return RoundUp((POPCOUNT(GetCoreSpills(type)) /* gprs */ +
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POPCOUNT(GetFpSpills(type)) /* fprs */ + 1 /* Method* */) *
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static_cast<size_t>(kRiscv64PointerSize),
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kStackAlignment);
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}
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static constexpr QuickMethodFrameInfo GetMethodFrameInfo(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return QuickMethodFrameInfo(GetFrameSize(type), GetCoreSpills(type), GetFpSpills(type));
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}
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static constexpr size_t GetFpr1Offset(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return GetFrameSize(type) - (POPCOUNT(GetCoreSpills(type)) + POPCOUNT(GetFpSpills(type))) *
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static_cast<size_t>(kRiscv64PointerSize);
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}
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static constexpr size_t GetGpr1Offset(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return GetFrameSize(type) -
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POPCOUNT(GetCoreSpills(type)) * static_cast<size_t>(kRiscv64PointerSize);
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}
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static constexpr size_t GetReturnPcOffset(CalleeSaveType type) {
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type = GetCanonicalCalleeSaveType(type);
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return GetFrameSize(type) - static_cast<size_t>(kRiscv64PointerSize);
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}
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};
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// Assembly entrypoints rely on these constants.
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static_assert(Riscv64CalleeSaveFrame::GetFrameSize(CalleeSaveType::kSaveRefsAndArgs) == 224);
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static_assert(Riscv64CalleeSaveFrame::GetFrameSize(CalleeSaveType::kSaveAllCalleeSaves) == 208);
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static_assert(Riscv64CalleeSaveFrame::GetFrameSize(CalleeSaveType::kSaveEverything) == 480);
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} // namespace riscv64
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} // namespace art
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#endif // ART_RUNTIME_ARCH_RISCV64_CALLEE_SAVE_FRAME_RISCV64_H_
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