78 lines
1.5 KiB
ArmAsm
78 lines
1.5 KiB
ArmAsm
// Copyright 2016 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build mips mipsle
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.file "gcc_mipsx.S"
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/*
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* void crosscall1(void (*fn)(void), void (*setg_gcc)(void *g), void *g)
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*
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* Calling into the gc tool chain, where all registers are caller save.
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* Called from standard MIPS O32 ABI, where $16-$23, $30, and $f20-$f31
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* are callee-save, so they must be saved explicitly, along with $31 (LR).
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*/
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.globl crosscall1
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.set noat
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crosscall1:
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#ifndef __mips_soft_float
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addiu $29, $29, -88
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#else
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addiu $29, $29, -40 // For soft-float, no need to make room for FP registers
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#endif
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sw $31, 0($29)
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sw $16, 4($29)
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sw $17, 8($29)
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sw $18, 12($29)
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sw $19, 16($29)
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sw $20, 20($29)
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sw $21, 24($29)
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sw $22, 28($29)
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sw $23, 32($29)
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sw $30, 36($29)
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#ifndef __mips_soft_float
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sdc1 $f20, 40($29)
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sdc1 $f22, 48($29)
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sdc1 $f24, 56($29)
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sdc1 $f26, 64($29)
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sdc1 $f28, 72($29)
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sdc1 $f30, 80($29)
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#endif
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move $20, $4 // save R4
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move $4, $6
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jalr $5 // call setg_gcc
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jalr $20 // call fn
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lw $16, 4($29)
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lw $17, 8($29)
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lw $18, 12($29)
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lw $19, 16($29)
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lw $20, 20($29)
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lw $21, 24($29)
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lw $22, 28($29)
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lw $23, 32($29)
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lw $30, 36($29)
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#ifndef __mips_soft_float
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ldc1 $f20, 40($29)
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ldc1 $f22, 48($29)
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ldc1 $f24, 56($29)
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ldc1 $f26, 64($29)
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ldc1 $f28, 72($29)
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ldc1 $f30, 80($29)
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#endif
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lw $31, 0($29)
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#ifndef __mips_soft_float
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addiu $29, $29, 88
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#else
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addiu $29, $29, 40
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#endif
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jr $31
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.set at
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#ifdef __ELF__
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.section .note.GNU-stack,"",%progbits
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#endif
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