47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef __MDP_BASE_H__
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#define __MDP_BASE_H__
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#define MDP_HW_CHECK
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static u32 mdp_engine_port[ENGBASE_COUNT] = {
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0, /*ENGBASE_MMSYS_CONFIG_BASE,*/
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0, /*ENGBASE_MDP_RDMA0_BASE,*/
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0, /*ENGBASE_MDP_CCORR0_BASE,*/
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0, /*ENGBASE_MDP_RSZ0_BASE,*/
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0, /*ENGBASE_MDP_RSZ1_BASE,*/
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0, /*ENGBASE_MDP_WDMA_BASE,*/
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0, /*ENGBASE_MDP_WROT0_BASE,*/
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0, /*ENGBASE_MDP_TDSHP0_BASE,*/
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0, /*ENGBASE_MDP_COLOR0_BASE,*/
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0, /*ENGBASE_MMSYS_MUTEX_BASE,*/
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0, /*ENGBASE_ISP_CAMSYS*/
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0, /*ENGBASE_ISP_CAM*/
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0, /*ENGBASE_ISP_CAM_DMA*/
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0, /*ENGBASE_IMGSYS,*/
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0, /*ENGBASE_ISP_DIP1,*/
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};
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static u32 mdp_base[] = {
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[ENGBASE_MMSYS_CONFIG] = 0x14000000,
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[ENGBASE_MDP_RDMA0] = 0x14004000,
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[ENGBASE_MDP_CCORR0] = 0x14005000,
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[ENGBASE_MDP_RSZ0] = 0x14006000,
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[ENGBASE_MDP_RSZ1] = 0x14007000,
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[ENGBASE_MDP_WDMA] = 0x14008000,
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[ENGBASE_MDP_WROT0] = 0x14009000,
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[ENGBASE_MDP_TDSHP0] = 0x1400a000,
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[ENGBASE_MDP_COLOR0] = 0x1400f000,
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[ENGBASE_MMSYS_MUTEX] = 0x14001000,
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[ENGBASE_ISP_CAMSYS] = 0x15000000,
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[ENGBASE_ISP_CAM] = 0x15004000,
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[ENGBASE_ISP_CAM_DMA] = 0x15007000,
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[ENGBASE_IMGSYS] = 0x15020000,
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[ENGBASE_ISP_DIP1] = 0x15022000,
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};
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#endif
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