164 lines
3.1 KiB
C
164 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __M4U_PORT_H__
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#define __M4U_PORT_H__
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/* ==================================== */
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/* about portid */
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/* ==================================== */
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enum {
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/*larb0 -MMSYS-9*/
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M4U_PORT_DISP_POSTMASK0,
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M4U_PORT_DISP_OVL0_HDR,
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M4U_PORT_DISP_OVL1_HDR,
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M4U_PORT_DISP_OVL0,
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M4U_PORT_DISP_OVL1,
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M4U_PORT_DISP_PVRIC0,
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M4U_PORT_DISP_RDMA0,
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M4U_PORT_DISP_WDMA0,
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M4U_PORT_DISP_FAKE0,
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/*larb1-MMSYS-14*/
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M4U_PORT_DISP_OVL0_2L_HDR,
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M4U_PORT_DISP_OVL1_2L_HDR,
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M4U_PORT_DISP_OVL0_2L,
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M4U_PORT_DISP_OVL1_2L,
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M4U_PORT_DISP_RDMA1,
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M4U_PORT_MDP_PVRIC0,
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M4U_PORT_MDP_PVRIC1,
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M4U_PORT_MDP_RDMA0,
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M4U_PORT_MDP_RDMA1,
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M4U_PORT_MDP_WROT0_R,
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M4U_PORT_MDP_WROT0_W,
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M4U_PORT_MDP_WROT1_R,
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M4U_PORT_MDP_WROT1_W,
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M4U_PORT_DISP_FAKE1,
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/*larb2-VDEC-12*/
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M4U_PORT_HW_VDEC_MC_EXT,
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M4U_PORT_HW_VDEC_UFO_EXT,
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M4U_PORT_HW_VDEC_PP_EXT,
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M4U_PORT_HW_VDEC_PRED_RD_EXT,
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M4U_PORT_HW_VDEC_PRED_WR_EXT,
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M4U_PORT_HW_VDEC_PPWRAP_EXT,
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M4U_PORT_HW_VDEC_TILE_EXT,
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M4U_PORT_HW_VDEC_VLD_EXT,
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M4U_PORT_HW_VDEC_VLD2_EXT,
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M4U_PORT_HW_VDEC_AVC_MV_EXT,
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M4U_PORT_HW_VDEC_UFO_ENC_EXT,
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M4U_PORT_HW_VDEC_RG_CTRL_DMA_EXT,
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/*larb3-VENC-19*/
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M4U_PORT_VENC_RCPU,
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M4U_PORT_VENC_REC,
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M4U_PORT_VENC_BSDMA,
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M4U_PORT_VENC_SV_COMV,
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M4U_PORT_VENC_RD_COMV,
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M4U_PORT_VENC_NBM_RDMA,
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M4U_PORT_VENC_NBM_RDMA_LITE,
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M4U_PORT_JPGENC_Y_RDMA,
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M4U_PORT_JPGENC_C_RDMA,
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M4U_PORT_JPGENC_Q_TABLE,
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M4U_PORT_JPGENC_BSDMA,
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M4U_PORT_JPGDEC_WDMA,
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M4U_PORT_JPGDEC_BSDMA,
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M4U_PORT_VENC_NBM_WDMA,
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M4U_PORT_VENC_NBM_WDMA_LITE,
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M4U_PORT_VENC_CUR_LUMA,
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M4U_PORT_VENC_CUR_CHROMA,
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M4U_PORT_VENC_REF_LUMA,
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M4U_PORT_VENC_REF_CHROMA,
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/* larb4-IMG-3
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* HW disconnected
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* Jolin Chou
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M4U_PORT_IPUO_LARB4,
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M4U_PORT_IPU3O_LARB4,
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M4U_PORT_IPUI_LARB4,
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*/
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/*larb5-CAM-26*/
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M4U_PORT_IMGI,
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M4U_PORT_IMG2O,
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M4U_PORT_IMG3O,
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M4U_PORT_VIPI,
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M4U_PORT_LCEI,
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M4U_PORT_SMXI,
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M4U_PORT_SMXO,
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M4U_PORT_WPE0_RDMA1,
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M4U_PORT_WPE0_RDMA0,
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M4U_PORT_WPE0_WDMA,
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M4U_PORT_FDVT_RDB,
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M4U_PORT_FDVT_WRA,
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M4U_PORT_FDVT_RDA,
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M4U_PORT_WPE1_RDMA0,
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M4U_PORT_WPE1_RDMA1,
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M4U_PORT_WPE1_WDMA,
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M4U_PORT_DPE_RDMA,
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M4U_PORT_DPE_WDMA,
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M4U_PORT_MFB_RDMA0,
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M4U_PORT_MFB_RDMA1,
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M4U_PORT_MFB_WDMA,
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M4U_PORT_RSC_RDMA0,
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M4U_PORT_RSC_WDMA,
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M4U_PORT_OWE_RDMA,
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M4U_PORT_OWE_WDMA,
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M4U_PORT_FDVT_WRB,
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/*larb6-CAM-31*/
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M4U_PORT_IMGO,
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M4U_PORT_RRZO,
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M4U_PORT_AAO,
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M4U_PORT_AFO,
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M4U_PORT_LSCI_0,
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M4U_PORT_LSCI_1,
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M4U_PORT_PDO,
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M4U_PORT_BPCI,
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M4U_PORT_LSCO,
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M4U_PORT_RSSO_A,//M4U_PORT_AFO_1,
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M4U_PORT_UFEO,//M4U_PORT_PSO,
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M4U_PORT_SOCO,//M4U_PORT_LSCI_2,
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M4U_PORT_SOC1,
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M4U_PORT_SOC2,
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M4U_PORT_CCUI,
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M4U_PORT_CCUO,
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M4U_PORT_RAWI_A,
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M4U_PORT_CCUG,
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M4U_PORT_PSO,
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M4U_PORT_AFO_1,
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M4U_PORT_LSCI_2,
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M4U_PORT_PDI,
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M4U_PORT_FLKO,
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M4U_PORT_LMVO,
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M4U_PORT_UFGO,
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M4U_PORT_SPARE,
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M4U_PORT_SPARE_2,
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M4U_PORT_SPARE_3,
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M4U_PORT_SPARE_4,
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M4U_PORT_SPARE_5,
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FAKE_ENGINE,
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/*larb7-CAM-5
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M4U_PORT_IPUO,
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M4U_PORT_IPU2O,
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M4U_PORT_IPU3O,
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M4U_PORT_IPUI,
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M4U_PORT_IPU2I,
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*/
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/* smi common */
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M4U_PORT_CCU0,
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M4U_PORT_CCU1,
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M4U_PORT_VPU,
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M4U_PORT_UNKNOWN,
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};
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#define M4U_PORT_NR M4U_PORT_UNKNOWN
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#endif
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